From: Raag Jadav <raag.jadav@intel.com>
To: Riana Tauro <riana.tauro@intel.com>
Cc: intel-xe@lists.freedesktop.org, anshuman.gupta@intel.com,
rodrigo.vivi@intel.com, aravind.iddamsetty@linux.intel.com,
badal.nilawar@intel.com, ravi.kishore.koppuravuri@intel.com,
mallesh.koujalagi@intel.com, soham.purkait@intel.com,
Anoop Vijay <anoop.c.vijay@intel.com>,
Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Subject: Re: [PATCH v5 5/6] drm/xe/xe_ras: Move xe drm_ras registration
Date: Mon, 11 May 2026 17:36:37 +0200 [thread overview]
Message-ID: <agH3hTQGzVBUI7Dz@black.igk.intel.com> (raw)
In-Reply-To: <20260504065614.3832331-13-riana.tauro@intel.com>
On Mon, May 04, 2026 at 12:26:20PM +0530, Riana Tauro wrote:
> Move xe drm_ras registration to RAS initialization flow and keep
> hardware error initialization for processing errors reported
> via irq.
>
> Also reorder soc remapper and system controller initialization to
> early probe as ras init is dependent on both.
>
> Cc: Anoop Vijay <anoop.c.vijay@intel.com>
> Cc: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> ---
> drivers/gpu/drm/xe/xe_device.c | 19 +++++++++++--------
> drivers/gpu/drm/xe/xe_hw_error.c | 13 -------------
> drivers/gpu/drm/xe/xe_ras.c | 20 ++++++++++++++++++++
> drivers/gpu/drm/xe/xe_ras.h | 1 +
> 4 files changed, 32 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> index 4b45b617a039..041af7ffc8bb 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
> @@ -62,6 +62,7 @@
> #include "xe_psmi.h"
> #include "xe_pxp.h"
> #include "xe_query.h"
> +#include "xe_ras.h"
> #include "xe_shrinker.h"
> #include "xe_soc_remapper.h"
> #include "xe_survivability_mode.h"
> @@ -962,6 +963,16 @@ int xe_device_probe(struct xe_device *xe)
> if (err)
> return err;
>
> + err = xe_soc_remapper_init(xe);
> + if (err)
> + return err;
> +
> + err = xe_sysctrl_init(xe);
> + if (err)
> + return err;
> +
> + xe_ras_init(xe);
> +
> /*
> * Now that GT is initialized (TTM in particular),
> * we can try to init display, and inherit the initial fb.
> @@ -1002,10 +1013,6 @@ int xe_device_probe(struct xe_device *xe)
>
> xe_nvm_init(xe);
>
> - err = xe_soc_remapper_init(xe);
> - if (err)
> - return err;
> -
> err = xe_heci_gsc_init(xe);
> if (err)
> return err;
> @@ -1044,10 +1051,6 @@ int xe_device_probe(struct xe_device *xe)
> if (err)
> goto err_unregister_display;
>
> - err = xe_sysctrl_init(xe);
> - if (err)
> - goto err_unregister_display;
> -
> err = xe_device_sysfs_init(xe);
> if (err)
> goto err_unregister_display;
> diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
> index 2a31b430570e..c6836957dca7 100644
> --- a/drivers/gpu/drm/xe/xe_hw_error.c
> +++ b/drivers/gpu/drm/xe/xe_hw_error.c
> @@ -518,14 +518,6 @@ void xe_hw_error_irq_handler(struct xe_tile *tile, const u32 master_ctl)
> }
> }
>
> -static int hw_error_info_init(struct xe_device *xe)
> -{
> - if (xe->info.platform != XE_PVC)
> - return 0;
> -
> - return xe_drm_ras_init(xe);
> -}
> -
> /*
> * Process hardware errors during boot
> */
> @@ -552,16 +544,11 @@ static void process_hw_errors(struct xe_device *xe)
> void xe_hw_error_init(struct xe_device *xe)
> {
> struct xe_tile *tile = xe_device_get_root_tile(xe);
> - int ret;
>
> if (!IS_DGFX(xe) || IS_SRIOV_VF(xe))
> return;
>
> INIT_WORK(&tile->csc_hw_error_work, csc_hw_error_work);
>
> - ret = hw_error_info_init(xe);
> - if (ret)
> - drm_err(&xe->drm, "Failed to initialize XE DRM RAS (%pe)\n", ERR_PTR(ret));
> -
> process_hw_errors(xe);
> }
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> index 07f6837694e7..7d2945bb819e 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
> @@ -4,6 +4,7 @@
> */
>
> #include "xe_device.h"
> +#include "xe_drm_ras.h"
> #include "xe_pm.h"
> #include "xe_printk.h"
> #include "xe_ras.h"
> @@ -258,3 +259,22 @@ int xe_ras_clear_counter(struct xe_device *xe, enum drm_xe_ras_error_severity se
>
> return ret;
> }
> +
> +/**
> + * xe_ras_init - Initialize Xe RAS
> + * @xe: xe device instance
> + *
> + * Initialize Xe RAS
> + */
> +void xe_ras_init(struct xe_device *xe)
> +{
> + int ret;
> +
> + if (xe->info.platform != XE_PVC)
> + return;
> +
> + ret = xe_drm_ras_init(xe);
> + if (ret)
> + drm_err(&xe->drm, "Failed to initialize xe_drm_ras %d\n", ret);
Do we need this? xe_drm_ras_init() already does it for us.
Raag
> +}
> +
> diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
> index bbb9d42bd128..a06fb67dc882 100644
> --- a/drivers/gpu/drm/xe/xe_ras.h
> +++ b/drivers/gpu/drm/xe/xe_ras.h
> @@ -17,5 +17,6 @@ int xe_ras_get_counter(struct xe_device *xe, enum drm_xe_ras_error_severity seve
> u32 error_id, u32 *value);
> int xe_ras_clear_counter(struct xe_device *xe, enum drm_xe_ras_error_severity severity,
> u32 error_id);
> +void xe_ras_init(struct xe_device *xe);
>
> #endif
> --
> 2.47.1
>
next prev parent reply other threads:[~2026-05-11 15:36 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-04 6:56 [PATCH v5 0/6] Add get-error-counter and clear-error-counter support for CRI Riana Tauro
2026-05-04 6:43 ` ✗ CI.checkpatch: warning for Add get-error-counter and clear-error-counter support for CRI (rev4) Patchwork
2026-05-04 6:45 ` ✓ CI.KUnit: success " Patchwork
2026-05-04 6:56 ` [PATCH v5 1/6] drm/xe/uapi: Add additional error components to xe drm_ras Riana Tauro
2026-05-08 6:37 ` Mallesh, Koujalagi
2026-05-12 6:58 ` Tauro, Riana
2026-05-04 6:56 ` [PATCH v5 2/6] drm/xe/xe_ras: Add support to get error counter in CRI Riana Tauro
2026-05-06 8:03 ` Mallesh, Koujalagi
2026-05-06 8:59 ` Tauro, Riana
2026-05-11 15:27 ` Raag Jadav
2026-05-12 5:27 ` Tauro, Riana
2026-05-12 5:47 ` Raag Jadav
2026-05-13 8:43 ` Tauro, Riana
2026-05-04 6:56 ` [PATCH v5 3/6] drm/xe/xe_ras: Add helper to clear error counter Riana Tauro
2026-05-08 7:50 ` Mallesh, Koujalagi
2026-05-11 6:20 ` Tauro, Riana
2026-05-11 7:42 ` Mallesh, Koujalagi
2026-05-11 7:49 ` Tauro, Riana
2026-05-11 15:32 ` Raag Jadav
2026-05-12 6:48 ` Tauro, Riana
2026-05-04 6:56 ` [PATCH v5 4/6] drm/xe/xe_drm_ras: Wire get-error-counter and clear-error-counter support for CRI Riana Tauro
2026-05-11 15:34 ` Raag Jadav
2026-05-12 5:08 ` Tauro, Riana
2026-05-04 6:56 ` [PATCH v5 5/6] drm/xe/xe_ras: Move xe drm_ras registration Riana Tauro
2026-05-04 10:53 ` Tauro, Riana
2026-05-04 16:22 ` Raag Jadav
2026-05-12 5:04 ` Tauro, Riana
2026-05-12 16:19 ` Anoop Vijay
2026-05-11 15:36 ` Raag Jadav [this message]
2026-05-04 6:56 ` [PATCH v5 6/6] drm/xe/xe_ras: Control xe drm_ras registration with a flag Riana Tauro
2026-05-11 15:46 ` Raag Jadav
2026-05-04 8:00 ` ✓ Xe.CI.BAT: success for Add get-error-counter and clear-error-counter support for CRI (rev4) Patchwork
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