From: Matthew Brost <matthew.brost@intel.com>
To: "Lin, Shuicheng" <shuicheng.lin@intel.com>
Cc: "intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>
Subject: Re: [PATCH v6 20/24] drm/xe: Add ULLS migration job support to ring ops
Date: Thu, 24 Sep 2026 20:21:46 -0700 [thread overview]
Message-ID: <arXoyqKgiTMQbgHY@gsse-cloud1.jf.intel.com> (raw)
In-Reply-To: <DM4PR11MB5456BA1AE40A76C8036B9C21EA832@DM4PR11MB5456.namprd11.prod.outlook.com>
On Tue, Sep 22, 2026 at 05:07:54PM -0600, Lin, Shuicheng wrote:
> On Fri, Sep 4, 2026 2:16 PM Matthew Brost wrote:
> > Add preamble and postamble for ULLS migrations jobs. Preamble clears
> > current semaphore for reuse. Postamble waits on next semaphore which is set
> > upon next job submission, then advances the ring tail over that job with an LRI
> > to RING_TAIL, so submitting it costs the CPU nothing beyond signalling the
> > semaphore.
> >
> > A job updates the tail on behalf of a successor which has not been emitted yet,
> > so it cannot know how much ring that successor will occupy.
> > Pad every ULLS job out to a fixed ULLS_JOB_SIZE_BYTES, which makes the next
> > tail derivable from where the current job starts. The pad also supplies the
> > NOPs which must follow an in-ring tail update.
> >
> > The last ULLS migration job skips BB submission, the postamble and the tail
> > update (clear current semaphore, write seqno, exit ULLS), padding the
> > difference so that it still fills a job slot.
> >
> > Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> > Link: https://patch.msgid.link/20260228013501.106680-23-
> > matthew.brost@intel.com
> > Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
> > ---
> > drivers/gpu/drm/xe/xe_ring_ops.c | 86 ++++++++++++++++++++++++++
> > drivers/gpu/drm/xe/xe_ring_ops_types.h | 24 +++++++
> > 2 files changed, 110 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c
> > b/drivers/gpu/drm/xe/xe_ring_ops.c
> > index 39a670e91ba7..f05b4276c8d1 100644
> > --- a/drivers/gpu/drm/xe/xe_ring_ops.c
> > +++ b/drivers/gpu/drm/xe/xe_ring_ops.c
> > @@ -494,6 +494,79 @@ static void
> > __emit_job_gen12_render_compute(struct xe_sched_job *job,
> > xe_lrc_write_ring(lrc, dw, i * sizeof(*dw)); }
> >
> > +static int emit_ulls_preamble(struct xe_lrc *lrc, u32 *dw, int i, u32
> > +seqno) {
> > + u32 addr = xe_lrc_ulls_semaphore_ggtt_addr(lrc, seqno);
> > +
> > + return emit_store_imm_ggtt(addr,
> > LRC_MIGRATION_ULLS_SEMAPHORE_CLEAR,
> > + dw, i);
> > +}
> > +
> > +/*
> > + * Advance the ring tail from within the ring, so submitting the next
> > +ULLS job
> > + * needs nothing from the CPU beyond signalling the semaphore. All ULLS
> > +jobs
> > + * occupy exactly ULLS_JOB_SIZE_BYTES, so the tail the next job ends at
> > +is two
> > + * job slots on from where this job started, even though that job has
> > +not been
> > + * emitted yet.
> > + *
> > + * The saved tail is written before the tail register so that a context
> > +save
> > + * racing the pair can only restore a tail behind the register, never
> > +ahead of
> > + * it. The register write is deliberately not MI_LRI_FORCE_POSTED:
> > +posted, the
> > + * new tail can land after the command streamer has already drained
> > +this job,
> > + * at which point it sees an empty ring, parks, and can be taken off
> > +the
> > + * hardware with no H2G left to bring it back.
> > + *
> > + * The tail is published before the semaphore wait rather than after
> > +it, so
> > + * that the non-posted write drains while the engine is parked anyway
> > +instead
> > + * of adding a register round trip after the semaphore is signalled.
> > + */
> > +static int emit_ulls_ring_tail(struct xe_gt *gt, struct xe_lrc *lrc, u32 *dw,
> > + int i, u32 head)
> > +{
> > + u32 next_tail = (head + 2 * ULLS_JOB_SIZE_BYTES) & (lrc->ring.size -
> > +1);
> > +
> > + xe_gt_assert(gt, IS_ALIGNED(next_tail, 8));
> > +
> > + i = emit_store_imm_ggtt(xe_lrc_ring_tail_ggtt_addr(lrc), next_tail,
> > + dw, i);
> > +
> > + dw[i++] = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1) |
> > + MI_LRI_LRM_CS_MMIO;
> > + dw[i++] = RING_TAIL(0).addr;
> > + dw[i++] = next_tail;
> > +
> > + return i;
> > +}
> > +
> > +/* Publish the next job's tail, then park the engine on its semaphore
>
> One question, while tail is updated and the next job is not filled yet,
> Will HW prefetch the stale ring buffer?
> I assume it should not be an issue, just want to confirm it. Thanks.
>
When I changed from MMIO ring tail move to a ring instruction move, at
one point I disabled the pre-parser when I was chasing bugs here. It
doesn't appear to be needed - I believe the semaphore after this acts as
barrier in the ring prefetch for what I can tell.
Matt
> Rest LGTM. With the question be cleared:
> Reviewed-by: Shuicheng Lin <shuicheng.lin@intel.com>
>
>
> > +*/ static int emit_ulls_postamble(struct xe_gt *gt, struct xe_lrc *lrc, u32 *dw,
> > + int i, u32 seqno, u32 head)
> > +{
> > + i = emit_ulls_ring_tail(gt, lrc, dw, i, head);
> > +
> > + dw[i++] = MI_SEMAPHORE_WAIT |
> > + MI_SEMW_GGTT |
> > + MI_SEMW_POLL |
> > + MI_SEMW_COMPARE(SAD_EQ_SDD);
> > + dw[i++] = LRC_MIGRATION_ULLS_SEMAPHORE_SIGNAL;
> > + dw[i++] = xe_lrc_ulls_semaphore_ggtt_addr(lrc, seqno + 1);
> > + dw[i++] = 0;
> > + dw[i++] = 0;
> > +
> > + return i;
> > +}
> > +
> > +/* Pad out to the fixed ULLS job size */ static int
> > +emit_ulls_pad(struct xe_gt *gt, u32 *dw, int i) {
> > + xe_gt_assert(gt, i <= ULLS_JOB_SIZE_DW);
> > +
> > + while (i < ULLS_JOB_SIZE_DW)
> > + dw[i++] = MI_NOOP;
> > +
> > + return i;
> > +}
> > +
> > static void emit_migration_job_gen12(struct xe_sched_job *job,
> > struct xe_lrc *lrc, u32 *head,
> > u32 seqno)
> > @@ -507,10 +580,16 @@ static void emit_migration_job_gen12(struct
> > xe_sched_job *job,
> >
> > xe_gt_assert(gt, !job->ring_ops_force_reset);
> >
> > + if (xe_sched_job_is_ulls(job))
> > + i = emit_ulls_preamble(lrc, dw, i, seqno);
> > +
> > i = emit_copy_timestamp(xe, lrc, dw, i);
> >
> > i = emit_store_imm_ggtt(saddr, seqno, dw, i);
> >
> > + if (!xe_sched_job_ulls_has_batch(job))
> > + goto seqno_write;
> > +
> > dw[i++] = MI_ARB_ON_OFF | MI_ARB_DISABLE; /* Enabled again
> > below */
> >
> > i = emit_bb_start(job->ptrs[0].batch_addr, BIT(8), dw, i); @@ -521,12
> > +600,19 @@ static void emit_migration_job_gen12(struct xe_sched_job *job,
> >
> > i = emit_bb_start(job->ptrs[1].batch_addr, BIT(8), dw, i);
> >
> > +seqno_write:
> > i = emit_flush_imm_ggtt(xe_lrc_seqno_ggtt_addr(lrc), seqno,
> > job->migrate_flush_flags,
> > dw, i);
> >
> > i = emit_user_interrupt(dw, i);
> >
> > + if (xe_sched_job_ulls_parks(job))
> > + i = emit_ulls_postamble(gt, lrc, dw, i, seqno, *head);
> > +
> > + if (xe_sched_job_is_ulls(job))
> > + i = emit_ulls_pad(gt, dw, i);
> > +
> > xe_gt_assert(job->q->gt, i <= MAX_JOB_SIZE_DW);
> >
> > xe_lrc_write_ring(lrc, dw, i * sizeof(*dw)); diff --git
> > a/drivers/gpu/drm/xe/xe_ring_ops_types.h
> > b/drivers/gpu/drm/xe/xe_ring_ops_types.h
> > index 52ff96bc4100..ea4af321dd7c 100644
> > --- a/drivers/gpu/drm/xe/xe_ring_ops_types.h
> > +++ b/drivers/gpu/drm/xe/xe_ring_ops_types.h
> > @@ -6,6 +6,7 @@
> > #ifndef _XE_RING_OPS_TYPES_H_
> > #define _XE_RING_OPS_TYPES_H_
> >
> > +#include <linux/build_bug.h>
> > #include <linux/types.h>
> >
> > struct xe_gt;
> > @@ -14,6 +15,29 @@ struct xe_sched_job;
> > #define MAX_JOB_SIZE_DW 74
> > #define MAX_JOB_SIZE_BYTES (MAX_JOB_SIZE_DW * 4)
> >
> > +/*
> > + * ULLS migration jobs advance the ring tail from within the ring
> > +itself, so a
> > + * job has to know where its successor will end before that successor
> > +has been
> > + * emitted. Every ULLS job is therefore padded to a fixed size, letting
> > +the
> > + * next tail be derived arithmetically.
> > + *
> > + * Sized for the largest such job, emitted by emit_migration_job_gen12():
> > + * preamble (4), copy timestamp (8, its size on an SRIOV VF), start
> > +seqno
> > + * store (4), arbitration off (1), batch buffer starts (2 * 3),
> > +pre-parser
> > + * bracketed flush invalidate (6), seqno flush (4), user interrupt (3)
> > +and
> > + * postamble (7 + 5).
> > + */
> > +#define ULLS_JOB_SIZE_DW 48
> > +#define ULLS_JOB_SIZE_BYTES (ULLS_JOB_SIZE_DW * 4)
> > +
> > +/*
> > + * RING_TAIL only encodes a qword aligned offset, and
> > +xe_lrc_write_ring()
> > + * appends a NOP to anything shorter, either of which would
> > +desynchronise the
> > + * ring from the tail a job predicts for its successor.
> > + */
> > +static_assert(ULLS_JOB_SIZE_BYTES % 8 == 0);
> > +static_assert(ULLS_JOB_SIZE_DW <= MAX_JOB_SIZE_DW);
> > +
> > /**
> > * struct xe_ring_ops - Ring operations
> > */
> > --
> > 2.34.1
>
next prev parent reply other threads:[~2026-09-25 3:22 UTC|newest]
Thread overview: 71+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-04 21:15 [PATCH v6 00/24] CPU binds and ULLS on migration queue Matthew Brost
2026-09-04 21:15 ` [PATCH v6 01/24] drm/xe: Drop struct xe_migrate_pt_update argument from populate/clear vfuns Matthew Brost
2026-09-04 21:15 ` [PATCH v6 02/24] drm/xe: Add xe_migrate_update_pgtables_cpu_execute helper Matthew Brost
2026-09-04 21:28 ` sashiko-bot
2026-09-04 21:15 ` [PATCH v6 03/24] drm/xe: Decouple exec queue idle check from LRC Matthew Brost
2026-09-04 21:15 ` [PATCH v6 04/24] drm/xe: Add job count to GuC exec queue snapshot Matthew Brost
2026-09-04 21:23 ` sashiko-bot
2026-09-04 21:15 ` [PATCH v6 05/24] drm/xe: Update xe_bo_put_deferred arguments to include writeback flag Matthew Brost
2026-09-04 21:15 ` [PATCH v6 06/24] drm/xe: Add XE_BO_FLAG_PUT_VM_ASYNC Matthew Brost
2026-09-04 21:33 ` sashiko-bot
2026-09-11 13:10 ` Francois Dugast
2026-09-11 19:54 ` Matthew Brost
2026-09-12 0:27 ` Matthew Brost
2026-09-04 21:15 ` [PATCH v6 07/24] drm/xe: Update scheduler job layer to support PT jobs Matthew Brost
2026-09-04 21:37 ` sashiko-bot
2026-09-11 15:24 ` Francois Dugast
2026-09-11 19:25 ` Matthew Brost
2026-09-04 21:15 ` [PATCH v6 08/24] drm/xe: Add helpers to access PT ops Matthew Brost
2026-09-04 21:15 ` [PATCH v6 09/24] drm/xe: Add struct xe_pt_job_ops Matthew Brost
2026-09-04 21:40 ` sashiko-bot
2026-09-21 11:07 ` Ghimiray, Himal Prasad
2026-09-04 21:15 ` [PATCH v6 10/24] drm/xe: Update GuC submission backend to run PT jobs Matthew Brost
2026-09-04 21:39 ` sashiko-bot
2026-09-21 11:55 ` Ghimiray, Himal Prasad
2026-09-21 17:50 ` Matthew Brost
2026-09-04 21:16 ` [PATCH v6 11/24] drm/xe: Store level in struct xe_vm_pgtable_update Matthew Brost
2026-09-21 12:53 ` Ghimiray, Himal Prasad
2026-09-04 21:16 ` [PATCH v6 12/24] drm/xe: Don't use migrate exec queue for page fault binds Matthew Brost
2026-09-21 13:12 ` Ghimiray, Himal Prasad
2026-09-04 21:16 ` [PATCH v6 13/24] drm/xe: Enable CPU binds for jobs Matthew Brost
2026-09-04 21:44 ` sashiko-bot
2026-09-21 13:41 ` Ghimiray, Himal Prasad
2026-09-24 22:48 ` Matthew Brost
2026-09-04 21:16 ` [PATCH v6 14/24] drm/xe: Remove unused arguments from xe_migrate_pt_update_ops Matthew Brost
2026-09-19 0:13 ` Lin, Shuicheng
2026-09-04 21:16 ` [PATCH v6 15/24] drm/xe: Make bind queues operate cross-tile Matthew Brost
2026-09-19 3:06 ` Lin, Shuicheng
2026-09-04 21:16 ` [PATCH v6 16/24] drm/xe: Add CPU bind layer Matthew Brost
2026-09-04 21:50 ` sashiko-bot
2026-09-21 16:44 ` Ghimiray, Himal Prasad
2026-09-21 20:20 ` Lin, Shuicheng
2026-09-04 21:16 ` [PATCH v6 17/24] drm/xe: Add device flag to enable PT mirroring across tiles Matthew Brost
2026-09-04 21:40 ` sashiko-bot
2026-09-21 17:03 ` Ghimiray, Himal Prasad
2026-09-25 3:11 ` Matthew Brost
2026-09-21 17:02 ` Ghimiray, Himal Prasad
2026-09-04 21:16 ` [PATCH v6 18/24] drm/xe: Add ULLS support to LRC Matthew Brost
2026-09-23 7:01 ` Ghimiray, Himal Prasad
2026-09-04 21:16 ` [PATCH v6 19/24] drm/xe: Add ULLS migration job support to migration layer Matthew Brost
2026-09-04 21:40 ` sashiko-bot
2026-09-04 21:16 ` [PATCH v6 20/24] drm/xe: Add ULLS migration job support to ring ops Matthew Brost
2026-09-22 23:07 ` Lin, Shuicheng
2026-09-25 3:21 ` Matthew Brost [this message]
2026-09-23 8:47 ` Ghimiray, Himal Prasad
2026-09-04 21:16 ` [PATCH v6 21/24] drm/xe: Add ULLS migration job support to GuC submission Matthew Brost
2026-09-22 20:46 ` Lin, Shuicheng
2026-09-23 8:49 ` Ghimiray, Himal Prasad
2026-09-04 21:16 ` [PATCH v6 22/24] drm/xe: Enter ULLS for migration jobs upon page fault or SVM prefetch Matthew Brost
2026-09-22 16:39 ` Lin, Shuicheng
2026-09-23 8:52 ` Ghimiray, Himal Prasad
2026-09-04 21:16 ` [PATCH v6 23/24] drm/xe: Add modparam to enable / disable ULLS on migrate queue Matthew Brost
2026-09-09 8:03 ` Thomas Hellström
2026-09-09 18:11 ` Matthew Brost
2026-09-19 2:13 ` Lin, Shuicheng
2026-09-04 21:16 ` [PATCH v6 24/24] drm/xe: Document ULLS for migration jobs Matthew Brost
2026-09-09 9:01 ` Thomas Hellström
2026-09-09 17:53 ` Matthew Brost
2026-09-04 21:24 ` ✗ CI.checkpatch: warning for CPU binds and ULLS on migration queue (rev8) Patchwork
2026-09-04 21:26 ` ✓ CI.KUnit: success " Patchwork
2026-09-04 22:16 ` ✓ Xe.CI.BAT: " Patchwork
2026-09-05 3:34 ` ✗ Xe.CI.FULL: failure " Patchwork
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