[PATCH 00/11] Allow boot with only media GT

[PATCH 00/11] Allow boot with only media GT

[Stuart Summers]

There is a configfs right now which allows enabling either the
media GT, the primary GT, both, or neither. The driver right now
cannot load without a primary GT though. For debug purposes, it
can be interesting to load with only a media GT though. This of
course means we lose access to blitter and a lot of the core functions.

This series attempts to cover the most basic scenarios needed to
support a media-only configuration by splitting the handle_gmdids
function, adding proper NULL handling and reworking some of the
root_tile logic. With media we can't use flat_ccs or
resizeable bar. These are as much as possible split into separate
patches to help with reviewability.

I tested this on CRI in each combination of media, primary, and both.
The configuration without either GT is still not supported and the
probe will fail. But at least now the driver load can complete
with only the media GT.

In addition to the split, there is a patch here which also starts
checking the GU_CNTL register for IP presense. This is interesting
because, particularly for debugging, we can fuse off one or both
GTs and we still want the driver to comprehend that at runtime. Of
course the VF can't access this register so it still spins off of
the GMD ID. I confirmed that the GMD ID reads out as 0 when the
media is fused off since it is powered down.

Note that while CPU copies used for migrations and page table updates
when only media GT is enabled, instead of reworking the migration
structure to move the VM out of the migration queue and back into
the migration structure itself, I decided for now to just add a
kind of "fake" engine (just VDBOX class). This isn't actually
expected to work, but since we're doing CPU copies it shouldn't
matter. Hoping to get some review feedback here before doing too much
extensive refactoring here. I can look there if this isn't acceptable
though.

I used claude opus 5 through the process here.

Stuart Summers (11):
  drm/xe: Detect each GMD_ID IP in a loop
  drm/xe: Tolerate a missing graphics IP in xe_info_init()
  drm/xe: Verify IP presence against GU_CNTL
  drm/xe: Guard per-tile primary GT accesses
  drm/xe: Stop assuming the root tile has a primary GT
  drm/xe: Do not claim flat CCS without a graphics IP
  drm/xe: Run page table updates on the media GT when there is no
    primary
  drm/xe: Document that gt_types_allowed=media now probes
  drm/xe: Fall back to CPU copies when the tile cannot blit
  drm/xe: Require a fully visible VRAM BAR without a primary GT
  drm/xe: Allow probe without a primary GT

 drivers/gpu/drm/xe/regs/xe_regs.h  |   2 +
 drivers/gpu/drm/xe/xe_bo.c         |  43 +++++---
 drivers/gpu/drm/xe/xe_configfs.c   |   7 +-
 drivers/gpu/drm/xe/xe_device.h     |  16 +++
 drivers/gpu/drm/xe/xe_exec_queue.c |   5 +-
 drivers/gpu/drm/xe/xe_gt.c         |  11 +-
 drivers/gpu/drm/xe/xe_memirq.c     |   9 +-
 drivers/gpu/drm/xe/xe_migrate.c    |  45 ++++++---
 drivers/gpu/drm/xe/xe_migrate.h    |   2 +
 drivers/gpu/drm/xe/xe_oa.c         |  24 ++++-
 drivers/gpu/drm/xe/xe_pagefault.c  |   4 +-
 drivers/gpu/drm/xe/xe_pci.c        | 156 +++++++++++++++++++----------
 drivers/gpu/drm/xe/xe_query.c      |   3 +-
 drivers/gpu/drm/xe/xe_tile.h       |  32 ++++++
 drivers/gpu/drm/xe/xe_tlb_inval.c  |  41 ++++----
 drivers/gpu/drm/xe/xe_vm.c         |   2 +-
 drivers/gpu/drm/xe/xe_vram.c       |  15 +++
 17 files changed, 295 insertions(+), 122 deletions(-)

-- 
2.43.0

[PATCH 01/11] drm/xe: Detect each GMD_ID IP in a loop

[Stuart Summers]

handle_gmdid() open coded the graphics and media detection twice, with
the two copies subtly disagreeing: a missing media IP was tolerated,
while graphics reporting version 0 was reported as an unknown version.

Describe the per IP differences in a small table and walk it, so both
IPs are detected the same way and an absent IP of either kind simply
leaves its descriptor NULL. Deciding whether the resulting combination
is usable is left to the caller, which is unchanged in still demanding
a graphics IP.

Signed-off-by: Stuart Summers <stuart.summers@intel.com>
---
 drivers/gpu/drm/xe/xe_pci.c | 70 ++++++++++++++++++++++---------------
 1 file changed, 42 insertions(+), 28 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index ba23ec60477b..a59bb1c9b478 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -704,9 +704,21 @@ static const struct xe_ip *find_media_ip(unsigned int verx100)
 	return NULL;
 }
 
+static const struct xe_gmdid_desc {
+	const char *name;
+	const struct xe_ip *(*find_ip)(unsigned int verx100);
+} gmdid_descs[] = {
+	[GMDID_GRAPHICS] = { "graphics", find_graphics_ip },
+	[GMDID_MEDIA] = { "media", find_media_ip },
+};
+
 /*
  * Read IP version from hardware and select graphics/media IP descriptors
  * based on the result.
+ *
+ * Each IP is detected independently and any of them may legitimately be fused
+ * off or otherwise absent, in which case its descriptor is left NULL.  Deciding
+ * whether the resulting combination is usable is up to the caller.
  */
 static int handle_gmdid(struct xe_device *xe,
 			const struct xe_ip **graphics_ip,
@@ -714,36 +726,38 @@ static int handle_gmdid(struct xe_device *xe,
 			u32 *graphics_revid,
 			u32 *media_revid)
 {
-	u32 ver;
-	int ret;
-
-	*graphics_ip = NULL;
-	*media_ip = NULL;
-
-	ret = read_gmdid(xe, GMDID_GRAPHICS, &ver, graphics_revid);
-	if (ret)
-		return ret;
-
-	*graphics_ip = find_graphics_ip(ver);
-	if (!*graphics_ip) {
-		xe_log_err(xe, REGS, -EINVAL,
-			   "Hardware reports unknown graphics version %u.%02u\n",
-			   ver / 100, ver % 100);
-	}
-
-	ret = read_gmdid(xe, GMDID_MEDIA, &ver, media_revid);
-	if (ret)
-		return ret;
+	const struct xe_ip **ips[] = {
+		[GMDID_GRAPHICS] = graphics_ip,
+		[GMDID_MEDIA] = media_ip,
+	};
+	u32 *revids[] = {
+		[GMDID_GRAPHICS] = graphics_revid,
+		[GMDID_MEDIA] = media_revid,
+	};
+
+	for (enum xe_gmdid_type type = 0; type < ARRAY_SIZE(gmdid_descs); type++) {
+		const struct xe_gmdid_desc *desc = &gmdid_descs[type];
+		u32 ver;
+		int ret;
+
+		*ips[type] = NULL;
+		*revids[type] = 0;
+
+		ret = read_gmdid(xe, type, &ver, revids[type]);
+		if (ret)
+			return ret;
 
-	/* Media may legitimately be fused off / not present */
-	if (ver == 0)
-		return 0;
+		/* The IP may legitimately be fused off / not present */
+		if (!ver) {
+			*revids[type] = 0;
+			continue;
+		}
 
-	*media_ip = find_media_ip(ver);
-	if (!*media_ip) {
-		xe_log_err(xe, REGS, -EINVAL,
-			   "Hardware reports unknown media version %u.%02u\n",
-			   ver / 100, ver % 100);
+		*ips[type] = desc->find_ip(ver);
+		if (!*ips[type])
+			xe_log_err(xe, REGS, -EINVAL,
+				   "Hardware reports unknown %s version %u.%02u\n",
+				   desc->name, ver / 100, ver % 100);
 	}
 
 	return 0;
-- 
2.43.0

[PATCH 02/11] drm/xe: Tolerate a missing graphics IP in xe_info_init()

[Stuart Summers]

A device without a graphics IP is still rejected a few lines further
down, but handle_gmdid() can already hand back a NULL graphics_ip, so
stop dereferencing it unconditionally and mirror what is done for media
instead. alloc_primary_gt() gets the same treatment, since it reads the
descriptor for every field it fills in.

No functional change: the graphics IP is still required.

Signed-off-by: Stuart Summers <stuart.summers@intel.com>
---
 drivers/gpu/drm/xe/xe_pci.c | 31 +++++++++++++++++++++----------
 1 file changed, 21 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index a59bb1c9b478..34e8ffeeeb09 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -902,6 +902,9 @@ static struct xe_gt *alloc_primary_gt(struct xe_tile *tile,
 	struct xe_device *xe = tile_to_xe(tile);
 	struct xe_gt *gt;
 
+	if (!graphics_desc)
+		return NULL;
+
 	if (!xe_configfs_primary_gt_allowed(to_pci_dev(xe->drm.dev))) {
 		xe_tile_info(tile, "Primary GT disabled via configfs\n");
 		return NULL;
@@ -1054,9 +1057,14 @@ static int xe_info_init(struct xe_device *xe,
 	xe->info.step.graphics = probed_info->step.graphics;
 	xe->info.step.media = probed_info->step.media;
 
-	xe->info.graphics_verx100 = graphics_ip->verx100;
-	xe->info.graphics_name = graphics_ip->name;
-	graphics_desc = graphics_ip->desc;
+	if (graphics_ip) {
+		xe->info.graphics_verx100 = graphics_ip->verx100;
+		xe->info.graphics_name = graphics_ip->name;
+		graphics_desc = graphics_ip->desc;
+	} else {
+		xe->info.graphics_name = "none";
+		graphics_desc = NULL;
+	}
 
 	if (media_ip) {
 		xe->info.media_verx100 = media_ip->verx100;
@@ -1067,16 +1075,19 @@ static int xe_info_init(struct xe_device *xe,
 		media_desc = NULL;
 	}
 
-	xe->info.has_access_counter = graphics_desc->has_access_counter;
-	xe->info.has_asid = graphics_desc->has_asid;
-	xe->info.has_atomic_enable_pte_bit = graphics_desc->has_atomic_enable_pte_bit;
+	if (graphics_desc) {
+		xe->info.has_access_counter = graphics_desc->has_access_counter;
+		xe->info.has_asid = graphics_desc->has_asid;
+		xe->info.has_atomic_enable_pte_bit = graphics_desc->has_atomic_enable_pte_bit;
+		xe->info.has_range_tlb_inval = graphics_desc->has_range_tlb_inval;
+		xe->info.has_ctx_tlb_inval = graphics_desc->has_ctx_tlb_inval;
+		xe->info.has_usm = graphics_desc->has_usm;
+		xe->info.has_64bit_timestamp = graphics_desc->has_64bit_timestamp;
+	}
+
 	if (xe->info.platform != XE_PVC)
 		xe->info.has_device_atomics_on_smem = 1;
 
-	xe->info.has_range_tlb_inval = graphics_desc->has_range_tlb_inval;
-	xe->info.has_ctx_tlb_inval = graphics_desc->has_ctx_tlb_inval;
-	xe->info.has_usm = graphics_desc->has_usm;
-	xe->info.has_64bit_timestamp = graphics_desc->has_64bit_timestamp;
 	xe->info.has_mem_copy_instr = GRAPHICS_VER(xe) >= 20;
 
 	if (IS_SRIOV_VF(xe)) {
-- 
2.43.0

[PATCH 03/11] drm/xe: Verify IP presence against GU_CNTL

[Stuart Summers]

GMD_ID is the only thing consulted today to decide whether the graphics
and media IPs exist. Hardware also fuses presence bits into
GU_CNTL_PROTECTED, so check GTPresent and IMPresent as a second level of
verification and leave an IP alone when the two disagree.

Either IP can be dropped this way without failing driver load: an IP
hardware says is absent is simply not detected, which is the same state
as it reporting version 0, and probe then applies the usual rule that
at least one IP has to be left.

VFs have no access to the register, so they keep going by GMD_ID alone.

Signed-off-by: Stuart Summers <stuart.summers@intel.com>
---
 drivers/gpu/drm/xe/regs/xe_regs.h |  2 ++
 drivers/gpu/drm/xe/xe_pci.c       | 28 ++++++++++++++++++++++++++--
 2 files changed, 28 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/regs/xe_regs.h b/drivers/gpu/drm/xe/regs/xe_regs.h
index 437485b5a0af..5f2c8d348451 100644
--- a/drivers/gpu/drm/xe/regs/xe_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_regs.h
@@ -12,6 +12,8 @@
 #define SOC_BASE				0x280000
 
 #define GU_CNTL_PROTECTED			XE_REG(0x10100C)
+#define   GT_PRESENT				REG_BIT(8)
+#define   IM_PRESENT				REG_BIT(10)
 #define   DRIVERINT_FLR_DIS			REG_BIT(31)
 
 #define GU_CNTL					XE_REG(0x101010)
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 34e8ffeeeb09..f2a4aed1dfe2 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -706,12 +706,28 @@ static const struct xe_ip *find_media_ip(unsigned int verx100)
 
 static const struct xe_gmdid_desc {
 	const char *name;
+	u32 present;
 	const struct xe_ip *(*find_ip)(unsigned int verx100);
 } gmdid_descs[] = {
-	[GMDID_GRAPHICS] = { "graphics", find_graphics_ip },
-	[GMDID_MEDIA] = { "media", find_media_ip },
+	[GMDID_GRAPHICS] = { "graphics", GT_PRESENT, find_graphics_ip },
+	[GMDID_MEDIA] = { "media", IM_PRESENT, find_media_ip },
 };
 
+/*
+ * Besides the IP version in GMD_ID, hardware reports whether an IP is present
+ * at all through the fuse backed presence bits in GU_CNTL_PROTECTED.  Use
+ * those as a second level of verification, so an IP hardware says is not there
+ * is left alone whatever GMD_ID claims.
+ */
+static bool gt_fused(struct xe_device *xe, u32 present)
+{
+	/* VFs have no access to GU_CNTL_PROTECTED, so go by GMD_ID alone */
+	if (IS_SRIOV_VF(xe))
+		return false;
+
+	return !(xe_mmio_read32(xe_root_tile_mmio(xe), GU_CNTL_PROTECTED) & present);
+}
+
 /*
  * Read IP version from hardware and select graphics/media IP descriptors
  * based on the result.
@@ -753,6 +769,14 @@ static int handle_gmdid(struct xe_device *xe,
 			continue;
 		}
 
+		if (gt_fused(xe, desc->present)) {
+			xe_log_info(xe, REGS,
+				    "Hardware reports the %s IP is not present, ignoring version %u.%02u\n",
+				    desc->name, ver / 100, ver % 100);
+			*revids[type] = 0;
+			continue;
+		}
+
 		*ips[type] = desc->find_ip(ver);
 		if (!*ips[type])
 			xe_log_err(xe, REGS, -EINVAL,
-- 
2.43.0

[PATCH 04/11] drm/xe: Guard per-tile primary GT accesses

[Stuart Summers]

A tile's primary GT is now optional, just like its media GT already was.
The TLB invalidation and memory interrupt paths walk both GTs of a tile
but only test the media one for presence, so they would dereference NULL
on a device whose graphics IP is absent.  Mirror the existing media
checks for the primary GT.

Signed-off-by: Stuart Summers <stuart.summers@intel.com>
---
 drivers/gpu/drm/xe/xe_memirq.c    |  9 +++----
 drivers/gpu/drm/xe/xe_tlb_inval.c | 41 ++++++++++++++++---------------
 2 files changed, 25 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_memirq.c b/drivers/gpu/drm/xe/xe_memirq.c
index 3433518cc095..315f28661c63 100644
--- a/drivers/gpu/drm/xe/xe_memirq.c
+++ b/drivers/gpu/drm/xe/xe_memirq.c
@@ -578,16 +578,15 @@ void xe_memirq_handler(struct xe_memirq *memirq)
 
 	/* GuC and media GuC (if present) must be checked separately */
 
-	if (memirq_received(memirq, &memirq->source, ilog2(INTR_GUC), "SRC")) {
+	if (tile->primary_gt &&
+	    memirq_received(memirq, &memirq->source, ilog2(INTR_GUC), "SRC")) {
 		map = IOSYS_MAP_INIT_OFFSET(&memirq->bo->vmap,
 					    XE_MEMIRQ_VECTOR_OFFSET(0, ilog2(INTR_GUC)));
 		memirq_dispatch_guc(memirq, &map, &tile->primary_gt->uc.guc);
 	}
 
-	if (!tile->media_gt)
-		return;
-
-	if (memirq_received(memirq, &memirq->source, ilog2(INTR_MGUC), "SRC")) {
+	if (tile->media_gt &&
+	    memirq_received(memirq, &memirq->source, ilog2(INTR_MGUC), "SRC")) {
 		map = IOSYS_MAP_INIT_OFFSET(&memirq->bo->vmap,
 					    XE_MEMIRQ_VECTOR_OFFSET(0, ilog2(INTR_MGUC)));
 		memirq_dispatch_guc(memirq, &map, &tile->media_gt->uc.guc);
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.c b/drivers/gpu/drm/xe/xe_tlb_inval.c
index c9cc5842d65b..32b62b76e6b0 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval.c
+++ b/drivers/gpu/drm/xe/xe_tlb_inval.c
@@ -624,28 +624,29 @@ int xe_tlb_inval_range_tilemask_submit(struct xe_device *xe, u32 asid,
 		if (!(tile_mask & BIT(id)))
 			continue;
 
-		xe_tlb_inval_fence_init(&tile->primary_gt->tlb_inval,
-					&fence[fence_id], true);
-
-		err = xe_tlb_inval_range(&tile->primary_gt->tlb_inval,
-					 &fence[fence_id], start, end,
-					 asid, NULL);
-		if (err)
-			goto wait;
-		++fence_id;
-
-		if (!tile->media_gt)
-			continue;
+		if (tile->primary_gt) {
+			xe_tlb_inval_fence_init(&tile->primary_gt->tlb_inval,
+						&fence[fence_id], true);
+
+			err = xe_tlb_inval_range(&tile->primary_gt->tlb_inval,
+						 &fence[fence_id], start, end,
+						 asid, NULL);
+			if (err)
+				goto wait;
+			++fence_id;
+		}
 
-		xe_tlb_inval_fence_init(&tile->media_gt->tlb_inval,
-					&fence[fence_id], true);
+		if (tile->media_gt) {
+			xe_tlb_inval_fence_init(&tile->media_gt->tlb_inval,
+						&fence[fence_id], true);
 
-		err = xe_tlb_inval_range(&tile->media_gt->tlb_inval,
-					 &fence[fence_id], start, end,
-					 asid, NULL);
-		if (err)
-			goto wait;
-		++fence_id;
+			err = xe_tlb_inval_range(&tile->media_gt->tlb_inval,
+						 &fence[fence_id], start, end,
+						 asid, NULL);
+			if (err)
+				goto wait;
+			++fence_id;
+		}
 	}
 
 wait:
-- 
2.43.0

[PATCH 05/11] drm/xe: Stop assuming the root tile has a primary GT

[Stuart Summers]

A handful of device level consumers reach for xe_root_mmio_gt() to get at
state that merely happens to be hung off a GT - the GuC firmware version,
GT stats counters and the default OA unit - and dereference it without a
NULL check.  None of them touch MMIO, so none of them actually need the
primary GT; they just need some GT.

Add xe_device_any_gt(), which falls back to the root tile's media GT, and
use it in those places.  For OA, walk the GTs instead so the default unit
is the first one that exists, which keeps it OA unit 0 as the uapi
promises.

Signed-off-by: Stuart Summers <stuart.summers@intel.com>
---
 drivers/gpu/drm/xe/xe_device.h    | 16 ++++++++++++++++
 drivers/gpu/drm/xe/xe_oa.c        | 24 ++++++++++++++++++++++--
 drivers/gpu/drm/xe/xe_pagefault.c |  4 ++--
 drivers/gpu/drm/xe/xe_query.c     |  3 ++-
 drivers/gpu/drm/xe/xe_vm.c        |  2 +-
 5 files changed, 43 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
index 6df60edcb8f8..3d0282822f17 100644
--- a/drivers/gpu/drm/xe/xe_device.h
+++ b/drivers/gpu/drm/xe/xe_device.h
@@ -109,6 +109,22 @@ static inline struct xe_gt *xe_root_mmio_gt(struct xe_device *xe)
 	return xe_device_get_root_tile(xe)->primary_gt;
 }
 
+/*
+ * Provide a GT structure for device level state that happens to be hung off a
+ * GT but is not specific to one, such as GuC firmware versions or OA units.
+ * Unlike xe_root_mmio_gt(), this never returns NULL: the root tile always has
+ * at least one GT, even when the graphics IP is absent.  It must not be used
+ * for MMIO, since the media GT needs GSI offset translation.
+ *
+ * Returns the primary GT of the root tile, or its media GT if there is none.
+ */
+static inline struct xe_gt *xe_device_any_gt(struct xe_device *xe)
+{
+	struct xe_tile *tile = xe_device_get_root_tile(xe);
+
+	return tile->primary_gt ?: tile->media_gt;
+}
+
 static inline struct xe_mmio *xe_root_tile_mmio(struct xe_device *xe)
 {
 	return &xe->tiles[0].mmio;
diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
index 838802482ada..05beb156c941 100644
--- a/drivers/gpu/drm/xe/xe_oa.c
+++ b/drivers/gpu/drm/xe/xe_oa.c
@@ -2041,6 +2041,23 @@ static int xe_oa_assign_hwe(struct xe_oa *oa, struct xe_oa_open_param *param)
 	return ret;
 }
 
+/*
+ * OA unit IDs are handed out in GT iteration order, so the first unit of the
+ * first GT that has one is OA unit 0. The primary GT may be absent, in which
+ * case unit 0 lives on the media GT.
+ */
+static struct xe_oa_unit *xe_oa_first_unit(struct xe_device *xe)
+{
+	struct xe_gt *gt;
+	u8 id;
+
+	for_each_gt(gt, xe, id)
+		if (gt->oa.num_oa_units)
+			return &gt->oa.oa_unit[0];
+
+	return NULL;
+}
+
 /**
  * xe_oa_stream_open_ioctl - Opens an OA stream
  * @dev: @drm_device
@@ -2073,8 +2090,11 @@ int xe_oa_stream_open_ioctl(struct drm_device *dev, u64 data, struct drm_file *f
 		return ret;
 
 	/* If not provided, OA unit defaults to OA unit 0 as per uapi */
-	if (!param.oa_unit)
-		param.oa_unit = &xe_root_mmio_gt(oa->xe)->oa.oa_unit[0];
+	if (!param.oa_unit) {
+		param.oa_unit = xe_oa_first_unit(oa->xe);
+		if (XE_IOCTL_DBG(xe, !param.oa_unit))
+			return -ENODEV;
+	}
 
 	if (param.exec_queue_id > 0) {
 		/* An exec_queue is only needed for OAR/OAC functionality on OAG */
diff --git a/drivers/gpu/drm/xe/xe_pagefault.c b/drivers/gpu/drm/xe/xe_pagefault.c
index 98cce0f12b12..e1058d52abd9 100644
--- a/drivers/gpu/drm/xe/xe_pagefault.c
+++ b/drivers/gpu/drm/xe/xe_pagefault.c
@@ -547,7 +547,7 @@ static bool xe_pagefault_queue_pop(struct xe_pagefault_queue *pf_queue,
 			continue;
 
 		if (cache_start != XE_PAGEFAULT_CACHE_START_INVALID) {
-			xe_gt_stats_incr(xe_root_mmio_gt(xe),
+			xe_gt_stats_incr(xe_device_any_gt(xe),
 					 XE_GT_STATS_ID_PARALLEL_PAGEFAULT_COUNT,
 					 1);
 			break;
@@ -759,7 +759,7 @@ static void xe_pagefault_queue_work(struct work_struct *w)
 	}
 #undef USM_QUEUE_MAX_RUNTIME_MS
 
-	xe_gt_stats_incr(xe_root_mmio_gt(xe), XE_GT_STATS_ID_PAGEFAULT_US,
+	xe_gt_stats_incr(xe_device_any_gt(xe), XE_GT_STATS_ID_PAGEFAULT_US,
 			 xe_gt_stats_ktime_us_delta(start));
 }
 
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index dc975f595368..01433ae09130 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -592,7 +592,8 @@ query_uc_fw_version(struct xe_device *xe, struct drm_xe_device_query *query)
 
 	switch (resp.uc_type) {
 	case XE_QUERY_UC_TYPE_GUC_SUBMISSION: {
-		struct xe_guc *guc = &xe->tiles[0].primary_gt->uc.guc;
+		struct xe_gt *gt = xe_device_any_gt(xe);
+		struct xe_guc *guc = &gt->uc.guc;
 
 		version = &guc->fw.versions.found[XE_UC_FW_VER_COMPATIBILITY];
 		break;
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index a26f6b20a22e..cd9f7589c4c2 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -1706,7 +1706,7 @@ static void xe_vm_init_prove_locking(struct xe_device *xe, struct xe_vm *vm)
 	fs_reclaim_release(GFP_KERNEL);
 
 	down_read(&vm->exec_queues.lock);
-	might_lock(&xe_root_mmio_gt(xe)->uc.guc.ct.lock);
+	might_lock(&xe_device_any_gt(xe)->uc.guc.ct.lock);
 	up_read(&vm->exec_queues.lock);
 }
 
-- 
2.43.0

Re: [PATCH 05/11] drm/xe: Stop assuming the root tile has a primary GT

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found no new issues
in this patch, but noticed 1 related pre-existing issue it does not
introduce:
- [Medium] drm/xe/oa: incorrect GRAPHICS_VER check in
  xe_oa_enable_metric_set() [1]
--

commit 60c4b3494beccd5ac07590503398e4dda529a384
Author: Stuart Summers <stuart.summers@intel.com>

drm/xe: Stop assuming the root tile has a primary GT

This commit introduces xe_device_any_gt() and xe_oa_first_unit() so that
device-level consumers and OA stream open do not assume the root tile has
a primary GT.

> diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
> index 838802482adaf..05beb156c941a 100644
> --- a/drivers/gpu/drm/xe/xe_oa.c
> +++ b/drivers/gpu/drm/xe/xe_oa.c
> @@ -2041,6 +2041,23 @@ static int xe_oa_assign_hwe(struct xe_oa *oa, struct xe_oa_open_param *param)
>  	return ret;
>  }
>  
> +/*
> + * OA unit IDs are handed out in GT iteration order, so the first unit of the
> + * first GT that has one is OA unit 0. The primary GT may be absent, in which
> + * case unit 0 lives on the media GT.
> + */
> +static struct xe_oa_unit *xe_oa_first_unit(struct xe_device *xe)
> +{
> +	struct xe_gt *gt;
> +	u8 id;
> +
> +	for_each_gt(gt, xe, id)
> +		if (gt->oa.num_oa_units)
> +			return &gt->oa.oa_unit[0];
> +
> +	return NULL;
> +}
> +
>  /**
>   * xe_oa_stream_open_ioctl - Opens an OA stream
>   * @dev: @drm_device
> @@ -2073,8 +2090,11 @@ int xe_oa_stream_open_ioctl(struct drm_device *dev, u64 data, struct drm_file *f
>  		return ret;
>  
>  	/* If not provided, OA unit defaults to OA unit 0 as per uapi */
> -	if (!param.oa_unit)
> -		param.oa_unit = &xe_root_mmio_gt(oa->xe)->oa.oa_unit[0];
> +	if (!param.oa_unit) {
> +		param.oa_unit = xe_oa_first_unit(oa->xe);
> +		if (XE_IOCTL_DBG(xe, !param.oa_unit))
> +			return -ENODEV;
> +	}

[Severity: Medium]
This problem wasn't introduced by this patch, but should
xe_oa_enable_metric_set() and xe_oa_disable_metric_set() check MEDIA_VER()
instead of GRAPHICS_VER() [1] when programming
OAM_COMPRESSION_T3_CONTROL?

drivers/gpu/drm/xe/xe_oa.c:xe_oa_enable_metric_set() {
    ...
	if ((stream->oa_unit->type == DRM_XE_OA_UNIT_TYPE_OAM ||
	     stream->oa_unit->type == DRM_XE_OA_UNIT_TYPE_OAM_SAG) &&
	    GRAPHICS_VER(stream->oa->xe) >= 30)
		xe_mmio_rmw32(mmio, OAM_COMPRESSION_T3_CONTROL, 0, OAM_LAT_MEASURE_ENABLE);
    ...
}

OAM units belong to the media IP block, so checking GRAPHICS_VER() skips
enabling latency measurement when the graphics IP is absent or older than
version 30 while media IP is >= 30, and issues unsupported MMIO writes to
OAM_COMPRESSION_T3_CONTROL when graphics IP is >= 30 but media IP is < 30.

[1] https://sashiko.dev/#/bug/linux-23224ef1-a940-4408-9697-0c35c66f6046

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261110231442.218721-13-stuart.summers@intel.com?part=5

[PATCH 06/11] drm/xe: Do not claim flat CCS without a graphics IP

[Stuart Summers]

has_flat_ccs comes from the device descriptor rather than from the
graphics IP, so it survives a device whose graphics IP is absent.  It is
a graphics feature though, and probe_has_flat_ccs() reads its layout back
through the primary GT, which is not there.

Clear the flag along with the rest of the graphics feature bits.

Signed-off-by: Stuart Summers <stuart.summers@intel.com>
---
 drivers/gpu/drm/xe/xe_pci.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index f2a4aed1dfe2..05aea5498a7b 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -1107,6 +1107,14 @@ static int xe_info_init(struct xe_device *xe,
 		xe->info.has_ctx_tlb_inval = graphics_desc->has_ctx_tlb_inval;
 		xe->info.has_usm = graphics_desc->has_usm;
 		xe->info.has_64bit_timestamp = graphics_desc->has_64bit_timestamp;
+	} else {
+		/*
+		 * Flat CCS comes from the device descriptor rather than from
+		 * the graphics IP, but it is still a graphics feature: its
+		 * layout is read back through the primary GT, which is not
+		 * there to be read.
+		 */
+		xe->info.has_flat_ccs = 0;
 	}
 
 	if (xe->info.platform != XE_PVC)
-- 
2.43.0

Re: [PATCH 06/11] drm/xe: Do not claim flat CCS without a graphics IP

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential
issues to consider:
- [High] drm/xe: clearing has_flat_ccs in xe_info_init() enables AuxCCS
  on media GT
- [Medium] drm/xe: xe_info_init() leaves has_flat_ccs set when primary
  GT is disabled
--

commit f555718484d7a834cd43df271a384a71adacc98b
Author: Stuart Summers <stuart.summers@intel.com>

drm/xe: Do not claim flat CCS without a graphics IP

This commit clears xe->info.has_flat_ccs in xe_info_init() when the
device has no graphics IP descriptor.

> diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> index b3e5c025677cf..e4220cb0cc298 100644
> --- a/drivers/gpu/drm/xe/xe_pci.c
> +++ b/drivers/gpu/drm/xe/xe_pci.c
> @@ -1106,6 +1106,14 @@ static int xe_info_init(struct xe_device *xe,
>  		xe->info.has_ctx_tlb_inval = graphics_desc->has_ctx_tlb_inval;
>  		xe->info.has_usm = graphics_desc->has_usm;
>  		xe->info.has_64bit_timestamp = graphics_desc->has_64bit_timestamp;
> +	} else {
> +		/*
> +		 * Flat CCS comes from the device descriptor rather than from
> +		 * the graphics IP, but it is still a graphics feature: its
> +		 * layout is read back through the primary GT, which is not
> +		 * there to be read.
> +		 */
> +		xe->info.has_flat_ccs = 0;
>  	}
>  
>  	if (xe->info.platform != XE_PVC)

[Severity: High]
Does clearing xe->info.has_flat_ccs when graphics_desc is NULL cause
has_aux_ccs() to return true on Xe2+ platforms without a graphics IP?

When graphics_ip is absent, GRAPHICS_VERx100(xe) is 0, so has_aux_ccs()
falls through to return !xe->info.has_flat_ccs:

drivers/gpu/drm/xe/xe_ring_ops.c:has_aux_ccs() {
	if (GRAPHICS_VERx100(xe) >= 1270 || xe->info.platform == XE_PVC)
		return false;

	return !xe->info.has_flat_ccs;
}

During media GT initialization on Xe2+ platforms without a graphics IP,
xe_ring_ops_get() then selects auxccs_ring_ops_gen12_video_decode and
auxccs_ring_ops_gen12_video_enhance, emitting unsupported Gen12 AuxCCS
register invalidations and semaphore waits (VD0_AUX_INV and VE0_AUX_INV)
on every video and page-table migration job.

[Severity: Medium]
What happens when the hardware has a graphics IP (so graphics_desc is
non-NULL), but the primary GT is disabled via configfs
(gt_types_allowed=media, as enabled by commit "drm/xe: Allow probe
without a primary GT" and commit "drm/xe: Document that
gt_types_allowed=media now probes")?

In that configuration, alloc_primary_gt() returns NULL while
xe->info.has_flat_ccs remains 1.  On discrete platforms with Flat CCS,
xe_vram_probe() -> tile_vram_size() then calls
get_flat_ccs_offset(tile->primary_gt, ...) with a NULL gt pointer and
dereferences it in gt_to_xe() and gt_to_fw().  On integrated platforms
with Flat CCS, leaving has_flat_ccs set without a primary GT keeps
xe_bo_needs_ccs_pages() and handle_system_ccs active in xe_bo_move() even
though xe_migrate_can_blit() is false.

Also, the commit message attributes the primary GT layout read to
probe_has_flat_ccs(), which only checks XE2_FLAT_CCS_ENABLE and returns 0
early when xe_root_mmio_gt(xe) is NULL; the layout read is in
tile_vram_size() -> get_flat_ccs_offset().

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261110231442.218721-13-stuart.summers@intel.com?part=6

[PATCH 07/11] drm/xe: Run page table updates on the media GT when there is no primary

[Stuart Summers]

The tile's migration context, and the bind exec queues built on top of
it, are hard wired to the primary GT and its copy engine.  On a device
with no graphics IP that GT is NULL, and xe_migrate_init() is never
called at all, so probe dies in xe_cpu_bind_init() on an uninitialised
tile->migrate.

Page table updates are plain memory writes, so any GT can issue them.
Add xe_tile_pt_gt() and xe_tile_pt_class(), which name the primary GT and
its copy engine as before but fall back to the media GT and a video
decode engine, and use them for the migration context, the bind queues
and the place xe_gt_init() decides to set migration up.

Note this only makes page table updates work.  The blit based copy and
clear paths now target a video engine rather than NULL on such a device,
which stops them oopsing, but they are still not functional there.

Signed-off-by: Stuart Summers <stuart.summers@intel.com>
---
 drivers/gpu/drm/xe/xe_exec_queue.c |  5 +++--
 drivers/gpu/drm/xe/xe_gt.c         | 11 ++++++----
 drivers/gpu/drm/xe/xe_migrate.c    | 29 ++++++++++++++-------------
 drivers/gpu/drm/xe/xe_tile.h       | 32 ++++++++++++++++++++++++++++++
 4 files changed, 57 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index 7ade915c59a8..cb93c4ee7bb8 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -28,6 +28,7 @@
 #include "xe_macros.h"
 #include "xe_migrate.h"
 #include "xe_pm.h"
+#include "xe_tile.h"
 #include "xe_trace.h"
 #include "xe_vm.h"
 #include "xe_pxp.h"
@@ -588,7 +589,7 @@ struct xe_exec_queue *xe_exec_queue_create_bind(struct xe_device *xe,
 						struct xe_vm *user_vm,
 						u32 flags, u64 extensions)
 {
-	struct xe_gt *gt = tile->primary_gt;
+	struct xe_gt *gt = xe_tile_pt_gt(tile);
 	struct xe_exec_queue *q;
 	struct xe_vm *migrate_vm;
 
@@ -606,7 +607,7 @@ struct xe_exec_queue *xe_exec_queue_create_bind(struct xe_device *xe,
 					 flags, extensions);
 	} else {
 		q = xe_exec_queue_create_class(xe, gt, migrate_vm,
-					       XE_ENGINE_CLASS_COPY, flags,
+					       xe_tile_pt_class(tile), flags,
 					       extensions);
 	}
 	xe_vm_put(migrate_vm);
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index be79a0da2f2f..82299c1bc6c5 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -61,6 +61,7 @@
 #include "xe_sa.h"
 #include "xe_sched_job.h"
 #include "xe_sriov.h"
+#include "xe_tile.h"
 #include "xe_tlb_inval.h"
 #include "xe_tuning.h"
 #include "xe_uc.h"
@@ -657,10 +658,12 @@ static int gt_init_with_all_forcewake(struct xe_gt *gt)
 		}
 	}
 
-	if (xe_gt_is_main_type(gt)) {
-		struct xe_tile *tile = gt_to_tile(gt);
-
-		err = xe_migrate_init(tile->migrate);
+	/*
+	 * Normally the migration context runs on the primary GT, but a tile
+	 * with no graphics IP has only its media GT to run it on.
+	 */
+	if (gt == xe_tile_pt_gt(gt_to_tile(gt))) {
+		err = xe_migrate_init(gt_to_tile(gt)->migrate);
 		if (err)
 			return err;
 	}
diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index 19c37eb31589..754592c5cf88 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -43,6 +43,7 @@
 #include "xe_sriov_vf_ccs.h"
 #include "xe_svm.h"
 #include "xe_sync.h"
+#include "xe_tile.h"
 #include "xe_trace_bo.h"
 #include "xe_validation.h"
 #include "xe_vm.h"
@@ -478,7 +479,7 @@ static void xe_migrate_prepare_vm(struct xe_tile *tile, struct xe_migrate *m,
 		if (xe->info.has_usm) {
 			xe_tile_assert(tile, xe_bo_size(batch) == SZ_1M);
 
-			batch = tile->primary_gt->usm.bb_pool->bo;
+			batch = xe_tile_pt_gt(tile)->usm.bb_pool->bo;
 			m->usm_batch_base_ofs = m->batch_base_ofs + SZ_1M;
 			xe_tile_assert(tile, xe_bo_size(batch) == SZ_512K);
 
@@ -499,7 +500,7 @@ static void xe_migrate_prepare_vm(struct xe_tile *tile, struct xe_migrate *m,
 		m->batch_base_ofs = xe_migrate_vram_ofs(xe, batch_addr, false);
 
 		if (xe->info.has_usm) {
-			batch = tile->primary_gt->usm.bb_pool->bo;
+			batch = xe_tile_pt_gt(tile)->usm.bb_pool->bo;
 			batch_addr = xe_bo_addr(batch, 0, XE_PAGE_SIZE);
 			m->usm_batch_base_ofs = xe_migrate_vram_ofs(xe, batch_addr, false);
 		}
@@ -787,7 +788,7 @@ static void xe_migrate_ulls_exit(struct work_struct *work)
 int xe_migrate_init(struct xe_migrate *m)
 {
 	struct xe_tile *tile = m->tile;
-	struct xe_gt *primary_gt = tile->primary_gt;
+	struct xe_gt *gt = xe_tile_pt_gt(tile);
 	struct xe_device *xe = tile_to_xe(tile);
 	struct xe_vm *vm;
 	int err;
@@ -803,8 +804,8 @@ int xe_migrate_init(struct xe_migrate *m)
 		goto err_out;
 
 	if (xe->info.has_usm) {
-		struct xe_hw_engine *hwe0 = primary_gt->usm.paging_hwe0;
-		u32 logical_mask = primary_gt->usm.paging_logical_mask;
+		struct xe_hw_engine *hwe0 = gt->usm.paging_hwe0;
+		u32 logical_mask = gt->usm.paging_logical_mask;
 
 		if (!hwe0 || !logical_mask) {
 			err = -EINVAL;
@@ -821,8 +822,8 @@ int xe_migrate_init(struct xe_migrate *m)
 					    EXEC_QUEUE_FLAG_MIGRATE |
 					    EXEC_QUEUE_FLAG_LOW_LATENCY, 0);
 	} else {
-		m->q = xe_exec_queue_create_class(xe, primary_gt, vm,
-						  XE_ENGINE_CLASS_COPY,
+		m->q = xe_exec_queue_create_class(xe, gt, vm,
+						  xe_tile_pt_class(tile),
 						  EXEC_QUEUE_FLAG_KERNEL |
 						  EXEC_QUEUE_FLAG_MIGRATE, 0);
 	}
@@ -1170,7 +1171,7 @@ static u32 xe_migrate_ccs_copy(struct xe_migrate *m,
 			       u64 dst_ofs, bool dst_is_indirect, u32 dst_size,
 			       u64 ccs_ofs, bool copy_ccs)
 {
-	struct xe_gt *gt = m->tile->primary_gt;
+	struct xe_gt *gt = xe_tile_pt_gt(m->tile);
 	u32 flush_flags = 0;
 
 	if (!copy_ccs && dst_is_indirect) {
@@ -1214,7 +1215,7 @@ static struct dma_fence *__xe_migrate_copy(struct xe_migrate *m,
 					   bool copy_only_ccs,
 					   bool is_vram_resolve)
 {
-	struct xe_gt *gt = m->tile->primary_gt;
+	struct xe_gt *gt = xe_tile_pt_gt(m->tile);
 	struct xe_device *xe = gt_to_xe(gt);
 	struct dma_fence *fence = NULL;
 	u64 size = xe_bo_size(src_bo);
@@ -1512,7 +1513,7 @@ int xe_migrate_ccs_rw_copy(struct xe_tile *tile, struct xe_exec_queue *q,
 	bool dst_is_pltt = read_write == XE_SRIOV_VF_CCS_WRITE_CTX;
 	struct ttm_resource *src = new_mem;
 	struct xe_migrate *m = tile->migrate;
-	struct xe_gt *gt = tile->primary_gt;
+	struct xe_gt *gt = xe_tile_pt_gt(tile);
 	u32 batch_size, batch_size_allocated;
 	struct xe_device *xe = gt_to_xe(gt);
 	struct xe_res_cursor src_it, ccs_it;
@@ -1714,7 +1715,7 @@ struct dma_fence *xe_migrate_vram_copy_chunk(struct xe_bo *vram_bo, u64 vram_off
 {
 	struct xe_device *xe = xe_bo_device(vram_bo);
 	struct xe_tile *tile = vram_bo->tile;
-	struct xe_gt *gt = tile->primary_gt;
+	struct xe_gt *gt = xe_tile_pt_gt(tile);
 	struct xe_migrate *m = tile->migrate;
 	struct dma_fence *fence = NULL;
 	struct ttm_resource *vram = vram_bo->ttm.resource;
@@ -1930,7 +1931,7 @@ struct dma_fence *xe_migrate_clear(struct xe_migrate *m,
 	bool clear_vram = mem_type_is_vram(dst->mem_type);
 	bool clear_bo_data = XE_MIGRATE_CLEAR_FLAG_BO_DATA & clear_flags;
 	bool clear_ccs = XE_MIGRATE_CLEAR_FLAG_CCS_DATA & clear_flags;
-	struct xe_gt *gt = m->tile->primary_gt;
+	struct xe_gt *gt = xe_tile_pt_gt(m->tile);
 	struct xe_device *xe = gt_to_xe(gt);
 	bool clear_only_system_ccs = false;
 	struct dma_fence *fence = NULL;
@@ -2295,7 +2296,7 @@ static struct dma_fence *xe_migrate_vram(struct xe_migrate *m,
 					 struct dma_fence *deps,
 					 const enum xe_migrate_copy_dir dir)
 {
-	struct xe_gt *gt = m->tile->primary_gt;
+	struct xe_gt *gt = xe_tile_pt_gt(m->tile);
 	struct xe_device *xe = gt_to_xe(gt);
 	bool use_usm_batch = xe->info.has_usm;
 	struct dma_fence *fence = NULL;
@@ -2723,7 +2724,7 @@ int xe_migrate_debug_ccs_overlap(struct xe_migrate *m,
 				 bool write_to_ccs)
 {
 	struct xe_device *xe = tile_to_xe(m->tile);
-	struct xe_gt *gt = m->tile->primary_gt;
+	struct xe_gt *gt = xe_tile_pt_gt(m->tile);
 	struct dma_fence *fence;
 	struct xe_bb *bb;
 	struct xe_sched_job *job;
diff --git a/drivers/gpu/drm/xe/xe_tile.h b/drivers/gpu/drm/xe/xe_tile.h
index a2a2c0e936b8..f35b675f7a20 100644
--- a/drivers/gpu/drm/xe/xe_tile.h
+++ b/drivers/gpu/drm/xe/xe_tile.h
@@ -6,6 +6,7 @@
 #ifndef _XE_TILE_H_
 #define _XE_TILE_H_
 
+#include "xe_hw_engine_types.h"
 #include "xe_tile_types.h"
 
 struct xe_device;
@@ -24,6 +25,37 @@ static inline bool xe_tile_is_root(struct xe_tile *tile)
 	return tile->id == 0;
 }
 
+/**
+ * xe_tile_pt_gt() - GT used to run a tile's page table update jobs
+ * @tile: Pointer to the struct xe_tile.
+ *
+ * Page table updates, and the migration context they are submitted through,
+ * normally run on the primary GT.  A device whose graphics IP is absent has
+ * no primary GT, but its media GT can write page tables just as well.
+ *
+ * Return: The tile's primary GT, or its media GT if it has no primary GT.
+ */
+static inline struct xe_gt *xe_tile_pt_gt(struct xe_tile *tile)
+{
+	return tile->primary_gt ?: tile->media_gt;
+}
+
+/**
+ * xe_tile_pt_class() - Engine class to run a tile's page table update jobs on
+ * @tile: Pointer to the struct xe_tile.
+ *
+ * The engine class to pair with xe_tile_pt_gt(). The copy engine is the usual
+ * choice, but it lives on the primary GT; when there is none, fall back to a
+ * video decode engine on the media GT.
+ *
+ * Return: The engine class to create the tile's page table exec queue with.
+ */
+static inline enum xe_engine_class xe_tile_pt_class(struct xe_tile *tile)
+{
+	return tile->primary_gt ? XE_ENGINE_CLASS_COPY :
+				  XE_ENGINE_CLASS_VIDEO_DECODE;
+}
+
 /**
  * xe_tile_to_vr() - Return the struct xe_vram_region pointer from a
  * struct xe_tile pointer
-- 
2.43.0

Re: [PATCH 07/11] drm/xe: Run page table updates on the media GT when there is no primary

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential
issues to consider:
- [High] drm/xe: uninitialized usm.bb_pool and NULL paging_hwe0 on media
  GT
- [Medium] drm/xe: silent no-op blit jobs on video engine in xe_migrate
  when no primary GT
It also noticed 2 related pre-existing issues this patch does not
introduce:
- [Medium] drm/xe: memory leak in xe_migrate_init() [1]
- [High] drm/xe/migrate: missing fence sync and leak in
  xe_migrate_vram_copy_chunk() [2]
--

commit 1ce7e5d250d71a445cdd76886f86f447f08f9a48
Author: Stuart Summers <stuart.summers@intel.com>

drm/xe: Run page table updates on the media GT when there is no primary

This commit adds xe_tile_pt_gt() and xe_tile_pt_class() so page table
updates and migration queue initialization fall back to the media GT and a
video decode engine when a tile has no primary GT.

> diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
> index 19c37eb315893..754592c5cf881 100644
> --- a/drivers/gpu/drm/xe/xe_migrate.c
> +++ b/drivers/gpu/drm/xe/xe_migrate.c
[ ... ]
> @@ -478,7 +479,7 @@ static void xe_migrate_prepare_vm(struct xe_tile *tile, struct xe_migrate *m,
>  		if (xe->info.has_usm) {
>  			xe_tile_assert(tile, xe_bo_size(batch) == SZ_1M);
>  
> -			batch = tile->primary_gt->usm.bb_pool->bo;
> +			batch = xe_tile_pt_gt(tile)->usm.bb_pool->bo;
>  			m->usm_batch_base_ofs = m->batch_base_ofs + SZ_1M;
>  			xe_tile_assert(tile, xe_bo_size(batch) == SZ_512K);
>  
> @@ -499,7 +500,7 @@ static void xe_migrate_prepare_vm(struct xe_tile *tile, struct xe_migrate *m,
>  		m->batch_base_ofs = xe_migrate_vram_ofs(xe, batch_addr, false);
>  
>  		if (xe->info.has_usm) {
> -			batch = tile->primary_gt->usm.bb_pool->bo;
> +			batch = xe_tile_pt_gt(tile)->usm.bb_pool->bo;
>  			batch_addr = xe_bo_addr(batch, 0, XE_PAGE_SIZE);
>  			m->usm_batch_base_ofs = xe_migrate_vram_ofs(xe, batch_addr, false);
>  		}

[Severity: High]
Can this dereference a NULL usm.bb_pool when xe_tile_pt_gt(tile) falls back
to the media GT?

On Xe2+ platforms with the primary GT disabled via gt_types_allowed=media in
configfs, xe->info.has_usm is still true from the hardware graphics
descriptor, but gt_init_with_all_forcewake() only initializes
gt->usm.bb_pool when xe_gt_is_main_type(gt) is true:

drivers/gpu/drm/xe/xe_gt.c:gt_init_with_all_forcewake() {
	if (xe_gt_is_main_type(gt)) {
		if (gt_to_xe(gt)->info.has_usm) {
			...
			gt->usm.bb_pool = xe_sa_bo_manager_init(...);
		}
	}

	if (gt == xe_tile_pt_gt(gt_to_tile(gt))) {
		err = xe_migrate_init(gt_to_tile(gt)->migrate);
}

In addition, when xe->info.has_usm is true, xe_migrate_init() and
xe_exec_queue_create_bind() require gt->usm.paging_hwe0 and
gt->usm.paging_logical_mask and return -EINVAL if they are unset, but those
fields are only populated from XE_ENGINE_CLASS_COPY engines and remain zero
on a media GT.

> @@ -787,7 +788,7 @@ static void xe_migrate_ulls_exit(struct work_struct *work)
>  int xe_migrate_init(struct xe_migrate *m)
>  {
>  	struct xe_tile *tile = m->tile;
> -	struct xe_gt *primary_gt = tile->primary_gt;
> +	struct xe_gt *gt = xe_tile_pt_gt(tile);
>  	struct xe_device *xe = tile_to_xe(tile);
>  	struct xe_vm *vm;
>  	int err;
> @@ -803,8 +804,8 @@ int xe_migrate_init(struct xe_migrate *m)
>  		goto err_out;
>  
>  	if (xe->info.has_usm) {
> -		struct xe_hw_engine *hwe0 = primary_gt->usm.paging_hwe0;
> -		u32 logical_mask = primary_gt->usm.paging_logical_mask;
> +		struct xe_hw_engine *hwe0 = gt->usm.paging_hwe0;
> +		u32 logical_mask = gt->usm.paging_logical_mask;
>  
>  		if (!hwe0 || !logical_mask) {
>  			err = -EINVAL;
> @@ -821,8 +822,8 @@ int xe_migrate_init(struct xe_migrate *m)
>  					    EXEC_QUEUE_FLAG_MIGRATE |
>  					    EXEC_QUEUE_FLAG_LOW_LATENCY, 0);
>  	} else {
> -		m->q = xe_exec_queue_create_class(xe, primary_gt, vm,
> -						  XE_ENGINE_CLASS_COPY,
> +		m->q = xe_exec_queue_create_class(xe, gt, vm,
> +						  xe_tile_pt_class(tile),
>  						  EXEC_QUEUE_FLAG_KERNEL |
>  						  EXEC_QUEUE_FLAG_MIGRATE, 0);
>  	}

[Severity: Medium]
This problem wasn't introduced by this patch, but if exec queue creation
fails in xe_migrate_init() [1], does jumping to err_out leak m->pt_bo?

xe_migrate_lock_prepare_vm() allocates m->pt_bo before the queue is created,
while the xe_migrate_fini() devm action that unpins m->pt_bo is only
registered after queue creation succeeds, and err_out only calls
xe_vm_close_and_put(vm).

[ ... ]

> @@ -1714,7 +1715,7 @@ struct dma_fence *xe_migrate_vram_copy_chunk(struct xe_bo *vram_bo, u64 vram_off
>  {
>  	struct xe_device *xe = xe_bo_device(vram_bo);
>  	struct xe_tile *tile = vram_bo->tile;
> -	struct xe_gt *gt = tile->primary_gt;
> +	struct xe_gt *gt = xe_tile_pt_gt(tile);
>  	struct xe_migrate *m = tile->migrate;
>  	struct dma_fence *fence = NULL;
>  	struct ttm_resource *vram = vram_bo->ttm.resource;

[Severity: High]
This problem wasn't introduced by this patch, but if xe_bb_new() or
xe_bb_create_migration_job() fails on a second or later pass of the copy
loop in xe_migrate_vram_copy_chunk() [2], does returning ERR_PTR(err)
directly leak the previous pass's fence and leave its DMA in flight?

Each completed pass stores a reference to the submitted job's fence in
local variable fence, but the error returns inside the while (size) loop do
not wait on or put fence before returning:

drivers/gpu/drm/xe/xe_migrate.c:xe_migrate_vram_copy_chunk() {
	while (size) {
		...
		bb = xe_bb_new(gt, batch_size, usm);
		if (IS_ERR(bb)) {
			err = PTR_ERR(bb);
			return ERR_PTR(err);
		}
		...
		scoped_guard(mutex, &m->job_mutex) {
			dma_fence_put(fence);
			fence = xe_migrate_job_push(m, job);
}

> @@ -1930,7 +1931,7 @@ struct dma_fence *xe_migrate_clear(struct xe_migrate *m,
>  	bool clear_vram = mem_type_is_vram(dst->mem_type);
>  	bool clear_bo_data = XE_MIGRATE_CLEAR_FLAG_BO_DATA & clear_flags;
>  	bool clear_ccs = XE_MIGRATE_CLEAR_FLAG_CCS_DATA & clear_flags;
> -	struct xe_gt *gt = m->tile->primary_gt;
> +	struct xe_gt *gt = xe_tile_pt_gt(m->tile);
>  	struct xe_device *xe = gt_to_xe(gt);
>  	bool clear_only_system_ccs = false;
>  	struct dma_fence *fence = NULL;
> @@ -2295,7 +2296,7 @@ static struct dma_fence *xe_migrate_vram(struct xe_migrate *m,
>  					 struct dma_fence *deps,
>  					 const enum xe_migrate_copy_dir dir)
>  {
> -	struct xe_gt *gt = m->tile->primary_gt;
> +	struct xe_gt *gt = xe_tile_pt_gt(m->tile);
>  	struct xe_device *xe = gt_to_xe(gt);
>  	bool use_usm_batch = xe->info.has_usm;
>  	struct dma_fence *fence = NULL;

[Severity: Medium]
When m->q is created on XE_ENGINE_CLASS_VIDEO_DECODE, won't migration blit
jobs submitted through xe_migrate_vram(), xe_migrate_clear(), and
__xe_migrate_copy() complete and signal their fence without executing the
copy or clear batch?

xe_bb_create_migration_job() places the PTE updates in
job->ptrs[0].batch_addr and the copy or clear instructions in
job->ptrs[1].batch_addr, but emit_job_gen12_video() only emits
job->ptrs[0].batch_addr for a width-1 queue:

drivers/gpu/drm/xe/xe_ring_ops.c:emit_job_gen12_video() {
	for (i = 0; i < job->q->width; ++i)
		__emit_job_gen12_video(job, job->q->lrc[i],
				       job->ptrs[i].batch_addr,
				       &job->ptrs[i].head,
				       xe_sched_job_lrc_seqno(job));
}

Even after commit "drm/xe: Fall back to CPU copies when the tile cannot
blit" later in this series, callers such as xe_ttm_access_memory() (for
VRAM accesses >= SZ_16K via xe_migrate_access_memory() -> xe_migrate_vram())
and xe_vram_memtest() (via xe_migrate_clear()) do not check
xe_migrate_can_blit(), silently dropping VRAM reads/writes or failing the
boot memory test with -EIO.

[1] https://sashiko.dev/#/bug/linux-21e51c6b-d9bc-4f0f-9122-4598c0472959
[2] https://sashiko.dev/#/bug/linux-2b53019e-7f14-4ba6-80c3-68e86fcb7785

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261110231442.218721-13-stuart.summers@intel.com?part=7

[PATCH 08/11] drm/xe: Document that gt_types_allowed=media now probes

[Stuart Summers]

The media only configuration no longer fails probe, so drop the warning
that said it would.

Signed-off-by: Stuart Summers <stuart.summers@intel.com>
---
 drivers/gpu/drm/xe/xe_configfs.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index 2ddd707a6dbd..95d5030e82a9 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -111,15 +111,14 @@
  *	# echo 'primary' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
  *
  * Allow only the media GT of each tile to be initialized and used,
- * effectively disabling the primary GT.  **This configuration will cause
- * device probe failure on all current platforms, but may be allowed on
- * igpu platforms in the future**::
+ * effectively disabling the primary GT.  Note that only media workloads
+ * are usable in this configuration::
  *
  *	# echo 'media' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
  *
  * Disable all GTs.  Only other GPU IP (such as display) is potentially usable.
  * **This configuration will cause device probe failure on all current
- * platforms, but may be allowed on igpu platforms in the future**::
+ * platforms**::
  *
  *	# echo '' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
  *
-- 
2.43.0

[PATCH 09/11] drm/xe: Fall back to CPU copies when the tile cannot blit

[Stuart Summers]

xe_migrate_copy() and xe_migrate_clear() emit blitter commands, and the
copy engine they need lives on the primary GT.  A tile without one can
still run the migration context for page table updates, but it has no way
to move data.

On an integrated device this never comes up, since every move either ends
in ttm_bo_move_null() or needs no clear.  With VRAM it does, so let
xe_bo_move() hand the work to ttm_bo_move_memcpy(), which reaches VRAM
through the BAR mapping xe already sets up in xe_ttm_io_mem_reserve(),
and which covers the clear case by way of an unpopulated source.  The
pinned save and restore paths grow the same check, falling back to the
vmap and memcpy branch they already have.

Reads come back over PCIe uncached and are correspondingly slow, so this
is only meant to keep a media only device working, not to perform.

Signed-off-by: Stuart Summers <stuart.summers@intel.com>
---
 drivers/gpu/drm/xe/xe_bo.c      | 43 ++++++++++++++++++++++-----------
 drivers/gpu/drm/xe/xe_migrate.c | 16 ++++++++++++
 drivers/gpu/drm/xe/xe_migrate.h |  2 ++
 3 files changed, 47 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index 42a6aa1a2e4a..49a3d4df77f6 100644
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe/xe_bo.c
@@ -1275,6 +1275,19 @@ static int xe_bo_move(struct ttm_buffer_object *ttm_bo, bool evict,
 		xe_pm_runtime_get_noresume(xe);
 	}
 
+	/*
+	 * A tile with no copy engine cannot blit, so move the data with the
+	 * CPU instead.  For VRAM that means going over the PCIe BAR, which is
+	 * slow, but a device with no graphics IP offers no alternative.
+	 * ttm_bo_move_memcpy() covers the clear case too, by way of an
+	 * unpopulated source.
+	 */
+	if (!xe_migrate_can_blit(migrate)) {
+		ret = ttm_bo_move_memcpy(ttm_bo, ctx, new_mem);
+		xe_pm_runtime_put(xe);
+		goto out;
+	}
+
 	/*
 	 * Attach CCS BBs before submitting the copy job below so a VF
 	 * migration racing the copy sees valid, up to date attach state.
@@ -1576,17 +1589,18 @@ int xe_bo_notifier_unprepare_pinned(struct xe_bo *bo)
 static int xe_bo_evict_pinned_copy(struct xe_bo *bo, struct xe_bo *backup)
 {
 	struct xe_device *xe = xe_bo_device(bo);
+	struct xe_migrate *migrate;
 	bool unmap = false;
 	int ret = 0;
 
-	if (xe_bo_is_user(bo) || (bo->flags & XE_BO_FLAG_PINNED_LATE_RESTORE)) {
-		struct xe_migrate *migrate;
-		struct dma_fence *fence;
+	if (bo->tile)
+		migrate = bo->tile->migrate;
+	else
+		migrate = mem_type_to_migrate(xe, bo->ttm.resource->mem_type);
 
-		if (bo->tile)
-			migrate = bo->tile->migrate;
-		else
-			migrate = mem_type_to_migrate(xe, bo->ttm.resource->mem_type);
+	if ((xe_bo_is_user(bo) || (bo->flags & XE_BO_FLAG_PINNED_LATE_RESTORE)) &&
+	    xe_migrate_can_blit(migrate)) {
+		struct dma_fence *fence;
 
 		xe_assert(xe, bo->ttm.base.resv == backup->ttm.base.resv);
 		ret = dma_resv_reserve_fences(bo->ttm.base.resv, 1);
@@ -1715,6 +1729,7 @@ int xe_bo_restore_pinned(struct xe_bo *bo)
 	};
 	struct xe_device *xe = ttm_to_xe_device(bo->ttm.bdev);
 	struct xe_bo *backup = bo->backup_obj;
+	struct xe_migrate *migrate;
 	bool unmap = false;
 	int ret;
 
@@ -1729,14 +1744,14 @@ int xe_bo_restore_pinned(struct xe_bo *bo)
 			goto out_unlock_bo;
 	}
 
-	if (xe_bo_is_user(bo) || (bo->flags & XE_BO_FLAG_PINNED_LATE_RESTORE)) {
-		struct xe_migrate *migrate;
-		struct dma_fence *fence;
+	if (bo->tile)
+		migrate = bo->tile->migrate;
+	else
+		migrate = mem_type_to_migrate(xe, bo->ttm.resource->mem_type);
 
-		if (bo->tile)
-			migrate = bo->tile->migrate;
-		else
-			migrate = mem_type_to_migrate(xe, bo->ttm.resource->mem_type);
+	if ((xe_bo_is_user(bo) || (bo->flags & XE_BO_FLAG_PINNED_LATE_RESTORE)) &&
+	    xe_migrate_can_blit(migrate)) {
+		struct dma_fence *fence;
 
 		ret = dma_resv_reserve_fences(bo->ttm.base.resv, 1);
 		if (ret)
diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index 754592c5cf88..c06f43fc9e4f 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -2093,6 +2093,22 @@ void xe_migrate_wait(struct xe_migrate *m)
 		dma_fence_wait(m->fence, false);
 }
 
+/**
+ * xe_migrate_can_blit() - Whether a migration context can issue blits
+ * @m: The migration context
+ *
+ * xe_migrate_copy() and xe_migrate_clear() emit blitter commands, which only
+ * the copy engine understands, and the copy engine lives on the primary GT.
+ * A tile without one can still update page tables, so its migration context
+ * is usable, but callers that want to move data have to do it themselves.
+ *
+ * Return: true if blit based copy and clear are available on @m.
+ */
+bool xe_migrate_can_blit(struct xe_migrate *m)
+{
+	return m->tile->primary_gt;
+}
+
 static u32 pte_update_cmd_size(u64 size)
 {
 	u32 num_dword;
diff --git a/drivers/gpu/drm/xe/xe_migrate.h b/drivers/gpu/drm/xe/xe_migrate.h
index 2e8be10fdb71..4230efcaffc6 100644
--- a/drivers/gpu/drm/xe/xe_migrate.h
+++ b/drivers/gpu/drm/xe/xe_migrate.h
@@ -91,6 +91,8 @@ struct xe_vm *xe_migrate_get_vm(struct xe_migrate *m);
 
 void xe_migrate_wait(struct xe_migrate *m);
 
+bool xe_migrate_can_blit(struct xe_migrate *m);
+
 #if IS_ENABLED(CONFIG_DRM_XE_DEBUG_MEM)
 int xe_migrate_debug_ccs_overlap(struct xe_migrate *m,
 				 struct xe_bo *scratch_bo,
-- 
2.43.0

Re: [PATCH 09/11] drm/xe: Fall back to CPU copies when the tile cannot blit

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 6 potential
issues to consider:
- [High] drm/xe: WARN_ON and -EINVAL in xe_bo_move() on initial VRAM BO
  clear
- [High] drm/xe: invalid BAR mapping in xe_bo_move() for non-contiguous
  VRAM BOs
- [High] drm/xe: WARN_ON in xe_bo_vmap() during pinned BO save and
  restore
- [High] drm/xe: missing fence wait before ttm_bo_move_memcpy() in
  xe_bo_move()
- [Medium] drm/xe: blitter commands emitted in xe_ttm_access_memory()
  and memtest
- [Medium] drm/xe: missing fence wait before CPU copy in
  xe_bo_evict_pinned_copy()
--

commit fcb1ac36084339205a63d9c4c32dc0af3e3062ff
Author: Stuart Summers <stuart.summers@intel.com>

drm/xe: Fall back to CPU copies when the tile cannot blit

This commit adds an xe_migrate_can_blit() helper and falls back to CPU
copies in xe_bo_move(), xe_bo_evict_pinned_copy(), and
xe_bo_restore_pinned() when a tile has no primary GT copy engine.

> diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
> index 42a6aa1a2e4a0..49a3d4df77f62 100644
> --- a/drivers/gpu/drm/xe/xe_bo.c
> +++ b/drivers/gpu/drm/xe/xe_bo.c
> @@ -1275,6 +1275,19 @@ static int xe_bo_move(struct ttm_buffer_object *ttm_bo, bool evict,
>  		xe_pm_runtime_get_noresume(xe);
>  	}
>  
> +	/*
> +	 * A tile with no copy engine cannot blit, so move the data with the
> +	 * CPU instead.  For VRAM that means going over the PCIe BAR, which is
> +	 * slow, but a device with no graphics IP offers no alternative.
> +	 * ttm_bo_move_memcpy() covers the clear case too, by way of an
> +	 * unpopulated source.
> +	 */
> +	if (!xe_migrate_can_blit(migrate)) {
> +		ret = ttm_bo_move_memcpy(ttm_bo, ctx, new_mem);
> +		xe_pm_runtime_put(xe);
> +		goto out;
> +	}

[Severity: High]
Does calling ttm_bo_move_memcpy() here hit WARN_ON(!src_mem) and return
-EINVAL when clearing a newly created VRAM BO?

When xe_bo_init_locked() creates a standard user VRAM BO without
XE_BO_FLAG_DEFER_BACKING, ttm_bo_validate() calls xe_bo_move() while
ttm_bo->resource is still NULL (move_lacks_source is true and needs_clear
is true).  ttm_bo_move_memcpy() only supports clearing from an existing
non-NULL use_tt resource with an unpopulated ttm_tt, and rejects a NULL
bo->resource at the start of the function:

drivers/gpu/drm/ttm/ttm_bo_util.c:ttm_bo_move_memcpy() {
	struct ttm_resource *src_mem = bo->resource;
	...
	if (WARN_ON(!src_mem))
		return -EINVAL;
}

Every non-deferred VRAM BO allocation on a tile that cannot blit will
warn and fail with -EINVAL.

[Severity: High]
Can passing a non-contiguous VRAM BO to ttm_bo_move_memcpy() corrupt
memory at the start of the VRAM BAR?

Unpinned user VRAM BOs do not set TTM_PL_FLAG_CONTIGUOUS, so when
xe_ttm_vram_mgr_new() allocates multiple discontiguous buddy blocks it
sets vres->base.start to XE_BO_INVALID_OFFSET (LONG_MAX).
ttm_bo_move_memcpy() uses ttm_kmap_iter_linear_io_init(), which calls
xe_ttm_io_mem_reserve():

drivers/gpu/drm/xe/xe_bo.c:xe_ttm_io_mem_reserve() {
	case XE_PL_VRAM0:
	case XE_PL_VRAM1: {
		...
		mem->bus.offset = mem->start << PAGE_SHIFT;

		if (vram->mapping &&
		    mem->placement & TTM_PL_FLAG_CONTIGUOUS)
			mem->bus.addr = (u8 __force *)vram->mapping +
				mem->bus.offset;

		mem->bus.offset += vram->io_start;
		mem->bus.is_iomem = true;
}

With mem->start == LONG_MAX and TTM_PL_FLAG_CONTIGUOUS clear,
mem->bus.addr stays NULL and mem->bus.offset wraps to
vram->io_start - PAGE_SIZE.  ttm_kmap_iter_linear_io_init() then ioremaps
mem->size bytes starting one page before the VRAM BAR and
ttm_move_memcpy() linearly reads, writes, or zeroes across that address
range instead of walking the BO's buddy blocks.

[Severity: High]
Does ttm_bo_move_memcpy() also run without waiting for in-flight GPU
fences on ttm_bo->base.resv?

In the GPU migration path, xe_migrate_copy() and xe_migrate_clear() chain
the migration job behind existing fences in ttm_bo->base.resv.
ttm_bo_move_memcpy(), however, performs the synchronous CPU copy in
ttm_move_memcpy() before ttm_bo_move_sync_cleanup() waits on the
reservation object.  When xe_bo_trigger_rebind() does not idle the BO
(for example on a non-fault-mode VM when !xe_device_is_l2_flush_optimized(xe),
or when move_lacks_source is true and new_mem carries pipelined eviction
fences), the CPU copy or clear races with active media GT jobs and ignores
ctx->no_wait_gpu unless ttm_bo_wait_ctx(ttm_bo, ctx) is called first.

> @@ -1576,17 +1589,18 @@ int xe_bo_notifier_unprepare_pinned(struct xe_bo *bo)
>  static int xe_bo_evict_pinned_copy(struct xe_bo *bo, struct xe_bo *backup)
>  {
>  	struct xe_device *xe = xe_bo_device(bo);
> +	struct xe_migrate *migrate;
>  	bool unmap = false;
>  	int ret = 0;
>  
> -	if (xe_bo_is_user(bo) || (bo->flags & XE_BO_FLAG_PINNED_LATE_RESTORE)) {
> -		struct xe_migrate *migrate;
> -		struct dma_fence *fence;
> +	if (bo->tile)
> +		migrate = bo->tile->migrate;
> +	else
> +		migrate = mem_type_to_migrate(xe, bo->ttm.resource->mem_type);
>  
> -		if (bo->tile)
> -			migrate = bo->tile->migrate;
> -		else
> -			migrate = mem_type_to_migrate(xe, bo->ttm.resource->mem_type);
> +	if ((xe_bo_is_user(bo) || (bo->flags & XE_BO_FLAG_PINNED_LATE_RESTORE)) &&
> +	    xe_migrate_can_blit(migrate)) {
> +		struct dma_fence *fence;

[Severity: Medium]
When xe_bo_evict_pinned_copy() falls back to the else branch for a
XE_BO_FLAG_PINNED_LATE_RESTORE or user BO, does the CPU copy race with
in-flight GPU work?

xe_bo_evict_all() runs before xe_gt_suspend().  The xe_migrate_copy()
branch orders the copy behind DMA_RESV_USAGE_BOOKKEEP fences in
bo->ttm.base.resv, but the CPU fallback calls xe_map_memcpy_from()
immediately without waiting on bo->ttm.base.resv, so it can snapshot
stale VRAM while media GT jobs or page-table updates are still running.

> @@ -1715,6 +1729,7 @@ int xe_bo_restore_pinned(struct xe_bo *bo)
>  	};
>  	struct xe_device *xe = ttm_to_xe_device(bo->ttm.bdev);
>  	struct xe_bo *backup = bo->backup_obj;
> +	struct xe_migrate *migrate;
>  	bool unmap = false;
>  	int ret;
>  
> @@ -1729,14 +1744,14 @@ int xe_bo_restore_pinned(struct xe_bo *bo)
>  			goto out_unlock_bo;
>  	}
>  
> -	if (xe_bo_is_user(bo) || (bo->flags & XE_BO_FLAG_PINNED_LATE_RESTORE)) {
> -		struct xe_migrate *migrate;
> -		struct dma_fence *fence;
> +	if (bo->tile)
> +		migrate = bo->tile->migrate;
> +	else
> +		migrate = mem_type_to_migrate(xe, bo->ttm.resource->mem_type);
>  
> -		if (bo->tile)
> -			migrate = bo->tile->migrate;
> -		else
> -			migrate = mem_type_to_migrate(xe, bo->ttm.resource->mem_type);
> +	if ((xe_bo_is_user(bo) || (bo->flags & XE_BO_FLAG_PINNED_LATE_RESTORE)) &&
> +	    xe_migrate_can_blit(migrate)) {
> +		struct dma_fence *fence;

[Severity: High]
Can the CPU fallback in xe_bo_evict_pinned_copy() and
xe_bo_restore_pinned() hit the drm_WARN_ON() in xe_bo_vmap() and fail
suspend/resume with -EINVAL?

When !xe_migrate_can_blit(migrate), both functions fall back to calling
xe_bo_vmap(bo) whenever iosys_map_is_null(&bo->vmap):

drivers/gpu/drm/xe/xe_bo.c:xe_bo_vmap() {
	if (drm_WARN_ON(&xe->drm, !(bo->flags & XE_BO_FLAG_NEEDS_CPU_ACCESS) ||
			!force_contiguous(bo->flags)))
		return -EINVAL;
}

User BOs pinned via xe_dma_buf_pin() -> xe_bo_pin_external() do not have
XE_BO_FLAG_PINNED set, so force_contiguous(bo->flags) is false (and they
may also be non-contiguous or lack XE_BO_FLAG_NEEDS_CPU_ACCESS).
Likewise, late-restore kernel BOs created without
XE_BO_FLAG_NEEDS_CPU_ACCESS, such as VF LMEM BOs in
pf_provision_vf_lmem(), will fail xe_bo_vmap(bo) during suspend and
resume.

> diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
> index 754592c5cf881..c06f43fc9e4fe 100644
> --- a/drivers/gpu/drm/xe/xe_migrate.c
> +++ b/drivers/gpu/drm/xe/xe_migrate.c
> @@ -2093,6 +2093,22 @@ void xe_migrate_wait(struct xe_migrate *m)
>  		dma_fence_wait(m->fence, false);
>  }
>  
> +/**
> + * xe_migrate_can_blit() - Whether a migration context can issue blits
> + * @m: The migration context
> + *
> + * xe_migrate_copy() and xe_migrate_clear() emit blitter commands, which only
> + * the copy engine understands, and the copy engine lives on the primary GT.
> + * A tile without one can still update page tables, so its migration context
> + * is usable, but callers that want to move data have to do it themselves.
> + *
> + * Return: true if blit based copy and clear are available on @m.
> + */
> +bool xe_migrate_can_blit(struct xe_migrate *m)
> +{
> +	return m->tile->primary_gt;
> +}

[Severity: Medium]
Should xe_ttm_access_memory() and xe_vram_memtest() also check
xe_migrate_can_blit() before issuing blitter commands?

In xe_ttm_access_memory(), accesses with len >= SZ_16K unconditionally
call xe_migrate_access_memory(), which emits blitter copy instructions via
xe_migrate_vram() instead of using the CPU BAR memcpy loop right below it.
In xe_vram_memtest() (when CONFIG_DRM_XE_DEBUG_MEM is enabled), the probe
path checks tile->migrate and calls xe_migrate_clear(), which emits
blitter commands to the media migration queue and fails device probe with
-EIO.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261110231442.218721-13-stuart.summers@intel.com?part=9

[PATCH 10/11] drm/xe: Require a fully visible VRAM BAR without a primary GT

[Stuart Summers]

CPU copies can only reach VRAM that the BAR maps: xe_ttm_io_mem_reserve()
rejects any resource that is not entirely CPU visible.  With no primary
GT there is no copy engine to fall back on, so a small BAR would leave
most of VRAM unreachable.

Refuse to probe such a device rather than fail later on the first move.

Signed-off-by: Stuart Summers <stuart.summers@intel.com>
---
 drivers/gpu/drm/xe/xe_vram.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_vram.c b/drivers/gpu/drm/xe/xe_vram.c
index 1c02889ba29b..4d399a83479e 100644
--- a/drivers/gpu/drm/xe/xe_vram.c
+++ b/drivers/gpu/drm/xe/xe_vram.c
@@ -23,6 +23,7 @@
 #include "xe_mmio.h"
 #include "xe_sriov.h"
 #include "xe_tile.h"
+#include "xe_tile_printk.h"
 #include "xe_tile_sriov_vf.h"
 #include "xe_ttm_vram_mgr.h"
 #include "xe_vram.h"
@@ -346,6 +347,20 @@ int xe_vram_probe(struct xe_device *xe)
 		if (err)
 			return err;
 
+		/*
+		 * Without a primary GT there is no copy engine, so VRAM is
+		 * moved with the CPU through the BAR.  That only works if the
+		 * BAR covers all of it.
+		 */
+		if (!tile->primary_gt &&
+		    tile->mem.vram->io_size < tile->mem.vram->usable_size) {
+			xe_tile_err(tile,
+				    "VRAM is not fully CPU visible (%pa of %pa); a resizable BAR is required without a primary GT\n",
+				    &tile->mem.vram->io_size,
+				    &tile->mem.vram->usable_size);
+			return -ENODEV;
+		}
+
 		if (total_size > lmem_bar.io_size) {
 			xe_log_info(xe, VRAM,
 				    "Total size %#llx is larger than resource %#llx\n",
-- 
2.43.0

Re: [PATCH 10/11] drm/xe: Require a fully visible VRAM BAR without a primary GT

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [High] drm/xe: NULL deref of tile->primary_gt in tile_vram_size() in
  xe_vram_probe()
--

commit 5c01d4a69cb121bc624de632e7f741dd67a3eabc
Author: Stuart Summers <stuart.summers@intel.com>

drm/xe: Require a fully visible VRAM BAR without a primary GT

This commit rejects device probe in xe_vram_probe() if a tile has no
primary GT and its VRAM BAR is smaller than the tile's usable VRAM size.

> diff --git a/drivers/gpu/drm/xe/xe_vram.c b/drivers/gpu/drm/xe/xe_vram.c
> index 1c02889ba29b2..4d399a83479ef 100644
> --- a/drivers/gpu/drm/xe/xe_vram.c
> +++ b/drivers/gpu/drm/xe/xe_vram.c
[ ... ]
> @@ -346,6 +347,20 @@ int xe_vram_probe(struct xe_device *xe)
>  		if (err)
>  			return err;
>  
> +		/*
> +		 * Without a primary GT there is no copy engine, so VRAM is
> +		 * moved with the CPU through the BAR.  That only works if the
> +		 * BAR covers all of it.
> +		 */
> +		if (!tile->primary_gt &&
> +		    tile->mem.vram->io_size < tile->mem.vram->usable_size) {
> +			xe_tile_err(tile,
> +				    "VRAM is not fully CPU visible (%pa of %pa); a resizable BAR is required without a primary GT\n",
> +				    &tile->mem.vram->io_size,
> +				    &tile->mem.vram->usable_size);
> +			return -ENODEV;
> +		}
> +
>  		if (total_size > lmem_bar.io_size) {
>  			xe_log_info(xe, VRAM,
>  				    "Total size %#llx is larger than resource %#llx\n",

[Severity: High]
Can xe_vram_probe() reach this !tile->primary_gt check when
xe->info.has_flat_ccs is set, or does tile_vram_size() dereference a NULL
tile->primary_gt first?

Earlier in the same loop, xe_vram_probe() calls tile_vram_size(), which
passes tile->primary_gt to get_flat_ccs_offset():

drivers/gpu/drm/xe/xe_vram.c:tile_vram_size() {
	struct xe_device *xe = tile_to_xe(tile);
	struct xe_gt *gt = tile->primary_gt;
...
	if (xe->info.has_flat_ccs) {
		int ret = get_flat_ccs_offset(gt, *tile_size, &offset);
}

When a discrete GPU with Flat-CCS (such as Battlemage) is probed with
gt_types_allowed=media via configfs, xe->info.has_flat_ccs remains set
while tile->primary_gt is NULL, and get_flat_ccs_offset() immediately
dereferences gt via gt_to_xe(gt) and gt_to_fw(gt).

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261110231442.218721-13-stuart.summers@intel.com?part=10

[PATCH 11/11] drm/xe: Allow probe without a primary GT

[Stuart Summers]

Probe required a graphics IP and a primary GT, so the media only
combination the gt_types_allowed configfs attribute can ask for was
rejected outright.

Require instead that something is left to drive: at least one of the two
IPs has to be detected, and every tile has to end up with at least one
GT. The dgpu concern the old comment raised is covered by VRAM being a
graphics IP property, so a device without one has no VRAM to manage.

Signed-off-by: Stuart Summers <stuart.summers@intel.com>
---
 drivers/gpu/drm/xe/xe_pci.c | 25 +++++++++----------------
 1 file changed, 9 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 05aea5498a7b..e67b00557c0d 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -1029,11 +1029,11 @@ static int xe_probe_ips(struct xe_device *xe,
 	}
 
 	/*
-	 * If we couldn't detect the graphics IP, that's considered a fatal
-	 * error and we should abort driver load.  Failing to detect media
-	 * IP is non-fatal; we'll just proceed without enabling media support.
+	 * Either IP on its own is enough to go on with.  Only a device where
+	 * neither could be detected is a fatal error, since there would be
+	 * nothing left to drive.
 	 */
-	if (!probed_info->graphics_ip)
+	if (!probed_info->graphics_ip && !probed_info->media_ip)
 		return -ENODEV;
 
 	return 0;
@@ -1148,21 +1148,14 @@ static int xe_info_init(struct xe_device *xe,
 		if (IS_ERR(tile->primary_gt))
 			return PTR_ERR(tile->primary_gt);
 
-		/*
-		 * It's not currently possible to probe a device with the
-		 * primary GT disabled.  With some work, this may be future in
-		 * the possible for igpu platforms (although probably not for
-		 * dgpu's since access to the primary GT's BCS engines is
-		 * required for VRAM management).
-		 */
-		if (!tile->primary_gt) {
-			drm_err(&xe->drm, "Cannot probe device with without a primary GT\n");
-			return -ENODEV;
-		}
-
 		tile->media_gt = alloc_media_gt(tile, media_desc);
 		if (IS_ERR(tile->media_gt))
 			return PTR_ERR(tile->media_gt);
+
+		if (!tile->primary_gt && !tile->media_gt) {
+			xe_tile_err(tile, "Cannot probe tile without any GT\n");
+			return -ENODEV;
+		}
 	}
 
 	/*
-- 
2.43.0

Re: [PATCH 11/11] drm/xe: Allow probe without a primary GT

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 8 potential
issues to consider:
- [High] drm/xe: graphics_desc features left enabled in xe_info_init()
  on media-only GT
- [High] drm/xe: xe_probe_ips() without graphics_ip leaves
  GRAPHICS_VERx100(xe) at 0
- [High] drm/xe: has_page_reclaim_hw_assist left set causes NULL deref
  in xe_pt.c
- [High] drm/xe: pick_engine_gt() returns NULL primary_gt in
  gt_irq_handler()
- [Medium] drm/xe: xe_ggtt_init() skipped in gt_init_with_gt_forcewake()
  without primary GT
- [Medium] drm/xe: unchecked tile->primary_gt dereference in xe_svm.c
  TLB inval stats
- [Low] drm/xe: xe_vram_memtest() calls xe_migrate_clear() when tile
  cannot blit
- [Low] drm/xe: commit message inaccurately claims VRAM is a graphics IP
  property
--

commit d8aec1e526d9f27e3b37444973501f4b05a0116d
Author: Stuart Summers <stuart.summers@intel.com>

drm/xe: Allow probe without a primary GT

This commit allows probing a device as long as either a graphics or media IP
is detected and each tile ends up with at least one GT.

> The dgpu concern the old comment raised is covered by VRAM being a
> graphics IP property, so a device without one has no VRAM to manage.

[Severity: Low]
Is this explanation in the commit message accurate?  xe->info.is_dgfx comes
from struct xe_device_desc rather than graphics_ip, so discrete devices
without a graphics IP or primary GT still allocate and probe VRAM, and
earlier commits in this series ("drm/xe: Fall back to CPU copies when the
tile cannot blit" and "drm/xe: Require a fully visible VRAM BAR without a
primary GT") handle VRAM management without a primary GT.

> diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> index e4220cb0cc298..26b20fa114d2b 100644
> --- a/drivers/gpu/drm/xe/xe_pci.c
> +++ b/drivers/gpu/drm/xe/xe_pci.c
> @@ -1028,11 +1028,11 @@ static int xe_probe_ips(struct xe_device *xe,
>  	}
>  
>  	/*
> -	 * If we couldn't detect the graphics IP, that's considered a fatal
> -	 * error and we should abort driver load.  Failing to detect media
> -	 * IP is non-fatal; we'll just proceed without enabling media support.
> +	 * Either IP on its own is enough to go on with.  Only a device where
> +	 * neither could be detected is a fatal error, since there would be
> +	 * nothing left to drive.
>  	 */
> -	if (!probed_info->graphics_ip)
> +	if (!probed_info->graphics_ip && !probed_info->media_ip)
>  		return -ENODEV;
>  
>  	return 0;

[Severity: High]
When probed_info->graphics_ip is NULL, xe->info.graphics_verx100 remains 0.
On any post-Meteor Lake GMD_ID platform, won't xe_pat_init_early() match
GRAPHICS_VERx100(xe) <= 1210 and select xelp_pat_ops, causing a NULL
function pointer dereference in xe_pat_init() when calling
xe->pat.ops->program_media on the media GT?

drivers/gpu/drm/xe/xe_pat.c:xe_pat_init_early() {
	...
	} else if (GRAPHICS_VERx100(xe) <= 1210) {
		WARN_ON_ONCE(!IS_DGFX(xe) && !xe->info.has_llc);
		xe->pat.ops = &xelp_pat_ops;
}

Having GRAPHICS_VERx100(xe) == 0 also causes xe_ggtt_init_early(),
read_media_fuses(), and the IRQ handlers in xe_irq.c to take legacy pre-1250
and pre-1210 branches.

> @@ -1147,21 +1147,14 @@ static int xe_info_init(struct xe_device *xe,
>  		if (IS_ERR(tile->primary_gt))
>  			return PTR_ERR(tile->primary_gt);
>  
> -		/*
> -		 * It's not currently possible to probe a device with the
> -		 * primary GT disabled.  With some work, this may be future in
> -		 * the possible for igpu platforms (although probably not for
> -		 * dgpu's since access to the primary GT's BCS engines is
> -		 * required for VRAM management).
> -		 */
> -		if (!tile->primary_gt) {
> -			drm_err(&xe->drm, "Cannot probe device with without a primary GT\n");
> -			return -ENODEV;
> -		}
> -
>  		tile->media_gt = alloc_media_gt(tile, media_desc);
>  		if (IS_ERR(tile->media_gt))
>  			return PTR_ERR(tile->media_gt);
> +
> +		if (!tile->primary_gt && !tile->media_gt) {
> +			xe_tile_err(tile, "Cannot probe tile without any GT\n");
> +			return -ENODEV;
> +		}
>  	}

[Severity: High]
When gt_types_allowed=media is set in configfs on a platform with a physical
graphics IP, handle_gmdid() still populates probed_info->graphics_ip, so
xe_info_init() sets xe->info.has_usm from graphics_desc and leaves
xe->info.has_flat_ccs enabled while alloc_primary_gt() returns NULL.  Does
this cause NULL pointer dereferences during probe in get_flat_ccs_offset()
(called with tile->primary_gt from tile_vram_size()) and in
xe_migrate_prepare_vm() (which dereferences
xe_tile_pt_gt(tile)->usm.bb_pool->bo, whereas gt->usm.bb_pool is only
allocated when xe_gt_is_main_type(gt))?

[Severity: High]
Can a VMA unbind dereference a NULL tile->primary_gt when
xe->info.has_page_reclaim_hw_assist is enabled (such as on Nova Lake-P)?
xe_info_init() does not clear has_page_reclaim_hw_assist when probing
without a primary GT, so unbind_op_prepare() allocates a page reclaim list
and generate_reclaim_entry() passes gt = tile->primary_gt to
xe_gt_stats_incr() and xe_page_reclaim_list_abort().

[Severity: High]
When a tile probes without a primary GT, can an interrupt such as PXP's
OTHER_KCR_INSTANCE dereference NULL in gt_irq_handler()?  pick_engine_gt()
falls through to return tile->primary_gt for any class/instance not
explicitly listed for media_gt, and gt_irq_handler() passes that NULL
engine_gt to xe_gt_hw_engine() and gt_other_irq_handler() before checking
for OTHER_KCR_INSTANCE:

drivers/gpu/drm/xe/xe_irq.c:gt_irq_handler() {
			...
			engine_gt = pick_engine_gt(tile, class, instance);

			hwe = xe_gt_hw_engine(engine_gt, class, instance, false);
			if (hwe) {
				xe_hw_engine_handle_irq(hwe, intr_vec);
				continue;
			}

			if (class == XE_ENGINE_CLASS_OTHER) {
				if (xe->info.has_heci_gscfi && instance == OTHER_GSC_INSTANCE)
					xe_heci_gsc_irq_handler(xe, intr_vec);
				else if (instance == OTHER_KCR_INSTANCE)
					xe_pxp_irq_handler(xe, intr_vec);
				else
					gt_other_irq_handler(engine_gt, instance, intr_vec);
			}
}

[Severity: Medium]
Does probing a tile without a primary GT skip xe_ggtt_init()?  Commit
"drm/xe: Run page table updates on the media GT when there is no primary"
updated the xe_migrate_init() check in gt_init_with_all_forcewake() to test
gt == xe_tile_pt_gt(gt_to_tile(gt)), but gt_init_with_gt_forcewake() still
guards xe_ggtt_init(gt_to_tile(gt)->mem.ggtt) with if (xe_gt_is_main_type(gt)),
leaving ggtt->scratch unallocated and skipping initial GGTT PTE clearing.

[Severity: Medium]
In xe_svm_range_notifier_event_begin() and xe_svm_invalidate(), tile->media_gt
is checked for NULL before updating TLB invalidation stats, but
tile->primary_gt is passed unconditionally:

drivers/gpu/drm/xe/xe_svm.c:xe_svm_invalidate() {
	...
	for_each_tile(tile, xe, id) {
		if (tile_mask & BIT(id)) {
			xe_svm_tlb_inval_us_stats_incr(tile->primary_gt, start);
			if (tile->media_gt)
				xe_svm_tlb_inval_us_stats_incr(tile->media_gt, start);
}

Won't this dereference a NULL gt in xe_gt_stats_incr() during SVM
invalidation when tile->primary_gt is NULL?

[Severity: Low]
When CONFIG_DRM_XE_DEBUG_MEM is enabled on a discrete GPU without a primary
GT, does xe_vram_memtest() fail probe by calling xe_migrate_clear() without
checking xe_migrate_can_blit(tile->migrate), emitting BCS blitter clear
commands to a media engine?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261110231442.218721-13-stuart.summers@intel.com?part=11

✓ CI.KUnit: success for Allow boot with only media GT

[Patchwork]

== Series Details ==

Series: Allow boot with only media GT
URL   : https://patchwork.freedesktop.org/series/178247/
State : success

== Summary ==

+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[23:37:15] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:37:20] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:37:41] Starting KUnit Kernel (1/1)...
[23:37:41] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:37:41] ================= gpu_buddy (14 subtests) ==================
[23:37:41] [PASSED] gpu_test_buddy_alloc_limit
[23:37:41] [PASSED] gpu_test_buddy_alloc_optimistic
[23:37:41] [PASSED] gpu_test_buddy_alloc_pessimistic
[23:37:41] [PASSED] gpu_test_buddy_alloc_pathological
[23:37:41] [PASSED] gpu_test_buddy_alloc_contiguous
[23:37:41] [PASSED] gpu_test_buddy_alloc_clear
[23:37:41] [PASSED] gpu_test_buddy_alloc_range
[23:37:41] [PASSED] gpu_test_buddy_alloc_range_bias
[23:37:42] [PASSED] gpu_test_buddy_fragmentation_performance
[23:37:43] [PASSED] gpu_test_buddy_dirty_tracker_performance
[23:37:43] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[23:37:43] [PASSED] gpu_test_buddy_offset_aligned_allocation
[23:37:43] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[23:37:43] [PASSED] gpu_test_buddy_addr_to_block
[23:37:43] ==================== [PASSED] gpu_buddy ====================
[23:37:43] ============================================================
[23:37:43] Testing complete. Ran 14 tests: passed: 14
[23:37:43] Elapsed time: 28.116s total, 5.087s configuring, 20.961s building, 2.000s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[23:37:43] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:37:46] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:38:25] Starting KUnit Kernel (1/1)...
[23:38:25] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:38:25] ================== guc_buf (11 subtests) ===================
[23:38:25] [PASSED] test_smallest
[23:38:25] [PASSED] test_largest
[23:38:25] [PASSED] test_granular
[23:38:25] [PASSED] test_unique
[23:38:25] [PASSED] test_overlap
[23:38:25] [PASSED] test_reusable
[23:38:25] [PASSED] test_too_big
[23:38:25] [PASSED] test_flush
[23:38:25] [PASSED] test_lookup
[23:38:25] [PASSED] test_data
[23:38:25] [PASSED] test_class
[23:38:25] ===================== [PASSED] guc_buf =====================
[23:38:25] =================== guc_dbm (7 subtests) ===================
[23:38:25] [PASSED] test_empty
[23:38:25] [PASSED] test_default
[23:38:25] ======================== test_size  ========================
[23:38:25] [PASSED] 4
[23:38:25] [PASSED] 8
[23:38:25] [PASSED] 32
[23:38:25] [PASSED] 256
[23:38:25] ==================== [PASSED] test_size ====================
[23:38:25] ======================= test_reuse  ========================
[23:38:25] [PASSED] 4
[23:38:25] [PASSED] 8
[23:38:25] [PASSED] 32
[23:38:25] [PASSED] 256
[23:38:25] =================== [PASSED] test_reuse ====================
[23:38:25] =================== test_range_overlap  ====================
[23:38:25] [PASSED] 4
[23:38:25] [PASSED] 8
[23:38:25] [PASSED] 32
[23:38:25] [PASSED] 256
[23:38:25] =============== [PASSED] test_range_overlap ================
[23:38:25] =================== test_range_compact  ====================
[23:38:25] [PASSED] 4
[23:38:25] [PASSED] 8
[23:38:25] [PASSED] 32
[23:38:25] [PASSED] 256
[23:38:25] =============== [PASSED] test_range_compact ================
[23:38:25] ==================== test_range_spare  =====================
[23:38:25] [PASSED] 4
[23:38:25] [PASSED] 8
[23:38:25] [PASSED] 32
[23:38:25] [PASSED] 256
[23:38:25] ================ [PASSED] test_range_spare =================
[23:38:25] ===================== [PASSED] guc_dbm =====================
[23:38:25] ================== guc_idm (22 subtests) ===================
[23:38:25] [PASSED] bad_init
[23:38:25] [PASSED] no_init
[23:38:25] [PASSED] init_fini
[23:38:25] [PASSED] check_init_small
[23:38:25] [PASSED] check_init_shared
[23:38:25] [PASSED] check_used
[23:38:25] [PASSED] check_quota
[23:38:25] [PASSED] check_all
[23:38:25] [PASSED] check_limits
[23:38:25] [PASSED] check_overlap
[23:38:25] [PASSED] check_overlap_alloc
[23:38:25] [PASSED] check_overlap_release
[23:38:25] [PASSED] check_overlap_partial_init
[23:38:25] [PASSED] check_overlap_partial_shared_range_blocking
[23:38:25] [PASSED] check_used_usable
[23:38:25] [PASSED] check_used_shareable
[23:38:25] [PASSED] check_used_mixed
[23:38:25] [PASSED] check_release_usable_range
[23:38:25] [PASSED] check_release_shareable_range
[23:38:25] [PASSED] check_split_boundaries
[23:38:25] [PASSED] check_shareable_spare
[23:38:25] [PASSED] check_shareable_spare_fragmented_tail
[23:38:25] ===================== [PASSED] guc_idm =====================
[23:38:25] ============== guc_klv_helpers (13 subtests) ===============
[23:38:25] [PASSED] test_count
[23:38:25] [PASSED] test_encode_u32
[23:38:25] [PASSED] test_encode_u64
[23:38:25] [PASSED] test_encode_string
[23:38:25] [PASSED] test_encode_object_raw
[23:38:25] [PASSED] test_encode_object_klv
[23:38:25] [PASSED] test_encode_object_nested
[23:38:25] [PASSED] test_encode_object_basic
[23:38:25] ===================== test_decode_u16  =====================
[23:38:25] [PASSED] empty
[23:38:25] [PASSED] valid
[23:38:25] [PASSED] max
[23:38:25] [PASSED] big
[23:38:25] [PASSED] long
[23:38:25] ================= [PASSED] test_decode_u16 =================
[23:38:25] ===================== test_decode_u32  =====================
[23:38:25] [PASSED] empty
[23:38:25] [PASSED] valid
[23:38:25] [PASSED] max
[23:38:25] [PASSED] long
[23:38:25] ================= [PASSED] test_decode_u32 =================
[23:38:25] ===================== test_decode_u64  =====================
[23:38:25] [PASSED] empty
[23:38:25] [PASSED] short
[23:38:25] [PASSED] valid
[23:38:25] [PASSED] max
[23:38:25] [PASSED] long
[23:38:25] ================= [PASSED] test_decode_u64 =================
[23:38:25] ===================== test_decode_str  =====================
[23:38:25] [PASSED] empty
[23:38:25] [PASSED] one
[23:38:25] [PASSED] one_trash
[23:38:25] [PASSED] two
[23:38:25] [PASSED] two_trash
[23:38:25] [PASSED] three
[23:38:25] [PASSED] dword
[23:38:25] [PASSED] four
[23:38:25] [PASSED] five
[23:38:25] [PASSED] six
[23:38:25] [PASSED] seven
[23:38:25] [PASSED] qword
[23:38:25] ================= [PASSED] test_decode_str =================
[23:38:25] [PASSED] test_print
[23:38:25] ================= [PASSED] guc_klv_helpers =================
[23:38:25] =================== xe_log (4 subtests) ====================
[23:38:25] [PASSED] demo_cper
[23:38:25] [PASSED] demo_dmesg
[23:38:25] ======================= test_dmesg  ========================
[23:38:25] [PASSED] test_fatal
[23:38:25] [PASSED] test_fatal_tile
[23:38:25] [PASSED] test_fatal_gt
[23:38:25] [PASSED] test_fatal_comp
[23:38:25] [PASSED] test_fatal_comp_tile
[23:38:25] [PASSED] test_fatal_comp_gt
[23:38:25] [PASSED] test_fatal_all
[23:38:25] [PASSED] test_recoverable
[23:38:25] [PASSED] test_recoverable_tile
[23:38:25] [PASSED] test_recoverable_gt
[23:38:25] [PASSED] test_recoverable_comp
[23:38:25] [PASSED] test_recoverable_comp_tile
[23:38:25] [PASSED] test_recoverable_comp_gt
[23:38:25] [PASSED] test_recoverable_all
[23:38:25] [PASSED] test_info
[23:38:25] [PASSED] test_info_tile
[23:38:25] [PASSED] test_info_gt
[23:38:25] [PASSED] test_info_err
[23:38:25] [PASSED] test_info_comp
[23:38:25] [PASSED] test_info_comp_tile
[23:38:25] [PASSED] test_info_comp_gt
[23:38:25] [PASSED] test_info_all
[23:38:25] [PASSED] test_hw_fatal
[23:38:25] [PASSED] test_hw_recoverable
[23:38:25] [PASSED] test_hw_corrected
[23:38:25] [PASSED] test_hw_informational
[23:38:25] =================== [PASSED] test_dmesg ====================
[23:38:25] ====================== test_invalid  =======================
[23:38:25] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[23:38:25] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[23:38:25] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[23:38:25] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[23:38:25] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[23:38:25] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[23:38:25] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[23:38:25] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[23:38:25] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[23:38:25] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[23:38:25] ================== [SKIPPED] test_invalid ==================
[23:38:25] ===================== [PASSED] xe_log ======================
[23:38:25] ================== no_relay (3 subtests) ===================
[23:38:25] [PASSED] xe_drops_guc2pf_if_not_ready
[23:38:25] [PASSED] xe_drops_guc2vf_if_not_ready
[23:38:25] [PASSED] xe_rejects_send_if_not_ready
[23:38:25] ==================== [PASSED] no_relay =====================
[23:38:25] ================== pf_relay (14 subtests) ==================
[23:38:25] [PASSED] pf_rejects_guc2pf_too_short
[23:38:25] [PASSED] pf_rejects_guc2pf_too_long
[23:38:25] [PASSED] pf_rejects_guc2pf_no_payload
[23:38:25] [PASSED] pf_fails_no_payload
[23:38:25] [PASSED] pf_fails_bad_origin
[23:38:25] [PASSED] pf_fails_bad_type
[23:38:25] [PASSED] pf_txn_reports_error
[23:38:25] [PASSED] pf_txn_sends_pf2guc
[23:38:25] [PASSED] pf_sends_pf2guc
[23:38:25] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[23:38:25] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[23:38:25] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[23:38:25] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[23:38:25] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[23:38:25] ==================== [PASSED] pf_relay =====================
[23:38:25] ================== vf_relay (3 subtests) ===================
[23:38:25] [PASSED] vf_rejects_guc2vf_too_short
[23:38:25] [PASSED] vf_rejects_guc2vf_too_long
[23:38:25] [PASSED] vf_rejects_guc2vf_no_payload
[23:38:25] ==================== [PASSED] vf_relay =====================
[23:38:25] ================ pf_gt_config (9 subtests) =================
[23:38:25] [PASSED] fair_contexts_1vf
[23:38:25] [PASSED] fair_doorbells_1vf
[23:38:25] [PASSED] fair_ggtt_1vf
[23:38:25] ====================== fair_vram_1vf  ======================
[23:38:25] [PASSED] 3.50 GiB
[23:38:25] [PASSED] 11.5 GiB
[23:38:25] [PASSED] 15.5 GiB
[23:38:25] [PASSED] 31.5 GiB
[23:38:25] [PASSED] 63.5 GiB
[23:38:25] [PASSED] 1.91 GiB
[23:38:25] ================== [PASSED] fair_vram_1vf ==================
[23:38:25] ================ fair_vram_1vf_admin_only  =================
[23:38:25] [PASSED] 3.50 GiB
[23:38:25] [PASSED] 11.5 GiB
[23:38:25] [PASSED] 15.5 GiB
[23:38:25] [PASSED] 31.5 GiB
[23:38:25] [PASSED] 63.5 GiB
[23:38:25] [PASSED] 1.91 GiB
[23:38:25] ============ [PASSED] fair_vram_1vf_admin_only =============
[23:38:25] ====================== fair_contexts  ======================
[23:38:25] [PASSED] 1 VF
[23:38:25] [PASSED] 2 VFs
[23:38:25] [PASSED] 3 VFs
[23:38:25] [PASSED] 4 VFs
[23:38:25] [PASSED] 5 VFs
[23:38:25] [PASSED] 6 VFs
[23:38:25] [PASSED] 7 VFs
[23:38:25] [PASSED] 8 VFs
[23:38:25] [PASSED] 9 VFs
[23:38:25] [PASSED] 10 VFs
[23:38:25] [PASSED] 11 VFs
[23:38:25] [PASSED] 12 VFs
[23:38:25] [PASSED] 13 VFs
[23:38:25] [PASSED] 14 VFs
[23:38:25] [PASSED] 15 VFs
[23:38:25] [PASSED] 16 VFs
[23:38:25] [PASSED] 17 VFs
[23:38:25] [PASSED] 18 VFs
[23:38:25] [PASSED] 19 VFs
[23:38:25] [PASSED] 20 VFs
[23:38:25] [PASSED] 21 VFs
[23:38:25] [PASSED] 22 VFs
[23:38:25] [PASSED] 23 VFs
[23:38:25] [PASSED] 24 VFs
[23:38:25] [PASSED] 25 VFs
[23:38:25] [PASSED] 26 VFs
[23:38:25] [PASSED] 27 VFs
[23:38:25] [PASSED] 28 VFs
[23:38:25] [PASSED] 29 VFs
[23:38:25] [PASSED] 30 VFs
[23:38:25] [PASSED] 31 VFs
[23:38:25] [PASSED] 32 VFs
[23:38:25] [PASSED] 33 VFs
[23:38:25] [PASSED] 34 VFs
[23:38:25] [PASSED] 35 VFs
[23:38:25] [PASSED] 36 VFs
[23:38:25] [PASSED] 37 VFs
[23:38:25] [PASSED] 38 VFs
[23:38:25] [PASSED] 39 VFs
[23:38:25] [PASSED] 40 VFs
[23:38:25] [PASSED] 41 VFs
[23:38:25] [PASSED] 42 VFs
[23:38:25] [PASSED] 43 VFs
[23:38:25] [PASSED] 44 VFs
[23:38:25] [PASSED] 45 VFs
[23:38:25] [PASSED] 46 VFs
[23:38:25] [PASSED] 47 VFs
[23:38:25] [PASSED] 48 VFs
[23:38:25] [PASSED] 49 VFs
[23:38:25] [PASSED] 50 VFs
[23:38:25] [PASSED] 51 VFs
[23:38:25] [PASSED] 52 VFs
[23:38:25] [PASSED] 53 VFs
[23:38:25] [PASSED] 54 VFs
[23:38:25] [PASSED] 55 VFs
[23:38:25] [PASSED] 56 VFs
[23:38:25] [PASSED] 57 VFs
[23:38:25] [PASSED] 58 VFs
[23:38:25] [PASSED] 59 VFs
[23:38:25] [PASSED] 60 VFs
[23:38:25] [PASSED] 61 VFs
[23:38:25] [PASSED] 62 VFs
[23:38:25] [PASSED] 63 VFs
[23:38:25] ================== [PASSED] fair_contexts ==================
[23:38:25] ===================== fair_doorbells  ======================
[23:38:25] [PASSED] 1 VF
[23:38:25] [PASSED] 2 VFs
[23:38:25] [PASSED] 3 VFs
[23:38:25] [PASSED] 4 VFs
[23:38:25] [PASSED] 5 VFs
[23:38:25] [PASSED] 6 VFs
[23:38:25] [PASSED] 7 VFs
[23:38:25] [PASSED] 8 VFs
[23:38:25] [PASSED] 9 VFs
[23:38:25] [PASSED] 10 VFs
[23:38:25] [PASSED] 11 VFs
[23:38:25] [PASSED] 12 VFs
[23:38:25] [PASSED] 13 VFs
[23:38:25] [PASSED] 14 VFs
[23:38:25] [PASSED] 15 VFs
[23:38:25] [PASSED] 16 VFs
[23:38:25] [PASSED] 17 VFs
[23:38:25] [PASSED] 18 VFs
[23:38:25] [PASSED] 19 VFs
[23:38:25] [PASSED] 20 VFs
[23:38:25] [PASSED] 21 VFs
[23:38:25] [PASSED] 22 VFs
[23:38:25] [PASSED] 23 VFs
[23:38:25] [PASSED] 24 VFs
[23:38:25] [PASSED] 25 VFs
[23:38:25] [PASSED] 26 VFs
[23:38:25] [PASSED] 27 VFs
[23:38:25] [PASSED] 28 VFs
[23:38:25] [PASSED] 29 VFs
[23:38:25] [PASSED] 30 VFs
[23:38:25] [PASSED] 31 VFs
[23:38:25] [PASSED] 32 VFs
[23:38:25] [PASSED] 33 VFs
[23:38:25] [PASSED] 34 VFs
[23:38:25] [PASSED] 35 VFs
[23:38:25] [PASSED] 36 VFs
[23:38:25] [PASSED] 37 VFs
[23:38:25] [PASSED] 38 VFs
[23:38:25] [PASSED] 39 VFs
[23:38:25] [PASSED] 40 VFs
[23:38:25] [PASSED] 41 VFs
[23:38:25] [PASSED] 42 VFs
[23:38:25] [PASSED] 43 VFs
[23:38:25] [PASSED] 44 VFs
[23:38:25] [PASSED] 45 VFs
[23:38:25] [PASSED] 46 VFs
[23:38:25] [PASSED] 47 VFs
[23:38:25] [PASSED] 48 VFs
[23:38:25] [PASSED] 49 VFs
[23:38:25] [PASSED] 50 VFs
[23:38:25] [PASSED] 51 VFs
[23:38:25] [PASSED] 52 VFs
[23:38:25] [PASSED] 53 VFs
[23:38:25] [PASSED] 54 VFs
[23:38:25] [PASSED] 55 VFs
[23:38:25] [PASSED] 56 VFs
[23:38:25] [PASSED] 57 VFs
[23:38:25] [PASSED] 58 VFs
[23:38:25] [PASSED] 59 VFs
[23:38:25] [PASSED] 60 VFs
[23:38:25] [PASSED] 61 VFs
[23:38:25] [PASSED] 62 VFs
[23:38:25] [PASSED] 63 VFs
[23:38:25] ================= [PASSED] fair_doorbells ==================
[23:38:25] ======================== fair_ggtt  ========================
[23:38:25] [PASSED] 1 VF
[23:38:25] [PASSED] 2 VFs
[23:38:25] [PASSED] 3 VFs
[23:38:25] [PASSED] 4 VFs
[23:38:25] [PASSED] 5 VFs
[23:38:25] [PASSED] 6 VFs
[23:38:25] [PASSED] 7 VFs
[23:38:25] [PASSED] 8 VFs
[23:38:25] [PASSED] 9 VFs
[23:38:25] [PASSED] 10 VFs
[23:38:25] [PASSED] 11 VFs
[23:38:25] [PASSED] 12 VFs
[23:38:25] [PASSED] 13 VFs
[23:38:25] [PASSED] 14 VFs
[23:38:25] [PASSED] 15 VFs
[23:38:25] [PASSED] 16 VFs
[23:38:25] [PASSED] 17 VFs
[23:38:25] [PASSED] 18 VFs
[23:38:25] [PASSED] 19 VFs
[23:38:25] [PASSED] 20 VFs
[23:38:25] [PASSED] 21 VFs
[23:38:25] [PASSED] 22 VFs
[23:38:25] [PASSED] 23 VFs
[23:38:25] [PASSED] 24 VFs
[23:38:25] [PASSED] 25 VFs
[23:38:25] [PASSED] 26 VFs
[23:38:25] [PASSED] 27 VFs
[23:38:25] [PASSED] 28 VFs
[23:38:25] [PASSED] 29 VFs
[23:38:25] [PASSED] 30 VFs
[23:38:25] [PASSED] 31 VFs
[23:38:25] [PASSED] 32 VFs
[23:38:25] [PASSED] 33 VFs
[23:38:25] [PASSED] 34 VFs
[23:38:25] [PASSED] 35 VFs
[23:38:25] [PASSED] 36 VFs
[23:38:25] [PASSED] 37 VFs
[23:38:25] [PASSED] 38 VFs
[23:38:25] [PASSED] 39 VFs
[23:38:25] [PASSED] 40 VFs
[23:38:25] [PASSED] 41 VFs
[23:38:25] [PASSED] 42 VFs
[23:38:25] [PASSED] 43 VFs
[23:38:25] [PASSED] 44 VFs
[23:38:25] [PASSED] 45 VFs
[23:38:25] [PASSED] 46 VFs
[23:38:25] [PASSED] 47 VFs
[23:38:25] [PASSED] 48 VFs
[23:38:25] [PASSED] 49 VFs
[23:38:25] [PASSED] 50 VFs
[23:38:25] [PASSED] 51 VFs
[23:38:25] [PASSED] 52 VFs
[23:38:25] [PASSED] 53 VFs
[23:38:25] [PASSED] 54 VFs
[23:38:25] [PASSED] 55 VFs
[23:38:25] [PASSED] 56 VFs
[23:38:25] [PASSED] 57 VFs
[23:38:25] [PASSED] 58 VFs
[23:38:25] [PASSED] 59 VFs
[23:38:25] [PASSED] 60 VFs
[23:38:25] [PASSED] 61 VFs
[23:38:25] [PASSED] 62 VFs
[23:38:25] [PASSED] 63 VFs
[23:38:25] ==================== [PASSED] fair_ggtt ====================
[23:38:25] ======================== fair_vram  ========================
[23:38:25] [PASSED] 1 VF
[23:38:25] [PASSED] 2 VFs
[23:38:25] [PASSED] 3 VFs
[23:38:25] [PASSED] 4 VFs
[23:38:25] [PASSED] 5 VFs
[23:38:25] [PASSED] 6 VFs
[23:38:25] [PASSED] 7 VFs
[23:38:25] [PASSED] 8 VFs
[23:38:25] [PASSED] 9 VFs
[23:38:25] [PASSED] 10 VFs
[23:38:25] [PASSED] 11 VFs
[23:38:25] [PASSED] 12 VFs
[23:38:25] [PASSED] 13 VFs
[23:38:25] [PASSED] 14 VFs
[23:38:25] [PASSED] 15 VFs
[23:38:25] [PASSED] 16 VFs
[23:38:25] [PASSED] 17 VFs
[23:38:25] [PASSED] 18 VFs
[23:38:25] [PASSED] 19 VFs
[23:38:25] [PASSED] 20 VFs
[23:38:25] [PASSED] 21 VFs
[23:38:25] [PASSED] 22 VFs
[23:38:25] [PASSED] 23 VFs
[23:38:25] [PASSED] 24 VFs
[23:38:25] [PASSED] 25 VFs
[23:38:25] [PASSED] 26 VFs
[23:38:25] [PASSED] 27 VFs
[23:38:25] [PASSED] 28 VFs
[23:38:25] [PASSED] 29 VFs
[23:38:25] [PASSED] 30 VFs
[23:38:25] [PASSED] 31 VFs
[23:38:25] [PASSED] 32 VFs
[23:38:25] [PASSED] 33 VFs
[23:38:25] [PASSED] 34 VFs
[23:38:25] [PASSED] 35 VFs
[23:38:25] [PASSED] 36 VFs
[23:38:25] [PASSED] 37 VFs
[23:38:25] [PASSED] 38 VFs
[23:38:25] [PASSED] 39 VFs
[23:38:25] [PASSED] 40 VFs
[23:38:25] [PASSED] 41 VFs
[23:38:25] [PASSED] 42 VFs
[23:38:25] [PASSED] 43 VFs
[23:38:25] [PASSED] 44 VFs
[23:38:25] [PASSED] 45 VFs
[23:38:25] [PASSED] 46 VFs
[23:38:25] [PASSED] 47 VFs
[23:38:25] [PASSED] 48 VFs
[23:38:25] [PASSED] 49 VFs
[23:38:25] [PASSED] 50 VFs
[23:38:25] [PASSED] 51 VFs
[23:38:25] [PASSED] 52 VFs
[23:38:25] [PASSED] 53 VFs
[23:38:25] [PASSED] 54 VFs
[23:38:25] [PASSED] 55 VFs
[23:38:25] [PASSED] 56 VFs
[23:38:25] [PASSED] 57 VFs
[23:38:25] [PASSED] 58 VFs
[23:38:25] [PASSED] 59 VFs
[23:38:25] [PASSED] 60 VFs
[23:38:25] [PASSED] 61 VFs
[23:38:25] [PASSED] 62 VFs
[23:38:25] [PASSED] 63 VFs
[23:38:25] ==================== [PASSED] fair_vram ====================
[23:38:25] ================== [PASSED] pf_gt_config ===================
[23:38:25] ===================== lmtt (1 subtest) =====================
[23:38:25] ======================== test_ops  =========================
[23:38:25] [PASSED] 2-level
[23:38:25] [PASSED] multi-level
[23:38:25] ==================== [PASSED] test_ops =====================
[23:38:25] ====================== [PASSED] lmtt =======================
[23:38:25] ================= sriov_packet (1 subtest) =================
[23:38:25] [PASSED] test_descriptor_init
[23:38:25] ================== [PASSED] sriov_packet ===================
[23:38:25] ================= pf_service (11 subtests) =================
[23:38:25] [PASSED] pf_negotiate_any
[23:38:25] [PASSED] pf_negotiate_base_match
[23:38:25] [PASSED] pf_negotiate_base_newer
[23:38:25] [PASSED] pf_negotiate_base_next
[23:38:25] [SKIPPED] pf_negotiate_base_older (no older minor)
[23:38:25] [PASSED] pf_negotiate_base_prev
[23:38:25] [PASSED] pf_negotiate_latest_match
[23:38:25] [PASSED] pf_negotiate_latest_newer
[23:38:25] [PASSED] pf_negotiate_latest_next
[23:38:25] [SKIPPED] pf_negotiate_latest_older (no older minor)
[23:38:25] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[23:38:25] =================== [PASSED] pf_service ====================
[23:38:25] ================= xe_guc_g2g (2 subtests) ==================
[23:38:25] ============== xe_live_guc_g2g_kunit_default  ==============
[23:38:25] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[23:38:25] ============== xe_live_guc_g2g_kunit_allmem  ===============
[23:38:25] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[23:38:25] =================== [SKIPPED] xe_guc_g2g ===================
[23:38:25] =================== xe_mocs (2 subtests) ===================
[23:38:25] ================ xe_live_mocs_kernel_kunit  ================
[23:38:25] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[23:38:25] ================ xe_live_mocs_reset_kunit  =================
[23:38:25] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[23:38:25] ==================== [SKIPPED] xe_mocs =====================
[23:38:25] ================= xe_migrate (3 subtests) ==================
[23:38:25] ================= xe_migrate_sanity_kunit  =================
[23:38:25] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[23:38:25] ================== xe_validate_ccs_kunit  ==================
[23:38:25] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[23:38:25] ============= xe_migrate_access_memory_kunit  ==============
[23:38:25] ========= [SKIPPED] xe_migrate_access_memory_kunit =========
[23:38:25] =================== [SKIPPED] xe_migrate ===================
[23:38:25] ================== xe_dma_buf (1 subtest) ==================
[23:38:25] ==================== xe_dma_buf_kunit  =====================
[23:38:25] ================ [SKIPPED] xe_dma_buf_kunit ================
[23:38:25] =================== [SKIPPED] xe_dma_buf ===================
[23:38:25] ================= xe_bo_shrink (1 subtest) =================
[23:38:25] =================== xe_bo_shrink_kunit  ====================
[23:38:25] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[23:38:25] ================== [SKIPPED] xe_bo_shrink ==================
[23:38:25] ==================== xe_bo (2 subtests) ====================
[23:38:25] ================== xe_ccs_migrate_kunit  ===================
[23:38:25] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[23:38:25] ==================== xe_bo_evict_kunit  ====================
[23:38:25] =============== [SKIPPED] xe_bo_evict_kunit ================
[23:38:25] ===================== [SKIPPED] xe_bo ======================
[23:38:25] =================== xe_any (9 subtests) ====================
[23:38:25] [PASSED] test_to_xe
[23:38:25] [PASSED] test_to_dev
[23:38:25] [PASSED] test_to_pdev
[23:38:25] [PASSED] test_to_drm
[23:38:25] [PASSED] test_if_pdev
[23:38:25] [PASSED] test_if_xe
[23:38:25] [PASSED] test_if_tile
[23:38:25] [PASSED] test_if_gt
[23:38:25] [PASSED] test_to_id
[23:38:25] ===================== [PASSED] xe_any ======================
[23:38:25] ==================== args (13 subtests) ====================
[23:38:25] [PASSED] count_args_test
[23:38:25] [PASSED] call_args_example
[23:38:25] [PASSED] call_args_test
[23:38:25] [PASSED] drop_first_arg_example
[23:38:25] [PASSED] drop_first_arg_test
[23:38:25] [PASSED] first_arg_example
[23:38:25] [PASSED] first_arg_test
[23:38:25] [PASSED] last_arg_example
[23:38:25] [PASSED] last_arg_test
[23:38:25] [PASSED] pick_arg_example
[23:38:25] [PASSED] if_args_example
[23:38:25] [PASSED] if_args_test
[23:38:25] [PASSED] sep_comma_example
[23:38:25] ====================== [PASSED] args =======================
[23:38:25] =================== xe_pci (3 subtests) ====================
[23:38:25] ==================== check_graphics_ip  ====================
[23:38:25] [PASSED] 12.00 Xe_LP
[23:38:25] [PASSED] 12.10 Xe_LP+
[23:38:25] [PASSED] 12.55 Xe_HPG
[23:38:25] [PASSED] 12.60 Xe_HPC
[23:38:25] [PASSED] 12.70 Xe_LPG
[23:38:25] [PASSED] 12.71 Xe_LPG
[23:38:25] [PASSED] 12.74 Xe_LPG+
[23:38:25] [PASSED] 20.01 Xe2_HPG
[23:38:25] [PASSED] 20.02 Xe2_HPG
[23:38:25] [PASSED] 20.04 Xe2_LPG
[23:38:25] [PASSED] 30.00 Xe3_LPG
[23:38:25] [PASSED] 30.01 Xe3_LPG
[23:38:25] [PASSED] 30.03 Xe3_LPG
[23:38:25] [PASSED] 30.04 Xe3_LPG
[23:38:25] [PASSED] 30.05 Xe3_LPG
[23:38:25] [PASSED] 35.10 Xe3p_LPG
[23:38:25] [PASSED] 35.11 Xe3p_XPC
[23:38:25] ================ [PASSED] check_graphics_ip ================
[23:38:25] ===================== check_media_ip  ======================
[23:38:25] [PASSED] 12.00 Xe_M
[23:38:25] [PASSED] 12.55 Xe_HPM
[23:38:25] [PASSED] 13.00 Xe_LPM+
[23:38:25] [PASSED] 13.01 Xe2_HPM
[23:38:25] [PASSED] 20.00 Xe2_LPM
[23:38:25] [PASSED] 30.00 Xe3_LPM
[23:38:25] [PASSED] 30.02 Xe3_LPM
[23:38:25] [PASSED] 35.00 Xe3p_LPM
[23:38:25] [PASSED] 35.03 Xe3p_HPM
[23:38:25] ================= [PASSED] check_media_ip ==================
[23:38:25] =================== check_platform_desc  ===================
[23:38:25] [PASSED] 0x9A60 (TIGERLAKE)
[23:38:25] [PASSED] 0x9A68 (TIGERLAKE)
[23:38:25] [PASSED] 0x9A70 (TIGERLAKE)
[23:38:25] [PASSED] 0x9A40 (TIGERLAKE)
[23:38:25] [PASSED] 0x9A49 (TIGERLAKE)
[23:38:25] [PASSED] 0x9A59 (TIGERLAKE)
[23:38:25] [PASSED] 0x9A78 (TIGERLAKE)
[23:38:25] [PASSED] 0x9AC0 (TIGERLAKE)
[23:38:25] [PASSED] 0x9AC9 (TIGERLAKE)
[23:38:25] [PASSED] 0x9AD9 (TIGERLAKE)
[23:38:25] [PASSED] 0x9AF8 (TIGERLAKE)
[23:38:25] [PASSED] 0x4C80 (ROCKETLAKE)
[23:38:25] [PASSED] 0x4C8A (ROCKETLAKE)
[23:38:25] [PASSED] 0x4C8B (ROCKETLAKE)
[23:38:25] [PASSED] 0x4C8C (ROCKETLAKE)
[23:38:25] [PASSED] 0x4C90 (ROCKETLAKE)
[23:38:25] [PASSED] 0x4C9A (ROCKETLAKE)
[23:38:25] [PASSED] 0x4680 (ALDERLAKE_S)
[23:38:25] [PASSED] 0x4682 (ALDERLAKE_S)
[23:38:25] [PASSED] 0x4688 (ALDERLAKE_S)
[23:38:25] [PASSED] 0x468A (ALDERLAKE_S)
[23:38:25] [PASSED] 0x468B (ALDERLAKE_S)
[23:38:25] [PASSED] 0x4690 (ALDERLAKE_S)
[23:38:25] [PASSED] 0x4692 (ALDERLAKE_S)
[23:38:25] [PASSED] 0x4693 (ALDERLAKE_S)
[23:38:25] [PASSED] 0x46A0 (ALDERLAKE_P)
[23:38:25] [PASSED] 0x46A1 (ALDERLAKE_P)
[23:38:25] [PASSED] 0x46A2 (ALDERLAKE_P)
[23:38:25] [PASSED] 0x46A3 (ALDERLAKE_P)
[23:38:25] [PASSED] 0x46A6 (ALDERLAKE_P)
[23:38:25] [PASSED] 0x46A8 (ALDERLAKE_P)
[23:38:25] [PASSED] 0x46AA (ALDERLAKE_P)
[23:38:25] [PASSED] 0x462A (ALDERLAKE_P)
[23:38:25] [PASSED] 0x4626 (ALDERLAKE_P)
[23:38:25] [PASSED] 0x4628 (ALDERLAKE_P)
[23:38:25] [PASSED] 0x46B0 (ALDERLAKE_P)
[23:38:25] [PASSED] 0x46B1 (ALDERLAKE_P)
[23:38:25] [PASSED] 0x46B2 (ALDERLAKE_P)
[23:38:25] [PASSED] 0x46B3 (ALDERLAKE_P)
[23:38:25] [PASSED] 0x46C0 (ALDERLAKE_P)
[23:38:25] [PASSED] 0x46C1 (ALDERLAKE_P)
[23:38:25] [PASSED] 0x46C2 (ALDERLAKE_P)
[23:38:25] [PASSED] 0x46C3 (ALDERLAKE_P)
[23:38:25] [PASSED] 0x46D0 (ALDERLAKE_N)
[23:38:25] [PASSED] 0x46D1 (ALDERLAKE_N)
[23:38:25] [PASSED] 0x46D2 (ALDERLAKE_N)
[23:38:25] [PASSED] 0x46D3 (ALDERLAKE_N)
[23:38:25] [PASSED] 0x46D4 (ALDERLAKE_N)
[23:38:25] [PASSED] 0xA721 (ALDERLAKE_P)
[23:38:25] [PASSED] 0xA7A1 (ALDERLAKE_P)
[23:38:25] [PASSED] 0xA7A9 (ALDERLAKE_P)
[23:38:25] [PASSED] 0xA7AC (ALDERLAKE_P)
[23:38:25] [PASSED] 0xA7AD (ALDERLAKE_P)
[23:38:25] [PASSED] 0xA720 (ALDERLAKE_P)
[23:38:25] [PASSED] 0xA7A0 (ALDERLAKE_P)
[23:38:25] [PASSED] 0xA7A8 (ALDERLAKE_P)
[23:38:25] [PASSED] 0xA7AA (ALDERLAKE_P)
[23:38:25] [PASSED] 0xA7AB (ALDERLAKE_P)
[23:38:25] [PASSED] 0xA780 (ALDERLAKE_S)
[23:38:25] [PASSED] 0xA781 (ALDERLAKE_S)
[23:38:25] [PASSED] 0xA782 (ALDERLAKE_S)
[23:38:25] [PASSED] 0xA783 (ALDERLAKE_S)
[23:38:25] [PASSED] 0xA788 (ALDERLAKE_S)
[23:38:25] [PASSED] 0xA789 (ALDERLAKE_S)
[23:38:25] [PASSED] 0xA78A (ALDERLAKE_S)
[23:38:25] [PASSED] 0xA78B (ALDERLAKE_S)
[23:38:25] [PASSED] 0x4905 (DG1)
[23:38:25] [PASSED] 0x4906 (DG1)
[23:38:25] [PASSED] 0x4907 (DG1)
[23:38:25] [PASSED] 0x4908 (DG1)
[23:38:25] [PASSED] 0x4909 (DG1)
[23:38:25] [PASSED] 0x56C0 (DG2)
[23:38:25] [PASSED] 0x56C2 (DG2)
[23:38:25] [PASSED] 0x56C1 (DG2)
[23:38:25] [PASSED] 0x7D51 (METEORLAKE)
[23:38:25] [PASSED] 0x7DD1 (METEORLAKE)
[23:38:25] [PASSED] 0x7D41 (METEORLAKE)
[23:38:25] [PASSED] 0x7D67 (METEORLAKE)
[23:38:25] [PASSED] 0xB640 (METEORLAKE)
[23:38:25] [PASSED] 0x56A0 (DG2)
[23:38:25] [PASSED] 0x56A1 (DG2)
[23:38:25] [PASSED] 0x56A2 (DG2)
[23:38:25] [PASSED] 0x56BE (DG2)
[23:38:25] [PASSED] 0x56BF (DG2)
[23:38:25] [PASSED] 0x5690 (DG2)
[23:38:25] [PASSED] 0x5691 (DG2)
[23:38:25] [PASSED] 0x5692 (DG2)
[23:38:25] [PASSED] 0x56A5 (DG2)
[23:38:25] [PASSED] 0x56A6 (DG2)
[23:38:25] [PASSED] 0x56B0 (DG2)
[23:38:25] [PASSED] 0x56B1 (DG2)
[23:38:25] [PASSED] 0x56BA (DG2)
[23:38:25] [PASSED] 0x56BB (DG2)
[23:38:25] [PASSED] 0x56BC (DG2)
[23:38:25] [PASSED] 0x56BD (DG2)
[23:38:25] [PASSED] 0x5693 (DG2)
[23:38:25] [PASSED] 0x5694 (DG2)
[23:38:25] [PASSED] 0x5695 (DG2)
[23:38:25] [PASSED] 0x56A3 (DG2)
[23:38:25] [PASSED] 0x56A4 (DG2)
[23:38:25] [PASSED] 0x56B2 (DG2)
[23:38:25] [PASSED] 0x56B3 (DG2)
[23:38:25] [PASSED] 0x5696 (DG2)
[23:38:25] [PASSED] 0x5697 (DG2)
[23:38:25] [PASSED] 0xB69 (PVC)
[23:38:25] [PASSED] 0xB6E (PVC)
[23:38:25] [PASSED] 0xBD4 (PVC)
[23:38:25] [PASSED] 0xBD5 (PVC)
[23:38:25] [PASSED] 0xBD6 (PVC)
[23:38:25] [PASSED] 0xBD7 (PVC)
[23:38:25] [PASSED] 0xBD8 (PVC)
[23:38:25] [PASSED] 0xBD9 (PVC)
[23:38:25] [PASSED] 0xBDA (PVC)
[23:38:25] [PASSED] 0xBDB (PVC)
[23:38:25] [PASSED] 0xBE0 (PVC)
[23:38:25] [PASSED] 0xBE1 (PVC)
[23:38:25] [PASSED] 0xBE5 (PVC)
[23:38:25] [PASSED] 0x7D40 (METEORLAKE)
[23:38:25] [PASSED] 0x7D45 (METEORLAKE)
[23:38:25] [PASSED] 0x7D55 (METEORLAKE)
[23:38:25] [PASSED] 0x7D60 (METEORLAKE)
[23:38:25] [PASSED] 0x7DD5 (METEORLAKE)
[23:38:25] [PASSED] 0x6420 (LUNARLAKE)
[23:38:25] [PASSED] 0x64A0 (LUNARLAKE)
[23:38:25] [PASSED] 0x64B0 (LUNARLAKE)
[23:38:25] [PASSED] 0xE202 (BATTLEMAGE)
[23:38:25] [PASSED] 0xE209 (BATTLEMAGE)
[23:38:25] [PASSED] 0xE20B (BATTLEMAGE)
[23:38:25] [PASSED] 0xE20C (BATTLEMAGE)
[23:38:25] [PASSED] 0xE20D (BATTLEMAGE)
[23:38:25] [PASSED] 0xE210 (BATTLEMAGE)
[23:38:25] [PASSED] 0xE211 (BATTLEMAGE)
[23:38:25] [PASSED] 0xE212 (BATTLEMAGE)
[23:38:25] [PASSED] 0xE216 (BATTLEMAGE)
[23:38:25] [PASSED] 0xE220 (BATTLEMAGE)
[23:38:25] [PASSED] 0xE221 (BATTLEMAGE)
[23:38:25] [PASSED] 0xE222 (BATTLEMAGE)
[23:38:25] [PASSED] 0xE223 (BATTLEMAGE)
[23:38:25] [PASSED] 0xB080 (PANTHERLAKE)
[23:38:25] [PASSED] 0xB081 (PANTHERLAKE)
[23:38:25] [PASSED] 0xB082 (PANTHERLAKE)
[23:38:25] [PASSED] 0xB083 (PANTHERLAKE)
[23:38:25] [PASSED] 0xB084 (PANTHERLAKE)
[23:38:25] [PASSED] 0xB085 (PANTHERLAKE)
[23:38:25] [PASSED] 0xB086 (PANTHERLAKE)
[23:38:25] [PASSED] 0xB087 (PANTHERLAKE)
[23:38:25] [PASSED] 0xB08F (PANTHERLAKE)
[23:38:25] [PASSED] 0xB090 (PANTHERLAKE)
[23:38:25] [PASSED] 0xB0A0 (PANTHERLAKE)
[23:38:25] [PASSED] 0xB0A1 (PANTHERLAKE)
[23:38:25] [PASSED] 0xB0B0 (PANTHERLAKE)
[23:38:25] [PASSED] 0xFD80 (PANTHERLAKE)
[23:38:25] [PASSED] 0xFD81 (PANTHERLAKE)
[23:38:25] [PASSED] 0xD740 (NOVALAKE_S)
[23:38:25] [PASSED] 0xD741 (NOVALAKE_S)
[23:38:25] [PASSED] 0xD742 (NOVALAKE_S)
[23:38:25] [PASSED] 0xD743 (NOVALAKE_S)
[23:38:25] [PASSED] 0xD745 (NOVALAKE_S)
[23:38:25] [PASSED] 0xD74A (NOVALAKE_S)
[23:38:25] [PASSED] 0xD74B (NOVALAKE_S)
[23:38:25] [PASSED] 0x674C (CRESCENTISLAND)
[23:38:25] [PASSED] 0x674D (CRESCENTISLAND)
[23:38:25] [PASSED] 0x674E (CRESCENTISLAND)
[23:38:25] [PASSED] 0x674F (CRESCENTISLAND)
[23:38:25] [PASSED] 0x6750 (CRESCENTISLAND)
[23:38:25] [PASSED] 0x6751 (CRESCENTISLAND)
[23:38:25] [PASSED] 0x6752 (CRESCENTISLAND)
[23:38:25] [PASSED] 0xD750 (NOVALAKE_P)
[23:38:25] [PASSED] 0xD751 (NOVALAKE_P)
[23:38:25] [PASSED] 0xD752 (NOVALAKE_P)
[23:38:25] [PASSED] 0xD753 (NOVALAKE_P)
[23:38:25] [PASSED] 0xD754 (NOVALAKE_P)
[23:38:25] [PASSED] 0xD755 (NOVALAKE_P)
[23:38:25] [PASSED] 0xD756 (NOVALAKE_P)
[23:38:25] [PASSED] 0xD757 (NOVALAKE_P)
[23:38:25] [PASSED] 0xD75F (NOVALAKE_P)
[23:38:25] =============== [PASSED] check_platform_desc ===============
[23:38:25] ===================== [PASSED] xe_pci ======================
[23:38:25] ============= xe_rtp_tables_test (5 subtests) ==============
[23:38:25] ================== xe_rtp_table_gt_test  ===================
[23:38:25] [PASSED] gt_was/14011060649
[23:38:25] [PASSED] gt_was/14011059788
[23:38:25] [PASSED] gt_was/14015795083
[23:38:25] [PASSED] gt_was/16021867713
[23:38:25] [PASSED] gt_was/14019449301
[23:38:25] [PASSED] gt_was/16028005424
[23:38:25] [PASSED] gt_was/14026578760
[23:38:25] [PASSED] gt_was/1409420604
[23:38:25] [PASSED] gt_was/1408615072
[23:38:25] [PASSED] gt_was/22010523718
[23:38:25] [PASSED] gt_was/14011006942
[23:38:25] [PASSED] gt_was/14014830051
[23:38:25] [PASSED] gt_was/18018781329
[23:38:25] [PASSED] gt_was/1509235366
[23:38:25] [PASSED] gt_was/18018781329
[23:38:25] [PASSED] gt_was/16016694945
[23:38:25] [PASSED] gt_was/14018575942
[23:38:25] [PASSED] gt_was/22016670082
[23:38:25] [PASSED] gt_was/22016670082
[23:38:25] [PASSED] gt_was/14017421178
[23:38:25] [PASSED] gt_was/16025250150
[23:38:25] [PASSED] gt_was/14021871409
[23:38:25] [PASSED] gt_was/16021865536
[23:38:25] [PASSED] gt_was/14021486841
[23:38:25] [PASSED] gt_was/14025160223
[23:38:25] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[23:38:25] [PASSED] gt_was/14025635424
[23:38:25] [PASSED] gt_was/16028005424
[23:38:25] ============== [PASSED] xe_rtp_table_gt_test ===============
[23:38:25] ================== xe_rtp_table_gt_test  ===================
[23:38:25] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[23:38:25] [PASSED] gt_tunings/Tuning: 32B Access Enable
[23:38:25] [PASSED] gt_tunings/Tuning: L3 cache
[23:38:25] [PASSED] gt_tunings/Tuning: L3 cache - media
[23:38:25] [PASSED] gt_tunings/Tuning: Compression Overfetch
[23:38:25] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[23:38:25] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[23:38:25] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[23:38:25] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[23:38:25] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[23:38:25] [PASSED] gt_tunings/Tuning: Stateless compression control
[23:38:25] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[23:38:25] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[23:38:25] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[23:38:25] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[23:38:25] [PASSED] gt_tunings/Tuning: Force All Non-Compressible Memory Reads to be 256B Overfetches
[23:38:25] ============== [PASSED] xe_rtp_table_gt_test ===============
[23:38:25] ================== xe_rtp_table_oob_test  ==================
[23:38:25] [PASSED] oob_was/1607983814
[23:38:25] [PASSED] oob_was/16010904313
[23:38:25] [PASSED] oob_was/18022495364
[23:38:25] [PASSED] oob_was/22012773006
[23:38:25] [PASSED] oob_was/14014475959
[23:38:25] [PASSED] oob_was/22011391025
[23:38:25] [PASSED] oob_was/22012727170
[23:38:25] [PASSED] oob_was/22012727685
[23:38:25] [PASSED] oob_was/22016596838
[23:38:25] [PASSED] oob_was/18020744125
[23:38:25] [PASSED] oob_was/1409600907
[23:38:25] [PASSED] oob_was/22014953428
[23:38:25] [PASSED] oob_was/16017236439
[23:38:25] [PASSED] oob_was/14019821291
[23:38:25] [PASSED] oob_was/14015076503
[23:38:25] [PASSED] oob_was/22016122933
[23:38:25] [PASSED] oob_was/14018913170
[23:38:25] [PASSED] oob_was/14018094691
[23:38:25] [PASSED] oob_was/18024947630
[23:38:25] [PASSED] oob_was/16022287689
[23:38:25] [PASSED] oob_was/13011645652
[23:38:25] [PASSED] oob_was/14022293748
[23:38:25] [PASSED] oob_was/22019794406
[23:38:25] [PASSED] oob_was/22019338487
[23:38:25] [PASSED] oob_was/16023588340
[23:38:25] [PASSED] oob_was/14019789679
[23:38:25] [PASSED] oob_was/14022866841
[23:38:25] [PASSED] oob_was/16021333562
[23:38:25] [PASSED] oob_was/14016712196
[23:38:25] [PASSED] oob_was/14015568240
[23:38:25] [PASSED] oob_was/18013179988
[23:38:25] [PASSED] oob_was/1508761755
[23:38:25] [PASSED] oob_was/16023105232
[23:38:25] [PASSED] oob_was/16026508708
[23:38:25] [PASSED] oob_was/14020001231
[23:38:25] [PASSED] oob_was/16023683509
[23:38:25] [PASSED] oob_was/14025515070
[23:38:25] [PASSED] oob_was/15015404425_disable
[23:38:25] [PASSED] oob_was/16026007364
[23:38:25] [PASSED] oob_was/14020316580
[23:38:25] [PASSED] oob_was/14025883347
[23:38:25] [PASSED] oob_was/16029380221
[23:38:25] [PASSED] oob_was/22022079272
[23:38:25] [PASSED] oob_was/16029897822
[23:38:25] [PASSED] oob_was/14026539277
[23:38:25] [PASSED] oob_was/14027054324
[23:38:25] [PASSED] oob_was/14025941587
[23:38:25] [PASSED] oob_was/16030224309
[23:38:25] [PASSED] oob_was/14028709524
[23:38:25] [PASSED] oob_was/14028250015
[23:38:25] [PASSED] oob_was/16031259911
[23:38:25] ============== [PASSED] xe_rtp_table_oob_test ==============
[23:38:25] ================ xe_rtp_table_dev_oob_test  ================
[23:38:25] [PASSED] device_oob_was/22010954014
[23:38:25] [PASSED] device_oob_was/15015404425
[23:38:25] [PASSED] device_oob_was/22019338487_display
[23:38:25] [PASSED] device_oob_was/14022085890
[23:38:25] [PASSED] device_oob_was/14026633728
[23:38:25] [PASSED] device_oob_was/14026746987
[23:38:25] [PASSED] device_oob_was/14026779378
[23:38:25] [PASSED] device_oob_was/14028586678
[23:38:25] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[23:38:25] ========== xe_rtp_table_missing_upper_bound_test  ==========
[23:38:25] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[23:38:25] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[23:38:25] [PASSED] register_whitelist/1806527549
[23:38:25] [PASSED] register_whitelist/allow_read_ctx_timestamp
[23:38:25] [PASSED] register_whitelist/allow_read_queue_timestamp
[23:38:25] [PASSED] register_whitelist/16014440446
[23:38:25] [PASSED] register_whitelist/16017236439
[23:38:25] [PASSED] register_whitelist/16020183090
[23:38:25] [PASSED] register_whitelist/14024997852
[23:38:25] [PASSED] register_whitelist/14024997852
[23:38:25] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[23:38:25] =============== [PASSED] xe_rtp_tables_test ================
[23:38:25] =================== xe_rtp (3 subtests) ====================
[23:38:25] =================== xe_rtp_rules_tests  ====================
[23:38:25] [PASSED] no
[23:38:25] [PASSED] yes
[23:38:25] [PASSED] no-and-no
[23:38:25] [PASSED] no-and-yes
[23:38:25] [PASSED] yes-and-no
[23:38:25] [PASSED] yes-and-yes
[23:38:25] [PASSED] no-or-no
[23:38:25] [PASSED] no-or-yes
[23:38:25] [PASSED] yes-or-no
[23:38:25] [PASSED] yes-or-yes
[23:38:25] [PASSED] no-yes-or-yes-no
[23:38:25] [PASSED] no-yes-or-yes-yes
[23:38:25] [PASSED] yes-yes-or-no-yes
[23:38:25] [PASSED] yes-yes-or-yes-yes
[23:38:25] [PASSED] no-no-or-yes-or-no
[23:38:25] [PASSED] or
[23:38:25] [PASSED] or-yes
[23:38:25] [PASSED] or-no
[23:38:25] [PASSED] yes-or
[23:38:25] [PASSED] no-or
[23:38:25] [PASSED] no-or-or-yes
[23:38:25] [PASSED] yes-or-or-no
[23:38:25] [PASSED] no-or-or-no
[23:38:25] [PASSED] missing-context-engine-class
[23:38:25] [PASSED] missing-context-engine-class-or-yes
[23:38:25] [PASSED] missing-context-engine-class-or-or-yes
[23:38:25] =============== [PASSED] xe_rtp_rules_tests ================
[23:38:25] =============== xe_rtp_process_to_sr_tests  ================
[23:38:25] [PASSED] coalesce-same-reg
[23:38:25] [PASSED] coalesce-same-reg-literal-and-func
[23:38:25] [PASSED] no-match-no-add
[23:38:25] [PASSED] two-regs-two-entries
[23:38:25] [PASSED] clr-one-set-other
[23:38:25] [PASSED] set-field
[23:38:25] [PASSED] conflict-duplicate
[23:38:25] [PASSED] conflict-not-disjoint
[23:38:25] [PASSED] conflict-not-disjoint-literal-and-func
[23:38:25] [PASSED] conflict-reg-type
[23:38:25] [PASSED] bad-mcr-reg-forced-to-regular
[23:38:25] [PASSED] bad-regular-reg-forced-to-mcr
[23:38:25] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[23:38:25] ================== xe_rtp_process_tests  ===================
[23:38:25] [PASSED] active1
[23:38:25] [PASSED] active2
[23:38:25] [PASSED] active-inactive
[23:38:25] [PASSED] inactive-active
[23:38:25] [PASSED] inactive-active-inactive
[23:38:25] [PASSED] inactive-inactive-inactive
[23:38:25] ============== [PASSED] xe_rtp_process_tests ===============
[23:38:25] ===================== [PASSED] xe_rtp ======================
[23:38:25] ==================== xe_wa (1 subtest) =====================
[23:38:25] ======================== xe_wa_gt  =========================
[23:38:25] [PASSED] TIGERLAKE B0
[23:38:25] [PASSED] DG1 A0
[23:38:25] [PASSED] DG1 B0
[23:38:25] [PASSED] ALDERLAKE_S A0
[23:38:25] [PASSED] ALDERLAKE_S B0
[23:38:25] [PASSED] ALDERLAKE_S C0
[23:38:25] [PASSED] ALDERLAKE_S D0
[23:38:25] [PASSED] ALDERLAKE_P A0
[23:38:25] [PASSED] ALDERLAKE_P B0
[23:38:25] [PASSED] ALDERLAKE_P C0
[23:38:25] [PASSED] ALDERLAKE_S RPLS D0
[23:38:25] [PASSED] ALDERLAKE_P RPLU E0
[23:38:25] [PASSED] DG2 G10 C0
[23:38:25] [PASSED] DG2 G11 B1
[23:38:25] [PASSED] DG2 G12 A1
[23:38:25] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[23:38:25] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[23:38:25] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[23:38:25] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[23:38:25] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[23:38:25] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[23:38:25] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[23:38:25] ==================== [PASSED] xe_wa_gt =====================
[23:38:25] ====================== [PASSED] xe_wa ======================
[23:38:25] ============================================================
[23:38:25] Testing complete. Ran 843 tests: passed: 814, skipped: 29
[23:38:25] Elapsed time: 42.322s total, 2.532s configuring, 39.073s building, 0.705s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[23:38:25] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:38:28] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:38:53] Starting KUnit Kernel (1/1)...
[23:38:53] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:38:53] ============ drm_test_pick_cmdline (2 subtests) ============
[23:38:53] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[23:38:53] =============== drm_test_pick_cmdline_named  ===============
[23:38:53] [PASSED] NTSC
[23:38:53] [PASSED] NTSC-J
[23:38:53] [PASSED] PAL
[23:38:53] [PASSED] PAL-M
[23:38:53] =========== [PASSED] drm_test_pick_cmdline_named ===========
[23:38:53] ============== [PASSED] drm_test_pick_cmdline ==============
[23:38:53] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[23:38:53] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[23:38:53] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[23:38:53] =========== drm_validate_clone_mode (2 subtests) ===========
[23:38:53] ============== drm_test_check_in_clone_mode  ===============
[23:38:53] [PASSED] in_clone_mode
[23:38:53] [PASSED] not_in_clone_mode
[23:38:53] ========== [PASSED] drm_test_check_in_clone_mode ===========
[23:38:53] =============== drm_test_check_valid_clones  ===============
[23:38:53] [PASSED] not_in_clone_mode
[23:38:53] [PASSED] valid_clone
[23:38:53] [PASSED] invalid_clone
[23:38:53] =========== [PASSED] drm_test_check_valid_clones ===========
[23:38:53] ============= [PASSED] drm_validate_clone_mode =============
[23:38:53] ============= drm_validate_modeset (1 subtest) =============
[23:38:53] [PASSED] drm_test_check_connector_changed_modeset
[23:38:53] ============== [PASSED] drm_validate_modeset ===============
[23:38:53] ====== drm_test_bridge_get_current_state (1 subtest) =======
[23:38:53] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[23:38:53] ======== [PASSED] drm_test_bridge_get_current_state ========
[23:38:53] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[23:38:53] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[23:38:53] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[23:38:53] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[23:38:53] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[23:38:53] ============== drm_bridge_alloc (2 subtests) ===============
[23:38:53] [PASSED] drm_test_drm_bridge_alloc_basic
[23:38:53] [PASSED] drm_test_drm_bridge_alloc_get_put
[23:38:53] ================ [PASSED] drm_bridge_alloc =================
[23:38:53] ============= drm_bridge_bus_fmt (5 subtests) ==============
[23:38:53] [PASSED] drm_test_bridge_rgb_yuv_rgb
[23:38:53] [PASSED] drm_test_bridge_must_convert_to_yuv444
[23:38:53] [PASSED] drm_test_bridge_hdmi_auto_rgb
[23:38:53] [PASSED] drm_test_bridge_auto_first
[23:38:53] [PASSED] drm_test_bridge_rgb_yuv_no_path
[23:38:53] =============== [PASSED] drm_bridge_bus_fmt ================
[23:38:53] ============= drm_cmdline_parser (40 subtests) =============
[23:38:53] [PASSED] drm_test_cmdline_force_d_only
[23:38:53] [PASSED] drm_test_cmdline_force_D_only_dvi
[23:38:53] [PASSED] drm_test_cmdline_force_D_only_hdmi
[23:38:53] [PASSED] drm_test_cmdline_force_D_only_not_digital
[23:38:53] [PASSED] drm_test_cmdline_force_e_only
[23:38:53] [PASSED] drm_test_cmdline_res
[23:38:53] [PASSED] drm_test_cmdline_res_vesa
[23:38:53] [PASSED] drm_test_cmdline_res_vesa_rblank
[23:38:53] [PASSED] drm_test_cmdline_res_rblank
[23:38:53] [PASSED] drm_test_cmdline_res_bpp
[23:38:53] [PASSED] drm_test_cmdline_res_refresh
[23:38:53] [PASSED] drm_test_cmdline_res_bpp_refresh
[23:38:53] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[23:38:53] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[23:38:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[23:38:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[23:38:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[23:38:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[23:38:53] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[23:38:53] [PASSED] drm_test_cmdline_res_margins_force_on
[23:38:53] [PASSED] drm_test_cmdline_res_vesa_margins
[23:38:53] [PASSED] drm_test_cmdline_name
[23:38:53] [PASSED] drm_test_cmdline_name_bpp
[23:38:53] [PASSED] drm_test_cmdline_name_option
[23:38:53] [PASSED] drm_test_cmdline_name_bpp_option
[23:38:53] [PASSED] drm_test_cmdline_rotate_0
[23:38:53] [PASSED] drm_test_cmdline_rotate_90
[23:38:53] [PASSED] drm_test_cmdline_rotate_180
[23:38:53] [PASSED] drm_test_cmdline_rotate_270
[23:38:53] [PASSED] drm_test_cmdline_hmirror
[23:38:53] [PASSED] drm_test_cmdline_vmirror
[23:38:53] [PASSED] drm_test_cmdline_margin_options
[23:38:53] [PASSED] drm_test_cmdline_multiple_options
[23:38:53] [PASSED] drm_test_cmdline_bpp_extra_and_option
[23:38:53] [PASSED] drm_test_cmdline_extra_and_option
[23:38:53] [PASSED] drm_test_cmdline_freestanding_options
[23:38:53] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[23:38:53] [PASSED] drm_test_cmdline_panel_orientation
[23:38:53] ================ drm_test_cmdline_invalid  =================
[23:38:53] [PASSED] margin_only
[23:38:53] [PASSED] interlace_only
[23:38:53] [PASSED] res_missing_x
[23:38:53] [PASSED] res_missing_y
[23:38:53] [PASSED] res_bad_y
[23:38:53] [PASSED] res_missing_y_bpp
[23:38:53] [PASSED] res_bad_bpp
[23:38:53] [PASSED] res_bad_refresh
[23:38:53] [PASSED] res_bpp_refresh_force_on_off
[23:38:53] [PASSED] res_invalid_mode
[23:38:53] [PASSED] res_bpp_wrong_place_mode
[23:38:53] [PASSED] name_bpp_refresh
[23:38:53] [PASSED] name_refresh
[23:38:53] [PASSED] name_refresh_wrong_mode
[23:38:53] [PASSED] name_refresh_invalid_mode
[23:38:53] [PASSED] rotate_multiple
[23:38:53] [PASSED] rotate_invalid_val
[23:38:53] [PASSED] rotate_truncated
[23:38:53] [PASSED] invalid_option
[23:38:53] [PASSED] invalid_tv_option
[23:38:53] [PASSED] truncated_tv_option
[23:38:53] ============ [PASSED] drm_test_cmdline_invalid =============
[23:38:53] =============== drm_test_cmdline_tv_options  ===============
[23:38:53] [PASSED] NTSC
[23:38:53] [PASSED] NTSC_443
[23:38:53] [PASSED] NTSC_J
[23:38:53] [PASSED] PAL
[23:38:53] [PASSED] PAL_M
[23:38:53] [PASSED] PAL_N
[23:38:53] [PASSED] SECAM
[23:38:53] [PASSED] MONO_525
[23:38:53] [PASSED] MONO_625
[23:38:53] =========== [PASSED] drm_test_cmdline_tv_options ===========
[23:38:53] =============== [PASSED] drm_cmdline_parser ================
[23:38:53] ========== drmm_connector_hdmi_init (20 subtests) ==========
[23:38:53] [PASSED] drm_test_connector_hdmi_init_valid
[23:38:53] [PASSED] drm_test_connector_hdmi_init_bpc_8
[23:38:53] [PASSED] drm_test_connector_hdmi_init_bpc_10
[23:38:53] [PASSED] drm_test_connector_hdmi_init_bpc_12
[23:38:53] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[23:38:53] [PASSED] drm_test_connector_hdmi_init_bpc_null
[23:38:53] [PASSED] drm_test_connector_hdmi_init_formats_empty
[23:38:53] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[23:38:53] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[23:38:53] [PASSED] supported_formats=0x9 yuv420_allowed=1
[23:38:53] [PASSED] supported_formats=0x9 yuv420_allowed=0
[23:38:53] [PASSED] supported_formats=0x5 yuv420_allowed=1
[23:38:53] [PASSED] supported_formats=0x5 yuv420_allowed=0
[23:38:53] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[23:38:53] [PASSED] drm_test_connector_hdmi_init_null_ddc
[23:38:53] [PASSED] drm_test_connector_hdmi_init_null_product
[23:38:53] [PASSED] drm_test_connector_hdmi_init_null_vendor
[23:38:53] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[23:38:53] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[23:38:53] [PASSED] drm_test_connector_hdmi_init_product_valid
[23:38:53] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[23:38:53] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[23:38:53] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[23:38:53] ========= drm_test_connector_hdmi_init_type_valid  =========
[23:38:53] [PASSED] HDMI-A
[23:38:53] [PASSED] HDMI-B
[23:38:53] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[23:38:53] ======== drm_test_connector_hdmi_init_type_invalid  ========
[23:38:53] [PASSED] Unknown
[23:38:53] [PASSED] VGA
[23:38:53] [PASSED] DVI-I
[23:38:53] [PASSED] DVI-D
[23:38:53] [PASSED] DVI-A
[23:38:53] [PASSED] Composite
[23:38:53] [PASSED] SVIDEO
[23:38:53] [PASSED] LVDS
[23:38:53] [PASSED] Component
[23:38:53] [PASSED] DIN
[23:38:53] [PASSED] DP
[23:38:53] [PASSED] TV
[23:38:53] [PASSED] eDP
[23:38:53] [PASSED] Virtual
[23:38:53] [PASSED] DSI
[23:38:53] [PASSED] DPI
[23:38:53] [PASSED] Writeback
[23:38:53] [PASSED] SPI
[23:38:53] [PASSED] USB
[23:38:53] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[23:38:53] ============ [PASSED] drmm_connector_hdmi_init =============
[23:38:53] ============= drmm_connector_init (3 subtests) =============
[23:38:53] [PASSED] drm_test_drmm_connector_init
[23:38:53] [PASSED] drm_test_drmm_connector_init_null_ddc
[23:38:53] ========= drm_test_drmm_connector_init_type_valid  =========
[23:38:53] [PASSED] Unknown
[23:38:53] [PASSED] VGA
[23:38:53] [PASSED] DVI-I
[23:38:53] [PASSED] DVI-D
[23:38:53] [PASSED] DVI-A
[23:38:53] [PASSED] Composite
[23:38:53] [PASSED] SVIDEO
[23:38:53] [PASSED] LVDS
[23:38:53] [PASSED] Component
[23:38:53] [PASSED] DIN
[23:38:53] [PASSED] DP
[23:38:53] [PASSED] HDMI-A
[23:38:53] [PASSED] HDMI-B
[23:38:53] [PASSED] TV
[23:38:53] [PASSED] eDP
[23:38:53] [PASSED] Virtual
[23:38:53] [PASSED] DSI
[23:38:53] [PASSED] DPI
[23:38:53] [PASSED] Writeback
[23:38:53] [PASSED] SPI
[23:38:53] [PASSED] USB
[23:38:53] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[23:38:53] =============== [PASSED] drmm_connector_init ===============
[23:38:53] ========= drm_connector_dynamic_init (6 subtests) ==========
[23:38:53] [PASSED] drm_test_drm_connector_dynamic_init
[23:38:53] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[23:38:53] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[23:38:53] [PASSED] drm_test_drm_connector_dynamic_init_properties
[23:38:53] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[23:38:53] [PASSED] Unknown
[23:38:53] [PASSED] VGA
[23:38:53] [PASSED] DVI-I
[23:38:53] [PASSED] DVI-D
[23:38:53] [PASSED] DVI-A
[23:38:53] [PASSED] Composite
[23:38:53] [PASSED] SVIDEO
[23:38:53] [PASSED] LVDS
[23:38:53] [PASSED] Component
[23:38:53] [PASSED] DIN
[23:38:53] [PASSED] DP
[23:38:53] [PASSED] HDMI-A
[23:38:53] [PASSED] HDMI-B
[23:38:53] [PASSED] TV
[23:38:53] [PASSED] eDP
[23:38:53] [PASSED] Virtual
[23:38:53] [PASSED] DSI
[23:38:53] [PASSED] DPI
[23:38:53] [PASSED] Writeback
[23:38:53] [PASSED] SPI
[23:38:53] [PASSED] USB
[23:38:53] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[23:38:53] ======== drm_test_drm_connector_dynamic_init_name  =========
[23:38:53] [PASSED] Unknown
[23:38:53] [PASSED] VGA
[23:38:53] [PASSED] DVI-I
[23:38:53] [PASSED] DVI-D
[23:38:53] [PASSED] DVI-A
[23:38:53] [PASSED] Composite
[23:38:53] [PASSED] SVIDEO
[23:38:53] [PASSED] LVDS
[23:38:53] [PASSED] Component
[23:38:53] [PASSED] DIN
[23:38:53] [PASSED] DP
[23:38:53] [PASSED] HDMI-A
[23:38:53] [PASSED] HDMI-B
[23:38:53] [PASSED] TV
[23:38:53] [PASSED] eDP
[23:38:53] [PASSED] Virtual
[23:38:53] [PASSED] DSI
[23:38:53] [PASSED] DPI
[23:38:53] [PASSED] Writeback
[23:38:53] [PASSED] SPI
[23:38:53] [PASSED] USB
[23:38:53] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[23:38:53] =========== [PASSED] drm_connector_dynamic_init ============
[23:38:53] ==== drm_connector_dynamic_register_early (4 subtests) =====
[23:38:53] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[23:38:53] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[23:38:53] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[23:38:53] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[23:38:53] ====== [PASSED] drm_connector_dynamic_register_early =======
[23:38:53] ======= drm_connector_dynamic_register (7 subtests) ========
[23:38:53] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[23:38:53] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[23:38:53] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[23:38:53] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[23:38:53] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[23:38:53] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[23:38:53] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[23:38:53] ========= [PASSED] drm_connector_dynamic_register ==========
[23:38:53] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[23:38:53] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[23:38:53] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[23:38:53] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[23:38:53] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[23:38:53] ========== drm_test_get_tv_mode_from_name_valid  ===========
[23:38:53] [PASSED] NTSC
[23:38:53] [PASSED] NTSC-443
[23:38:53] [PASSED] NTSC-J
[23:38:53] [PASSED] PAL
[23:38:53] [PASSED] PAL-M
[23:38:53] [PASSED] PAL-N
[23:38:53] [PASSED] SECAM
[23:38:53] [PASSED] Mono
[23:38:53] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[23:38:53] [PASSED] drm_test_get_tv_mode_from_name_truncated
[23:38:53] ============ [PASSED] drm_get_tv_mode_from_name ============
[23:38:53] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[23:38:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[23:38:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[23:38:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[23:38:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[23:38:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[23:38:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[23:38:53] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[23:38:53] [PASSED] VIC 96
[23:38:53] [PASSED] VIC 97
[23:38:53] [PASSED] VIC 101
[23:38:53] [PASSED] VIC 102
[23:38:53] [PASSED] VIC 106
[23:38:53] [PASSED] VIC 107
[23:38:53] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[23:38:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[23:38:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[23:38:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[23:38:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[23:38:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[23:38:53] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[23:38:53] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[23:38:53] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[23:38:53] [PASSED] Automatic
[23:38:53] [PASSED] Full
[23:38:53] [PASSED] Limited 16:235
[23:38:53] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[23:38:53] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[23:38:53] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[23:38:53] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[23:38:53] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[23:38:53] [PASSED] RGB
[23:38:53] [PASSED] YUV 4:2:0
[23:38:53] [PASSED] YUV 4:2:2
[23:38:53] [PASSED] YUV 4:4:4
[23:38:53] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[23:38:53] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[23:38:53] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[23:38:53] ============= drm_damage_helper (21 subtests) ==============
[23:38:53] [PASSED] drm_test_damage_iter_no_damage
[23:38:53] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[23:38:53] [PASSED] drm_test_damage_iter_no_damage_src_moved
[23:38:53] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[23:38:53] [PASSED] drm_test_damage_iter_no_damage_not_visible
[23:38:53] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[23:38:53] [PASSED] drm_test_damage_iter_no_damage_no_fb
[23:38:53] [PASSED] drm_test_damage_iter_simple_damage
[23:38:53] [PASSED] drm_test_damage_iter_single_damage
[23:38:53] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[23:38:53] [PASSED] drm_test_damage_iter_single_damage_outside_src
[23:38:53] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[23:38:53] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[23:38:53] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[23:38:53] [PASSED] drm_test_damage_iter_single_damage_src_moved
[23:38:53] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[23:38:53] [PASSED] drm_test_damage_iter_damage
[23:38:53] [PASSED] drm_test_damage_iter_damage_one_intersect
[23:38:53] [PASSED] drm_test_damage_iter_damage_one_outside
[23:38:53] [PASSED] drm_test_damage_iter_damage_src_moved
[23:38:53] [PASSED] drm_test_damage_iter_damage_not_visible
[23:38:53] ================ [PASSED] drm_damage_helper ================
[23:38:53] ============== drm_dp_mst_helper (3 subtests) ==============
[23:38:53] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[23:38:53] [PASSED] Clock 154000 BPP 30 DSC disabled
[23:38:53] [PASSED] Clock 234000 BPP 30 DSC disabled
[23:38:53] [PASSED] Clock 297000 BPP 24 DSC disabled
[23:38:53] [PASSED] Clock 332880 BPP 24 DSC enabled
[23:38:53] [PASSED] Clock 324540 BPP 24 DSC enabled
[23:38:53] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[23:38:53] ============== drm_test_dp_mst_calc_pbn_div  ===============
[23:38:53] [PASSED] Link rate 2000000 lane count 4
[23:38:53] [PASSED] Link rate 2000000 lane count 2
[23:38:53] [PASSED] Link rate 2000000 lane count 1
[23:38:53] [PASSED] Link rate 1350000 lane count 4
[23:38:53] [PASSED] Link rate 1350000 lane count 2
[23:38:53] [PASSED] Link rate 1350000 lane count 1
[23:38:53] [PASSED] Link rate 1000000 lane count 4
[23:38:53] [PASSED] Link rate 1000000 lane count 2
[23:38:53] [PASSED] Link rate 1000000 lane count 1
[23:38:53] [PASSED] Link rate 810000 lane count 4
[23:38:53] [PASSED] Link rate 810000 lane count 2
[23:38:53] [PASSED] Link rate 810000 lane count 1
[23:38:53] [PASSED] Link rate 540000 lane count 4
[23:38:53] [PASSED] Link rate 540000 lane count 2
[23:38:53] [PASSED] Link rate 540000 lane count 1
[23:38:53] [PASSED] Link rate 270000 lane count 4
[23:38:53] [PASSED] Link rate 270000 lane count 2
[23:38:53] [PASSED] Link rate 270000 lane count 1
[23:38:53] [PASSED] Link rate 162000 lane count 4
[23:38:53] [PASSED] Link rate 162000 lane count 2
[23:38:53] [PASSED] Link rate 162000 lane count 1
[23:38:53] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[23:38:53] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[23:38:53] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[23:38:53] [PASSED] DP_POWER_UP_PHY with port number
[23:38:53] [PASSED] DP_POWER_DOWN_PHY with port number
[23:38:53] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[23:38:53] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[23:38:53] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[23:38:53] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[23:38:53] [PASSED] DP_QUERY_PAYLOAD with port number
[23:38:53] [PASSED] DP_QUERY_PAYLOAD with VCPI
[23:38:53] [PASSED] DP_REMOTE_DPCD_READ with port number
[23:38:53] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[23:38:53] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[23:38:53] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[23:38:53] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[23:38:53] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[23:38:53] [PASSED] DP_REMOTE_I2C_READ with port number
[23:38:53] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[23:38:53] [PASSED] DP_REMOTE_I2C_READ with transactions array
[23:38:53] [PASSED] DP_REMOTE_I2C_WRITE with port number
[23:38:53] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[23:38:53] [PASSED] DP_REMOTE_I2C_WRITE with data array
[23:38:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[23:38:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[23:38:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[23:38:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[23:38:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[23:38:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[23:38:53] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[23:38:53] ================ [PASSED] drm_dp_mst_helper ================
[23:38:53] ================== drm_exec (7 subtests) ===================
[23:38:53] [PASSED] sanitycheck
[23:38:53] [PASSED] test_lock
[23:38:53] [PASSED] test_lock_unlock
[23:38:53] [PASSED] test_duplicates
[23:38:53] [PASSED] test_prepare
[23:38:53] [PASSED] test_prepare_array
[23:38:53] [PASSED] test_multiple_loops
[23:38:53] ==================== [PASSED] drm_exec =====================
[23:38:53] =========== drm_format_helper_test (17 subtests) ===========
[23:38:53] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[23:38:53] [PASSED] single_pixel_source_buffer
[23:38:53] [PASSED] single_pixel_clip_rectangle
[23:38:53] [PASSED] well_known_colors
[23:38:53] [PASSED] destination_pitch
[23:38:53] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[23:38:53] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[23:38:53] [PASSED] single_pixel_source_buffer
[23:38:53] [PASSED] single_pixel_clip_rectangle
[23:38:53] [PASSED] well_known_colors
[23:38:53] [PASSED] destination_pitch
[23:38:53] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[23:38:53] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[23:38:53] [PASSED] single_pixel_source_buffer
[23:38:53] [PASSED] single_pixel_clip_rectangle
[23:38:53] [PASSED] well_known_colors
[23:38:53] [PASSED] destination_pitch
[23:38:53] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[23:38:53] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[23:38:53] [PASSED] single_pixel_source_buffer
[23:38:53] [PASSED] single_pixel_clip_rectangle
[23:38:53] [PASSED] well_known_colors
[23:38:53] [PASSED] destination_pitch
[23:38:53] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[23:38:53] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[23:38:53] [PASSED] single_pixel_source_buffer
[23:38:53] [PASSED] single_pixel_clip_rectangle
[23:38:53] [PASSED] well_known_colors
[23:38:53] [PASSED] destination_pitch
[23:38:53] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[23:38:53] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[23:38:53] [PASSED] single_pixel_source_buffer
[23:38:53] [PASSED] single_pixel_clip_rectangle
[23:38:53] [PASSED] well_known_colors
[23:38:53] [PASSED] destination_pitch
[23:38:53] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[23:38:53] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[23:38:53] [PASSED] single_pixel_source_buffer
[23:38:53] [PASSED] single_pixel_clip_rectangle
[23:38:53] [PASSED] well_known_colors
[23:38:53] [PASSED] destination_pitch
[23:38:53] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[23:38:53] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[23:38:53] [PASSED] single_pixel_source_buffer
[23:38:53] [PASSED] single_pixel_clip_rectangle
[23:38:53] [PASSED] well_known_colors
[23:38:53] [PASSED] destination_pitch
[23:38:53] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[23:38:53] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[23:38:53] [PASSED] single_pixel_source_buffer
[23:38:53] [PASSED] single_pixel_clip_rectangle
[23:38:53] [PASSED] well_known_colors
[23:38:53] [PASSED] destination_pitch
[23:38:53] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[23:38:53] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[23:38:53] [PASSED] single_pixel_source_buffer
[23:38:53] [PASSED] single_pixel_clip_rectangle
[23:38:53] [PASSED] well_known_colors
[23:38:53] [PASSED] destination_pitch
[23:38:53] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[23:38:53] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[23:38:53] [PASSED] single_pixel_source_buffer
[23:38:53] [PASSED] single_pixel_clip_rectangle
[23:38:53] [PASSED] well_known_colors
[23:38:53] [PASSED] destination_pitch
[23:38:53] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[23:38:53] ============== drm_test_fb_xrgb8888_to_mono  ===============
[23:38:53] [PASSED] single_pixel_source_buffer
[23:38:53] [PASSED] single_pixel_clip_rectangle
[23:38:53] [PASSED] well_known_colors
[23:38:53] [PASSED] destination_pitch
[23:38:53] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[23:38:53] ==================== drm_test_fb_swab  =====================
[23:38:53] [PASSED] single_pixel_source_buffer
[23:38:53] [PASSED] single_pixel_clip_rectangle
[23:38:53] [PASSED] well_known_colors
[23:38:53] [PASSED] destination_pitch
[23:38:53] ================ [PASSED] drm_test_fb_swab =================
[23:38:53] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[23:38:53] [PASSED] single_pixel_source_buffer
[23:38:53] [PASSED] single_pixel_clip_rectangle
[23:38:53] [PASSED] well_known_colors
[23:38:53] [PASSED] destination_pitch
[23:38:53] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[23:38:53] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[23:38:53] [PASSED] single_pixel_source_buffer
[23:38:53] [PASSED] single_pixel_clip_rectangle
[23:38:53] [PASSED] well_known_colors
[23:38:53] [PASSED] destination_pitch
[23:38:53] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[23:38:53] ================= drm_test_fb_clip_offset  =================
[23:38:53] [PASSED] pass through
[23:38:53] [PASSED] horizontal offset
[23:38:53] [PASSED] vertical offset
[23:38:53] [PASSED] horizontal and vertical offset
[23:38:53] [PASSED] horizontal offset (custom pitch)
[23:38:53] [PASSED] vertical offset (custom pitch)
[23:38:53] [PASSED] horizontal and vertical offset (custom pitch)
[23:38:53] ============= [PASSED] drm_test_fb_clip_offset =============
[23:38:53] =================== drm_test_fb_memcpy  ====================
[23:38:53] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[23:38:53] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[23:38:53] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[23:38:53] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[23:38:53] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[23:38:53] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[23:38:53] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[23:38:53] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[23:38:53] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[23:38:53] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[23:38:53] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[23:38:53] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[23:38:53] =============== [PASSED] drm_test_fb_memcpy ================
[23:38:53] ============= [PASSED] drm_format_helper_test ==============
[23:38:53] ================= drm_format (18 subtests) =================
[23:38:53] [PASSED] drm_test_format_block_width_invalid
[23:38:53] [PASSED] drm_test_format_block_width_one_plane
[23:38:53] [PASSED] drm_test_format_block_width_two_plane
[23:38:53] [PASSED] drm_test_format_block_width_three_plane
[23:38:53] [PASSED] drm_test_format_block_width_tiled
[23:38:53] [PASSED] drm_test_format_block_height_invalid
[23:38:53] [PASSED] drm_test_format_block_height_one_plane
[23:38:53] [PASSED] drm_test_format_block_height_two_plane
[23:38:53] [PASSED] drm_test_format_block_height_three_plane
[23:38:53] [PASSED] drm_test_format_block_height_tiled
[23:38:53] [PASSED] drm_test_format_min_pitch_invalid
[23:38:53] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[23:38:53] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[23:38:53] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[23:38:53] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[23:38:53] [PASSED] drm_test_format_min_pitch_two_plane
[23:38:53] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[23:38:53] [PASSED] drm_test_format_min_pitch_tiled
[23:38:53] =================== [PASSED] drm_format ====================
[23:38:53] ============== drm_framebuffer (10 subtests) ===============
[23:38:53] ========== drm_test_framebuffer_check_src_coords  ==========
[23:38:53] [PASSED] Success: source fits into fb
[23:38:53] [PASSED] Fail: overflowing fb with x-axis coordinate
[23:38:53] [PASSED] Fail: overflowing fb with y-axis coordinate
[23:38:53] [PASSED] Fail: overflowing fb with source width
[23:38:53] [PASSED] Fail: overflowing fb with source height
[23:38:53] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[23:38:53] [PASSED] drm_test_framebuffer_cleanup
[23:38:53] =============== drm_test_framebuffer_create  ===============
[23:38:53] [PASSED] ABGR8888 normal sizes
[23:38:53] [PASSED] ABGR8888 max sizes
[23:38:53] [PASSED] ABGR8888 pitch greater than min required
[23:38:53] [PASSED] ABGR8888 pitch less than min required
[23:38:53] [PASSED] ABGR8888 Invalid width
[23:38:53] [PASSED] ABGR8888 Invalid buffer handle
[23:38:53] [PASSED] No pixel format
[23:38:53] [PASSED] ABGR8888 Width 0
[23:38:53] [PASSED] ABGR8888 Height 0
[23:38:53] [PASSED] ABGR8888 Out of bound height * pitch combination
[23:38:53] [PASSED] ABGR8888 Large buffer offset
[23:38:53] [PASSED] ABGR8888 Buffer offset for inexistent plane
[23:38:53] [PASSED] ABGR8888 Invalid flag
[23:38:53] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[23:38:53] [PASSED] ABGR8888 Valid buffer modifier
[23:38:53] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[23:38:53] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[23:38:53] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[23:38:53] [PASSED] NV12 Normal sizes
[23:38:53] [PASSED] NV12 Max sizes
[23:38:53] [PASSED] NV12 Invalid pitch
[23:38:53] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[23:38:53] [PASSED] NV12 different  modifier per-plane
[23:38:53] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[23:38:53] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[23:38:53] [PASSED] NV12 Modifier for inexistent plane
[23:38:53] [PASSED] NV12 Handle for inexistent plane
[23:38:53] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[23:38:53] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[23:38:53] [PASSED] YVU420 Normal sizes
[23:38:53] [PASSED] YVU420 Max sizes
[23:38:53] [PASSED] YVU420 Invalid pitch
[23:38:53] [PASSED] YVU420 Different pitches
[23:38:53] [PASSED] YVU420 Different buffer offsets/pitches
[23:38:53] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[23:38:53] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[23:38:53] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[23:38:53] [PASSED] YVU420 Valid modifier
[23:38:53] [PASSED] YVU420 Different modifiers per plane
[23:38:53] [PASSED] YVU420 Modifier for inexistent plane
[23:38:53] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[23:38:53] [PASSED] X0L2 Normal sizes
[23:38:53] [PASSED] X0L2 Max sizes
[23:38:53] [PASSED] X0L2 Invalid pitch
[23:38:53] [PASSED] X0L2 Pitch greater than minimum required
[23:38:53] [PASSED] X0L2 Handle for inexistent plane
[23:38:53] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[23:38:53] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[23:38:53] [PASSED] X0L2 Valid modifier
[23:38:53] [PASSED] X0L2 Modifier for inexistent plane
[23:38:53] =========== [PASSED] drm_test_framebuffer_create ===========
[23:38:53] [PASSED] drm_test_framebuffer_free
[23:38:53] [PASSED] drm_test_framebuffer_init
[23:38:53] [PASSED] drm_test_framebuffer_init_bad_format
[23:38:53] [PASSED] drm_test_framebuffer_init_dev_mismatch
[23:38:53] [PASSED] drm_test_framebuffer_lookup
[23:38:53] [PASSED] drm_test_framebuffer_lookup_inexistent
[23:38:53] [PASSED] drm_test_framebuffer_modifiers_not_supported
[23:38:53] ================= [PASSED] drm_framebuffer =================
[23:38:53] ================ drm_gem_shmem (8 subtests) ================
[23:38:53] [PASSED] drm_gem_shmem_test_obj_create
[23:38:53] [PASSED] drm_gem_shmem_test_obj_create_private
[23:38:53] [PASSED] drm_gem_shmem_test_pin_pages
[23:38:53] [PASSED] drm_gem_shmem_test_vmap
[23:38:53] [PASSED] drm_gem_shmem_test_get_sg_table
[23:38:53] [PASSED] drm_gem_shmem_test_get_pages_sgt
[23:38:53] [PASSED] drm_gem_shmem_test_madvise
[23:38:53] [PASSED] drm_gem_shmem_test_purge
[23:38:53] ================== [PASSED] drm_gem_shmem ==================
[23:38:53] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[23:38:53] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[23:38:53] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[23:38:53] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[23:38:53] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[23:38:53] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[23:38:53] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[23:38:53] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[23:38:53] [PASSED] Automatic
[23:38:53] [PASSED] Full
[23:38:53] [PASSED] Limited 16:235
[23:38:53] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[23:38:53] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[23:38:53] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[23:38:53] [PASSED] drm_test_check_disable_connector
[23:38:53] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[23:38:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[23:38:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[23:38:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[23:38:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[23:38:53] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[23:38:53] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[23:38:53] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[23:38:53] [PASSED] drm_test_check_output_bpc_dvi
[23:38:53] [PASSED] drm_test_check_output_bpc_format_vic_1
[23:38:53] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[23:38:53] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[23:38:53] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[23:38:53] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[23:38:53] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[23:38:53] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[23:38:53] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[23:38:53] ============ drm_test_check_hdmi_color_format  =============
[23:38:53] [PASSED] AUTO -> RGB
[23:38:53] [PASSED] YCBCR422 -> YUV422
[23:38:53] [PASSED] YCBCR420 -> YUV420
[23:38:53] [PASSED] YCBCR444 -> YUV444
[23:38:53] [PASSED] RGB -> RGB
[23:38:53] ======== [PASSED] drm_test_check_hdmi_color_format =========
[23:38:53] ======== drm_test_check_hdmi_color_format_420_only  ========
[23:38:53] [PASSED] RGB should fail
[23:38:53] [PASSED] YUV444 should fail
[23:38:53] [PASSED] YUV422 should fail
[23:38:53] [PASSED] YUV420 should work
[23:38:53] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[23:38:53] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[23:38:53] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[23:38:53] [PASSED] drm_test_check_broadcast_rgb_value
[23:38:53] [PASSED] drm_test_check_bpc_8_value
[23:38:53] [PASSED] drm_test_check_bpc_10_value
[23:38:53] [PASSED] drm_test_check_bpc_12_value
[23:38:53] [PASSED] drm_test_check_format_value
[23:38:53] [PASSED] drm_test_check_tmds_char_value
[23:38:53] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[23:38:53] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[23:38:53] [PASSED] drm_test_check_mode_valid
[23:38:53] [PASSED] drm_test_check_mode_valid_reject
[23:38:53] [PASSED] drm_test_check_mode_valid_reject_rate
[23:38:53] [PASSED] drm_test_check_mode_valid_reject_max_clock
[23:38:53] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[23:38:53] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[23:38:53] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[23:38:53] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[23:38:53] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[23:38:53] [PASSED] drm_test_check_infoframes
[23:38:53] [PASSED] drm_test_check_reject_avi_infoframe
[23:38:53] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[23:38:53] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[23:38:53] [PASSED] drm_test_check_reject_audio_infoframe
[23:38:53] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[23:38:53] ================= drm_managed (2 subtests) =================
[23:38:53] [PASSED] drm_test_managed_release_action
[23:38:53] [PASSED] drm_test_managed_run_action
[23:38:53] =================== [PASSED] drm_managed ===================
[23:38:53] =================== drm_mm (6 subtests) ====================
[23:38:53] [PASSED] drm_test_mm_init
[23:38:53] [PASSED] drm_test_mm_debug
[23:38:53] [PASSED] drm_test_mm_align32
[23:38:53] [PASSED] drm_test_mm_align64
[23:38:53] [PASSED] drm_test_mm_lowest
[23:38:53] [PASSED] drm_test_mm_highest
[23:38:53] ===================== [PASSED] drm_mm ======================
[23:38:53] ============= drm_modes_analog_tv (5 subtests) =============
[23:38:53] [PASSED] drm_test_modes_analog_tv_mono_576i
[23:38:53] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[23:38:53] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[23:38:53] [PASSED] drm_test_modes_analog_tv_pal_576i
[23:38:53] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[23:38:53] =============== [PASSED] drm_modes_analog_tv ===============
[23:38:53] ============== drm_panic_helper (3 subtests) ===============
[23:38:53] ============= drm_test_panic_screen_user_map  ==============
[23:38:53] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[23:38:53] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[23:38:53] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[23:38:53] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[23:38:53] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[23:38:53] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[23:38:53] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[23:38:53] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[23:38:54] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[23:38:54] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[23:38:54] ========= [PASSED] drm_test_panic_screen_user_map ==========
[23:38:54] ============= drm_test_panic_screen_user_page  =============
[23:38:54] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[23:38:54] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[23:38:54] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[23:38:54] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[23:38:54] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[23:38:54] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[23:38:54] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[23:38:54] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[23:38:54] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[23:38:54] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[23:38:54] ========= [PASSED] drm_test_panic_screen_user_page =========
[23:38:54] ========== drm_test_panic_screen_user_set_pixel  ===========
[23:38:54] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[23:38:54] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[23:38:54] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[23:38:54] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[23:38:54] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[23:38:54] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[23:38:54] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[23:38:54] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[23:38:54] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[23:38:54] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[23:38:54] ====== [PASSED] drm_test_panic_screen_user_set_pixel =======
[23:38:54] ================ [PASSED] drm_panic_helper =================
[23:38:54] ============== drm_plane_helper (2 subtests) ===============
[23:38:54] =============== drm_test_check_plane_state  ================
[23:38:54] [PASSED] clipping_simple
[23:38:54] [PASSED] clipping_rotate_reflect
[23:38:54] [PASSED] positioning_simple
[23:38:54] [PASSED] upscaling
[23:38:54] [PASSED] downscaling
[23:38:54] [PASSED] rounding1
[23:38:54] [PASSED] rounding2
[23:38:54] [PASSED] rounding3
[23:38:54] [PASSED] rounding4
[23:38:54] =========== [PASSED] drm_test_check_plane_state ============
[23:38:54] =========== drm_test_check_invalid_plane_state  ============
[23:38:54] [PASSED] positioning_invalid
[23:38:54] [PASSED] upscaling_invalid
[23:38:54] [PASSED] downscaling_invalid
[23:38:54] ======= [PASSED] drm_test_check_invalid_plane_state ========
[23:38:54] ================ [PASSED] drm_plane_helper =================
[23:38:54] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[23:38:54] ====== drm_test_connector_helper_tv_get_modes_check  =======
[23:38:54] [PASSED] None
[23:38:54] [PASSED] PAL
[23:38:54] [PASSED] NTSC
[23:38:54] [PASSED] Both, NTSC Default
[23:38:54] [PASSED] Both, PAL Default
[23:38:54] [PASSED] Both, NTSC Default, with PAL on command-line
[23:38:54] [PASSED] Both, PAL Default, with NTSC on command-line
[23:38:54] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[23:38:54] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[23:38:54] ================== drm_rect (9 subtests) ===================
[23:38:54] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[23:38:54] [PASSED] drm_test_rect_clip_scaled_not_clipped
[23:38:54] [PASSED] drm_test_rect_clip_scaled_clipped
[23:38:54] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[23:38:54] ================= drm_test_rect_intersect  =================
[23:38:54] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[23:38:54] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[23:38:54] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[23:38:54] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[23:38:54] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[23:38:54] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[23:38:54] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[23:38:54] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[23:38:54] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[23:38:54] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[23:38:54] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[23:38:54] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[23:38:54] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[23:38:54] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[23:38:54] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[23:38:54] ============= [PASSED] drm_test_rect_intersect =============
[23:38:54] ================ drm_test_rect_calc_hscale  ================
[23:38:54] [PASSED] normal use
[23:38:54] [PASSED] out of max range
[23:38:54] [PASSED] out of min range
[23:38:54] [PASSED] zero dst
[23:38:54] [PASSED] negative src
[23:38:54] [PASSED] negative dst
[23:38:54] ============ [PASSED] drm_test_rect_calc_hscale ============
[23:38:54] ================ drm_test_rect_calc_vscale  ================
[23:38:54] [PASSED] normal use
[23:38:54] [PASSED] out of max range
[23:38:54] [PASSED] out of min range
[23:38:54] [PASSED] zero dst
[23:38:54] [PASSED] negative src
[23:38:54] [PASSED] negative dst
[23:38:54] ============ [PASSED] drm_test_rect_calc_vscale ============
[23:38:54] ================== drm_test_rect_rotate  ===================
[23:38:54] [PASSED] reflect-x
[23:38:54] [PASSED] reflect-y
[23:38:54] [PASSED] rotate-0
[23:38:54] [PASSED] rotate-90
[23:38:54] [PASSED] rotate-180
[23:38:54] [PASSED] rotate-270
[23:38:54] ============== [PASSED] drm_test_rect_rotate ===============
[23:38:54] ================ drm_test_rect_rotate_inv  =================
[23:38:54] [PASSED] reflect-x
[23:38:54] [PASSED] reflect-y
[23:38:54] [PASSED] rotate-0
[23:38:54] [PASSED] rotate-90
[23:38:54] [PASSED] rotate-180
[23:38:54] [PASSED] rotate-270
[23:38:54] ============ [PASSED] drm_test_rect_rotate_inv =============
[23:38:54] ==================== [PASSED] drm_rect =====================
[23:38:54] ============ drm_sysfb_modeset_test (1 subtest) ============
[23:38:54] ============ drm_test_sysfb_build_fourcc_list  =============
[23:38:54] [PASSED] no native formats
[23:38:54] [PASSED] XRGB8888 as native format
[23:38:54] [PASSED] remove duplicates
[23:38:54] [PASSED] convert alpha formats
[23:38:54] [PASSED] random formats
[23:38:54] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[23:38:54] ============= [PASSED] drm_sysfb_modeset_test ==============
[23:38:54] ================== drm_fixp (2 subtests) ===================
[23:38:54] [PASSED] drm_test_int2fixp
[23:38:54] [PASSED] drm_test_sm2fixp
[23:38:54] ==================== [PASSED] drm_fixp =====================
[23:38:54] ============================================================
[23:38:54] Testing complete. Ran 667 tests: passed: 667
[23:38:54] Elapsed time: 28.207s total, 2.543s configuring, 25.249s building, 0.403s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[23:38:54] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:38:56] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:39:06] Starting KUnit Kernel (1/1)...
[23:39:06] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:39:06] ================= ttm_device (5 subtests) ==================
[23:39:06] [PASSED] ttm_device_init_basic
[23:39:06] [PASSED] ttm_device_init_multiple
[23:39:06] [PASSED] ttm_device_fini_basic
[23:39:06] [PASSED] ttm_device_init_no_vma_man
[23:39:06] ================== ttm_device_init_pools  ==================
[23:39:06] [PASSED] No DMA allocations, no DMA32 required
[23:39:06] [PASSED] DMA allocations, DMA32 required
[23:39:06] [PASSED] No DMA allocations, DMA32 required
[23:39:06] [PASSED] DMA allocations, no DMA32 required
[23:39:06] ============== [PASSED] ttm_device_init_pools ==============
[23:39:06] =================== [PASSED] ttm_device ====================
[23:39:06] ================== ttm_pool (8 subtests) ===================
[23:39:06] ================== ttm_pool_alloc_basic  ===================
[23:39:06] [PASSED] One page
[23:39:06] [PASSED] More than one page
[23:39:06] [PASSED] Above the allocation limit
[23:39:06] [PASSED] One page, with coherent DMA mappings enabled
[23:39:06] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[23:39:06] ============== [PASSED] ttm_pool_alloc_basic ===============
[23:39:06] ============== ttm_pool_alloc_basic_dma_addr  ==============
[23:39:06] [PASSED] One page
[23:39:06] [PASSED] More than one page
[23:39:06] [PASSED] Above the allocation limit
[23:39:06] [PASSED] One page, with coherent DMA mappings enabled
[23:39:06] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[23:39:06] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[23:39:06] [PASSED] ttm_pool_alloc_order_caching_match
[23:39:06] [PASSED] ttm_pool_alloc_caching_mismatch
[23:39:06] [PASSED] ttm_pool_alloc_order_mismatch
[23:39:06] [PASSED] ttm_pool_free_dma_alloc
[23:39:06] [PASSED] ttm_pool_free_no_dma_alloc
[23:39:06] [PASSED] ttm_pool_fini_basic
[23:39:06] ==================== [PASSED] ttm_pool =====================
[23:39:06] ================ ttm_resource (8 subtests) =================
[23:39:06] ================= ttm_resource_init_basic  =================
[23:39:06] [PASSED] Init resource in TTM_PL_SYSTEM
[23:39:06] [PASSED] Init resource in TTM_PL_VRAM
[23:39:06] [PASSED] Init resource in a private placement
[23:39:06] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[23:39:06] ============= [PASSED] ttm_resource_init_basic =============
[23:39:06] [PASSED] ttm_resource_init_pinned
[23:39:06] [PASSED] ttm_resource_fini_basic
[23:39:06] [PASSED] ttm_resource_manager_init_basic
[23:39:06] [PASSED] ttm_resource_manager_usage_basic
[23:39:06] [PASSED] ttm_resource_manager_set_used_basic
[23:39:06] [PASSED] ttm_sys_man_alloc_basic
[23:39:06] [PASSED] ttm_sys_man_free_basic
[23:39:06] ================== [PASSED] ttm_resource ===================
[23:39:06] =================== ttm_tt (15 subtests) ===================
[23:39:06] ==================== ttm_tt_init_basic  ====================
[23:39:06] [PASSED] Page-aligned size
[23:39:06] [PASSED] Extra pages requested
[23:39:06] ================ [PASSED] ttm_tt_init_basic ================
[23:39:06] [PASSED] ttm_tt_init_misaligned
[23:39:06] [PASSED] ttm_tt_fini_basic
[23:39:06] [PASSED] ttm_tt_fini_sg
[23:39:06] [PASSED] ttm_tt_fini_shmem
[23:39:06] [PASSED] ttm_tt_create_basic
[23:39:06] [PASSED] ttm_tt_create_invalid_bo_type
[23:39:06] [PASSED] ttm_tt_create_ttm_exists
[23:39:06] [PASSED] ttm_tt_create_failed
[23:39:06] [PASSED] ttm_tt_destroy_basic
[23:39:06] [PASSED] ttm_tt_populate_null_ttm
[23:39:06] [PASSED] ttm_tt_populate_populated_ttm
[23:39:06] [PASSED] ttm_tt_unpopulate_basic
[23:39:06] [PASSED] ttm_tt_unpopulate_empty_ttm
[23:39:06] [PASSED] ttm_tt_swapin_basic
[23:39:06] ===================== [PASSED] ttm_tt ======================
[23:39:06] =================== ttm_bo (14 subtests) ===================
[23:39:06] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[23:39:06] [PASSED] Cannot be interrupted and sleeps
[23:39:06] [PASSED] Cannot be interrupted, locks straight away
[23:39:06] [PASSED] Can be interrupted, sleeps
[23:39:06] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[23:39:06] [PASSED] ttm_bo_reserve_locked_no_sleep
[23:39:06] [PASSED] ttm_bo_reserve_no_wait_ticket
[23:39:06] [PASSED] ttm_bo_reserve_double_resv
[23:39:06] [PASSED] ttm_bo_reserve_interrupted
[23:39:06] [PASSED] ttm_bo_reserve_deadlock
[23:39:06] [PASSED] ttm_bo_unreserve_basic
[23:39:06] [PASSED] ttm_bo_unreserve_pinned
[23:39:06] [PASSED] ttm_bo_unreserve_bulk
[23:39:06] [PASSED] ttm_bo_fini_basic
[23:39:06] [PASSED] ttm_bo_fini_shared_resv
[23:39:06] [PASSED] ttm_bo_pin_basic
[23:39:06] [PASSED] ttm_bo_pin_unpin_resource
[23:39:06] [PASSED] ttm_bo_multiple_pin_one_unpin
[23:39:06] ===================== [PASSED] ttm_bo ======================
[23:39:06] ============== ttm_bo_validate (22 subtests) ===============
[23:39:06] ============== ttm_bo_init_reserved_sys_man  ===============
[23:39:06] [PASSED] Buffer object for userspace
[23:39:06] [PASSED] Kernel buffer object
[23:39:06] [PASSED] Shared buffer object
[23:39:06] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[23:39:06] ============== ttm_bo_init_reserved_mock_man  ==============
[23:39:06] [PASSED] Buffer object for userspace
[23:39:06] [PASSED] Kernel buffer object
[23:39:06] [PASSED] Shared buffer object
[23:39:06] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[23:39:06] [PASSED] ttm_bo_init_reserved_resv
[23:39:06] ================== ttm_bo_validate_basic  ==================
[23:39:06] [PASSED] Buffer object for userspace
[23:39:06] [PASSED] Kernel buffer object
[23:39:06] [PASSED] Shared buffer object
[23:39:06] ============== [PASSED] ttm_bo_validate_basic ==============
[23:39:06] [PASSED] ttm_bo_validate_invalid_placement
[23:39:06] ============= ttm_bo_validate_same_placement  ==============
[23:39:06] [PASSED] System manager
[23:39:06] [PASSED] VRAM manager
[23:39:06] ========= [PASSED] ttm_bo_validate_same_placement ==========
[23:39:06] [PASSED] ttm_bo_validate_failed_alloc
[23:39:06] [PASSED] ttm_bo_validate_pinned
[23:39:06] [PASSED] ttm_bo_validate_busy_placement
[23:39:06] ================ ttm_bo_validate_multihop  =================
[23:39:06] [PASSED] Buffer object for userspace
[23:39:06] [PASSED] Kernel buffer object
[23:39:06] [PASSED] Shared buffer object
[23:39:06] ============ [PASSED] ttm_bo_validate_multihop =============
[23:39:06] ========== ttm_bo_validate_no_placement_signaled  ==========
[23:39:06] [PASSED] Buffer object in system domain, no page vector
[23:39:06] [PASSED] Buffer object in system domain with an existing page vector
[23:39:06] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[23:39:06] ======== ttm_bo_validate_no_placement_not_signaled  ========
[23:39:06] [PASSED] Buffer object for userspace
[23:39:06] [PASSED] Kernel buffer object
[23:39:06] [PASSED] Shared buffer object
[23:39:06] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[23:39:06] [PASSED] ttm_bo_validate_move_fence_signaled
[23:39:06] ========= ttm_bo_validate_move_fence_not_signaled  =========
[23:39:06] [PASSED] Waits for GPU
[23:39:06] [PASSED] Tries to lock straight away
[23:39:06] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[23:39:06] [PASSED] ttm_bo_validate_swapout
[23:39:06] [PASSED] ttm_bo_validate_happy_evict
[23:39:06] [PASSED] ttm_bo_validate_all_pinned_evict
[23:39:06] [PASSED] ttm_bo_validate_allowed_only_evict
[23:39:06] [PASSED] ttm_bo_validate_deleted_evict
[23:39:06] [PASSED] ttm_bo_validate_busy_domain_evict
[23:39:06] [PASSED] ttm_bo_validate_evict_gutting
[23:39:06] [PASSED] ttm_bo_validate_recrusive_evict
[23:39:06] ================= [PASSED] ttm_bo_validate =================
[23:39:06] ============================================================
[23:39:06] Testing complete. Ran 102 tests: passed: 102
[23:39:07] Elapsed time: 12.689s total, 2.527s configuring, 9.947s building, 0.174s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[23:39:07] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:39:09] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:39:18] Starting KUnit Kernel (1/1)...
[23:39:18] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:39:18] =============== dma-buf-fence (12 subtests) ================
[23:39:18] [PASSED] test_sanitycheck
[23:39:18] [PASSED] test_signaling
[23:39:18] [PASSED] test_add_callback
[23:39:18] [PASSED] test_late_add_callback
[23:39:18] [PASSED] test_rm_callback
[23:39:18] [PASSED] test_late_rm_callback
[23:39:18] [PASSED] test_status
[23:39:18] [PASSED] test_error
[23:39:18] [PASSED] test_wait
[23:39:18] [PASSED] test_wait_timeout
[23:39:18] [PASSED] test_stub
[23:39:18] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[23:39:18] ================== [PASSED] dma-buf-fence ==================
[23:39:18] ============ dma-buf-fence-chain (11 subtests) =============
[23:39:18] [PASSED] test_sanitycheck
[23:39:18] [PASSED] test_find_seqno
[23:39:18] [PASSED] test_find_signaled
[23:39:18] [PASSED] test_find_out_of_order
[23:39:23] [PASSED] test_find_gap
[23:39:23] [PASSED] test_find_race
[23:39:23] [PASSED] test_signal_forward
[23:39:23] [PASSED] test_signal_backward
[23:39:23] [PASSED] test_wait_forward
[23:39:23] [PASSED] test_wait_backward
[23:39:23] [PASSED] test_wait_random
[23:39:23] =============== [PASSED] dma-buf-fence-chain ===============
[23:39:23] ============ dma-buf-fence-unwrap (11 subtests) ============
[23:39:23] [PASSED] test_sanitycheck
[23:39:23] [PASSED] test_unwrap_array
[23:39:23] [PASSED] test_unwrap_chain
[23:39:23] [PASSED] test_unwrap_chain_array
[23:39:23] [PASSED] test_unwrap_merge
[23:39:23] [PASSED] test_unwrap_merge_duplicate
[23:39:23] [PASSED] test_unwrap_merge_seqno
[23:39:23] [PASSED] test_unwrap_merge_order
[23:39:23] [PASSED] test_unwrap_merge_complex
[23:39:23] [PASSED] test_unwrap_merge_complex_seqno
[23:39:23] [PASSED] test_dedup_empty
[23:39:23] ============== [PASSED] dma-buf-fence-unwrap ===============
[23:39:23] ================ dma-buf-resv (5 subtests) =================
[23:39:23] [PASSED] test_sanitycheck
[23:39:23] ===================== test_signaling  ======================
[23:39:23] [PASSED] kernel
[23:39:23] [PASSED] write
[23:39:23] [PASSED] read
[23:39:23] [PASSED] bookkeep
[23:39:23] ================= [PASSED] test_signaling ==================
[23:39:23] ====================== test_for_each  ======================
[23:39:23] [PASSED] kernel
[23:39:23] [PASSED] write
[23:39:23] [PASSED] read
[23:39:23] [PASSED] bookkeep
[23:39:23] ================== [PASSED] test_for_each ==================
[23:39:23] ================= test_for_each_unlocked  ==================
[23:39:23] [PASSED] kernel
[23:39:23] [PASSED] write
[23:39:23] [PASSED] read
[23:39:23] [PASSED] bookkeep
[23:39:23] ============= [PASSED] test_for_each_unlocked ==============
[23:39:23] ===================== test_get_fences  =====================
[23:39:23] [PASSED] kernel
[23:39:23] [PASSED] write
[23:39:23] [PASSED] read
[23:39:23] [PASSED] bookkeep
[23:39:23] ================= [PASSED] test_get_fences =================
[23:39:23] ================== [PASSED] dma-buf-resv ===================
[23:39:23] ============================================================
[23:39:23] Testing complete. Ran 51 tests: passed: 50, skipped: 1
[23:39:23] Elapsed time: 16.546s total, 2.498s configuring, 8.775s building, 5.263s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for Allow boot with only media GT

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 852 bytes --]

== Series Details ==

Series: Allow boot with only media GT
URL   : https://patchwork.freedesktop.org/series/178247/
State : success

== Summary ==

CI Bug Log - changes from xe-6105-a6a3cf6cc0759788b1b0ce63f9cfd855d5785449_BAT -> xe-pw-178247v1_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (15 -> 15)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-6105-a6a3cf6cc0759788b1b0ce63f9cfd855d5785449 -> xe-pw-178247v1

  IGT_9186: 9186
  xe-6105-a6a3cf6cc0759788b1b0ce63f9cfd855d5785449: a6a3cf6cc0759788b1b0ce63f9cfd855d5785449
  xe-pw-178247v1: 178247v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/index.html

[-- Attachment #2: Type: text/html, Size: 1400 bytes --]

✓ Xe.CI.FULL: success for Allow boot with only media GT

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 38034 bytes --]

== Series Details ==

Series: Allow boot with only media GT
URL   : https://patchwork.freedesktop.org/series/178247/
State : success

== Summary ==

CI Bug Log - changes from xe-6105-a6a3cf6cc0759788b1b0ce63f9cfd855d5785449_FULL -> xe-pw-178247v1_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (3 -> 3)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-178247v1_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_async_flips@alternate-sync-async-flip:
    - shard-bmg:          [PASS][1] -> [FAIL][2] ([Intel XE#3718] / [Intel XE#6078])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6105-a6a3cf6cc0759788b1b0ce63f9cfd855d5785449/shard-bmg-10/igt@kms_async_flips@alternate-sync-async-flip.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-6/igt@kms_async_flips@alternate-sync-async-flip.html

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-c-dp-2:
    - shard-bmg:          [PASS][3] -> [FAIL][4] ([Intel XE#6078])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6105-a6a3cf6cc0759788b1b0ce63f9cfd855d5785449/shard-bmg-10/igt@kms_async_flips@alternate-sync-async-flip@pipe-c-dp-2.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-6/igt@kms_async_flips@alternate-sync-async-flip@pipe-c-dp-2.html

  * igt@kms_big_fb@linear-64bpp-rotate-270:
    - shard-ptl:          NOTRUN -> [SKIP][5] ([Intel XE#5901])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-1/igt@kms_big_fb@linear-64bpp-rotate-270.html

  * igt@kms_big_fb@linear-8bpp-rotate-270:
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#2327])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-3/igt@kms_big_fb@linear-8bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#1124]) +4 other tests skip
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-8/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_fb@yf-tiled-32bpp-rotate-90:
    - shard-ptl:          NOTRUN -> [SKIP][8] ([Intel XE#5808])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-1/igt@kms_big_fb@yf-tiled-32bpp-rotate-90.html

  * igt@kms_bw@linear-tiling-2-displays-target-1920x1080p:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#367]) +2 other tests skip
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-1/igt@kms_bw@linear-tiling-2-displays-target-1920x1080p.html

  * igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#2887]) +10 other tests skip
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-1/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc.html

  * igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs-cc:
    - shard-ptl:          NOTRUN -> [SKIP][11] ([Intel XE#5822]) +1 other test skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-1/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs-cc.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs@pipe-d-hdmi-a-3:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#2652]) +8 other tests skip
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-1/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs@pipe-d-hdmi-a-3.html

  * igt@kms_chamelium_color@ctm-0-25:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#2325] / [Intel XE#7358]) +1 other test skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-3/igt@kms_chamelium_color@ctm-0-25.html

  * igt@kms_chamelium_color_pipeline@plane-fixed-matrix-yuv-rgb-bt2020:
    - shard-ptl:          NOTRUN -> [SKIP][14] ([Intel XE#8391])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-1/igt@kms_chamelium_color_pipeline@plane-fixed-matrix-yuv-rgb-bt2020.html

  * igt@kms_chamelium_color_pipeline@plane-fixed-matrix-yuv-rgb-bt601-lim:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#7358]) +1 other test skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-1/igt@kms_chamelium_color_pipeline@plane-fixed-matrix-yuv-rgb-bt601-lim.html

  * igt@kms_chamelium_edid@dp-edid-stress-resolution-non-4k:
    - shard-ptl:          NOTRUN -> [SKIP][16] ([Intel XE#2252])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-1/igt@kms_chamelium_edid@dp-edid-stress-resolution-non-4k.html

  * igt@kms_chamelium_hpd@hdmi-hpd-fast:
    - shard-bmg:          NOTRUN -> [SKIP][17] ([Intel XE#2252]) +4 other tests skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-8/igt@kms_chamelium_hpd@hdmi-hpd-fast.html

  * igt@kms_content_protection@legacy@pipe-a-dp-1:
    - shard-bmg:          NOTRUN -> [FAIL][18] ([Intel XE#3304])
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-7/igt@kms_content_protection@legacy@pipe-a-dp-1.html

  * igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][19] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +1 other test fail
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-1/igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-2.html

  * igt@kms_content_protection@lic-type-1:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#7642])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-3/igt@kms_content_protection@lic-type-1.html

  * igt@kms_content_protection@uevent:
    - shard-bmg:          NOTRUN -> [FAIL][21] ([Intel XE#6707] / [Intel XE#7439]) +1 other test fail
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-8/igt@kms_content_protection@uevent.html

  * igt@kms_cursor_crc@cursor-offscreen-64x21:
    - shard-ptl:          NOTRUN -> [SKIP][22] ([Intel XE#5900])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-1/igt@kms_cursor_crc@cursor-offscreen-64x21.html

  * igt@kms_cursor_crc@cursor-onscreen-64x21:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#2320])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-1/igt@kms_cursor_crc@cursor-onscreen-64x21.html

  * igt@kms_dp_link_training@uhbr-mst:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#9533])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-3/igt@kms_dp_link_training@uhbr-mst.html

  * igt@kms_dsc@dsc-fractional-bpp-bigjoiner:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#8265]) +2 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-1/igt@kms_dsc@dsc-fractional-bpp-bigjoiner.html

  * igt@kms_dsc@dsc-with-bpc-formats-bigjoiner:
    - shard-ptl:          NOTRUN -> [SKIP][26] ([Intel XE#5907])
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-1/igt@kms_dsc@dsc-with-bpc-formats-bigjoiner.html

  * igt@kms_fbcon_fbt@psr:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#8680])
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-8/igt@kms_fbcon_fbt@psr.html

  * igt@kms_feature_discovery@psr2:
    - shard-bmg:          NOTRUN -> [SKIP][28] ([Intel XE#2374] / [Intel XE#6128])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-8/igt@kms_feature_discovery@psr2.html

  * igt@kms_flip@2x-flip-vs-dpms:
    - shard-ptl:          NOTRUN -> [SKIP][29] ([Intel XE#2316])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-1/igt@kms_flip@2x-flip-vs-dpms.html

  * igt@kms_flip@flip-vs-absolute-wf_vblank@d-edp1:
    - shard-ptl:          [PASS][30] -> [FAIL][31] ([Intel XE#3098] / [Intel XE#3149] / [Intel XE#9171]) +1 other test fail
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6105-a6a3cf6cc0759788b1b0ce63f9cfd855d5785449/shard-ptl-3/igt@kms_flip@flip-vs-absolute-wf_vblank@d-edp1.html
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-3/igt@kms_flip@flip-vs-absolute-wf_vblank@d-edp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling:
    - shard-bmg:          NOTRUN -> [SKIP][32] ([Intel XE#7178] / [Intel XE#7349])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-3/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#7178] / [Intel XE#7351]) +1 other test skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-3/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
    - shard-ptl:          NOTRUN -> [SKIP][34] ([Intel XE#7178])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-1/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html

  * igt@kms_frontbuffer_tracking@drrs-rgb565-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][35] ([Intel XE#2311]) +38 other tests skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-rgb565-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#4141]) +7 other tests skip
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-argb161616f-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][37] ([Intel XE#7061] / [Intel XE#7356]) +3 other tests skip
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-argb161616f-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-indfb-pgflip-blt:
    - shard-ptl:          NOTRUN -> [SKIP][38] ([Intel XE#5800] / [Intel XE#6312])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-1/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-ptl:          NOTRUN -> [SKIP][39] ([Intel XE#6312]) +1 other test skip
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-1/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-primscrn-cur-indfb-draw-render:
    - shard-ptl:          NOTRUN -> [SKIP][40] ([Intel XE#5812]) +8 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-1/igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbchdr-1p-offscreen-pri-indfb-draw-render:
    - shard-ptl:          NOTRUN -> [SKIP][41] ([Intel XE#7865]) +2 other tests skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-1/igt@kms_frontbuffer_tracking@fbchdr-1p-offscreen-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-abgr161616f-draw-blt:
    - shard-ptl:          NOTRUN -> [SKIP][42] ([Intel XE#7061] / [Intel XE#7356])
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-1/igt@kms_frontbuffer_tracking@fbcpsr-abgr161616f-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][43] ([Intel XE#2313]) +38 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-8/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psrhdr-argb161616f-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][44] ([Intel XE#7061]) +2 other tests skip
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-1/igt@kms_frontbuffer_tracking@psrhdr-argb161616f-draw-render.html

  * igt@kms_hdr@invalid-hdr:
    - shard-bmg:          [PASS][45] -> [SKIP][46] ([Intel XE#1503])
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6105-a6a3cf6cc0759788b1b0ce63f9cfd855d5785449/shard-bmg-2/igt@kms_hdr@invalid-hdr.html
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-9/igt@kms_hdr@invalid-hdr.html

  * igt@kms_joiner@basic-max-non-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][47] ([Intel XE#4298] / [Intel XE#5873])
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-8/igt@kms_joiner@basic-max-non-joiner.html

  * igt@kms_joiner@invalid-modeset-big-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#6901])
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-3/igt@kms_joiner@invalid-modeset-big-joiner.html

  * igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-modifier:
    - shard-bmg:          NOTRUN -> [SKIP][49] ([Intel XE#7283])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-3/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-modifier.html

  * igt@kms_plane@pixel-format-x-tiled-modifier@pipe-b-plane-5:
    - shard-bmg:          NOTRUN -> [SKIP][50] ([Intel XE#8303]) +1 other test skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-8/igt@kms_plane@pixel-format-x-tiled-modifier@pipe-b-plane-5.html

  * igt@kms_plane_multiple@2x-tiling-yf:
    - shard-ptl:          NOTRUN -> [SKIP][51] ([Intel XE#4596] / [Intel XE#5854])
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-1/igt@kms_plane_multiple@2x-tiling-yf.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5:
    - shard-bmg:          NOTRUN -> [SKIP][52] ([Intel XE#2763] / [Intel XE#6886]) +9 other tests skip
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-1/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5.html

  * igt@kms_pm_dc@dc3co-after-dc6@pr-xrgb8888:
    - shard-ptl:          NOTRUN -> [SKIP][53] ([Intel XE#8395] / [Intel XE#8396]) +1 other test skip
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-1/igt@kms_pm_dc@dc3co-after-dc6@pr-xrgb8888.html

  * igt@kms_pm_dc@dc3co-after-dc6@psr2-yuv420:
    - shard-ptl:          NOTRUN -> [SKIP][54] ([Intel XE#8396]) +1 other test skip
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-1/igt@kms_pm_dc@dc3co-after-dc6@psr2-yuv420.html

  * igt@kms_pm_dc@dc5-pageflip-negative:
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#6927] / [Intel XE#8854])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-3/igt@kms_pm_dc@dc5-pageflip-negative.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
    - shard-ptl:          NOTRUN -> [SKIP][56] ([Intel XE#5849])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-1/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf@pipe-a-edp-1:
    - shard-ptl:          NOTRUN -> [SKIP][57] ([Intel XE#5858])
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-1/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf@pipe-a-edp-1.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf@pipe-b-edp-1:
    - shard-ptl:          NOTRUN -> [SKIP][58] ([Intel XE#5858] / [Intel XE#7304]) +1 other test skip
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-1/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf@pipe-b-edp-1.html

  * igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area:
    - shard-bmg:          NOTRUN -> [SKIP][59] ([Intel XE#1489]) +5 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-3/igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area.html

  * igt@kms_psr2_su@frontbuffer-xrgb8888:
    - shard-bmg:          NOTRUN -> [SKIP][60] ([Intel XE#2387] / [Intel XE#7429])
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-3/igt@kms_psr2_su@frontbuffer-xrgb8888.html

  * igt@kms_psr@fbc-psr2-no-drrs:
    - shard-ptl:          NOTRUN -> [SKIP][61] ([Intel XE#1406] / [Intel XE#5835]) +1 other test skip
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-1/igt@kms_psr@fbc-psr2-no-drrs.html

  * igt@kms_psr@psr-primary-page-flip:
    - shard-bmg:          NOTRUN -> [SKIP][62] ([Intel XE#2234] / [Intel XE#2850]) +6 other tests skip
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-3/igt@kms_psr@psr-primary-page-flip.html

  * igt@kms_psr@psr2-primary-render:
    - shard-bmg:          NOTRUN -> [SKIP][63] ([Intel XE#2234])
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-3/igt@kms_psr@psr2-primary-render.html

  * igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
    - shard-bmg:          NOTRUN -> [SKIP][64] ([Intel XE#7795])
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-8/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-bmg:          NOTRUN -> [SKIP][65] ([Intel XE#2426] / [Intel XE#5848])
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-8/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@kms_tv_load_detect@load-detect:
    - shard-bmg:          NOTRUN -> [SKIP][66] ([Intel XE#2450] / [Intel XE#5857])
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-8/igt@kms_tv_load_detect@load-detect.html

  * igt@kms_vrr@flip-basic-fastset:
    - shard-bmg:          NOTRUN -> [SKIP][67] ([Intel XE#1499] / [Intel XE#9271])
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-3/igt@kms_vrr@flip-basic-fastset.html

  * igt@kms_vrr@flip-basic-fastset@pipe-a-edp-1:
    - shard-ptl:          [PASS][68] -> [FAIL][69] ([Intel XE#6293] / [Intel XE#7397])
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6105-a6a3cf6cc0759788b1b0ce63f9cfd855d5785449/shard-ptl-8/igt@kms_vrr@flip-basic-fastset@pipe-a-edp-1.html
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-2/igt@kms_vrr@flip-basic-fastset@pipe-a-edp-1.html

  * igt@kms_vrr@flip-dpms@pipe-a-edp-1:
    - shard-ptl:          [PASS][70] -> [FAIL][71] ([Intel XE#4227] / [Intel XE#7397]) +4 other tests fail
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6105-a6a3cf6cc0759788b1b0ce63f9cfd855d5785449/shard-ptl-3/igt@kms_vrr@flip-dpms@pipe-a-edp-1.html
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-4/igt@kms_vrr@flip-dpms@pipe-a-edp-1.html

  * igt@kms_vrr@lobf:
    - shard-bmg:          NOTRUN -> [SKIP][72] ([Intel XE#2168] / [Intel XE#7444])
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-1/igt@kms_vrr@lobf.html

  * igt@xe_evict@evict-beng-cm-threads-large-multi-vm:
    - shard-ptl:          NOTRUN -> [SKIP][73] ([Intel XE#5764])
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-1/igt@xe_evict@evict-beng-cm-threads-large-multi-vm.html

  * igt@xe_evict@evict-small-external-multi-queue-cm:
    - shard-bmg:          NOTRUN -> [SKIP][74] ([Intel XE#8370])
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-1/igt@xe_evict@evict-small-external-multi-queue-cm.html

  * igt@xe_exec_balancer@once-virtual-userptr-rebind:
    - shard-ptl:          NOTRUN -> [SKIP][75] ([Intel XE#7482]) +1 other test skip
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-1/igt@xe_exec_balancer@once-virtual-userptr-rebind.html

  * igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-rebind:
    - shard-ptl:          NOTRUN -> [SKIP][76] ([Intel XE#5575] / [Intel XE#7484])
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-1/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-rebind.html

  * igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][77] ([Intel XE#2322] / [Intel XE#7372]) +3 other tests skip
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-3/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-invalidate.html

  * igt@xe_exec_fault_mode@atomic-many:
    - shard-bmg:          [PASS][78] -> [FAIL][79] ([Intel XE#8578])
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6105-a6a3cf6cc0759788b1b0ce63f9cfd855d5785449/shard-bmg-8/igt@xe_exec_fault_mode@atomic-many.html
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-5/igt@xe_exec_fault_mode@atomic-many.html

  * igt@xe_exec_fault_mode@twice-multi-queue:
    - shard-bmg:          NOTRUN -> [SKIP][80] ([Intel XE#8374]) +4 other tests skip
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-3/igt@xe_exec_fault_mode@twice-multi-queue.html

  * igt@xe_exec_multi_queue@few-execs-preempt-mode-close-fd-smem:
    - shard-ptl:          NOTRUN -> [SKIP][81] ([Intel XE#8364])
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-1/igt@xe_exec_multi_queue@few-execs-preempt-mode-close-fd-smem.html

  * igt@xe_exec_multi_queue@two-queues-basic-smem:
    - shard-bmg:          NOTRUN -> [SKIP][82] ([Intel XE#8364]) +16 other tests skip
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-3/igt@xe_exec_multi_queue@two-queues-basic-smem.html

  * igt@xe_exec_reset@cm-multi-queue-cat-error-on-secondary:
    - shard-bmg:          NOTRUN -> [SKIP][83] ([Intel XE#8369]) +3 other tests skip
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-3/igt@xe_exec_reset@cm-multi-queue-cat-error-on-secondary.html

  * igt@xe_exec_threads@threads-multi-queue-mixed-fd-userptr:
    - shard-ptl:          NOTRUN -> [SKIP][84] ([Intel XE#8378])
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-1/igt@xe_exec_threads@threads-multi-queue-mixed-fd-userptr.html

  * igt@xe_exec_threads@threads-multi-queue-mixed-userptr-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][85] ([Intel XE#8378]) +5 other tests skip
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-1/igt@xe_exec_threads@threads-multi-queue-mixed-userptr-rebind.html

  * igt@xe_fault_injection@exec-queue-create-fail-xe_exec_queue_create:
    - shard-bmg:          [PASS][86] -> [ABORT][87] ([Intel XE#9463])
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6105-a6a3cf6cc0759788b1b0ce63f9cfd855d5785449/shard-bmg-7/igt@xe_fault_injection@exec-queue-create-fail-xe_exec_queue_create.html
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-4/igt@xe_fault_injection@exec-queue-create-fail-xe_exec_queue_create.html

  * igt@xe_madvise@atomic-global:
    - shard-ptl:          NOTRUN -> [SKIP][88] ([Intel XE#7980])
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-1/igt@xe_madvise@atomic-global.html

  * igt@xe_multigpu_svm@mgpu-atomic-op-basic:
    - shard-bmg:          NOTRUN -> [SKIP][89] ([Intel XE#6964]) +2 other tests skip
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-8/igt@xe_multigpu_svm@mgpu-atomic-op-basic.html

  * igt@xe_page_reclaim@binds-full-pd:
    - shard-ptl:          NOTRUN -> [SKIP][90] ([Intel XE#7793])
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-1/igt@xe_page_reclaim@binds-full-pd.html

  * igt@xe_page_reclaim@invalid-1g:
    - shard-bmg:          NOTRUN -> [SKIP][91] ([Intel XE#7793])
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-8/igt@xe_page_reclaim@invalid-1g.html

  * igt@xe_pat@xa-app-transient-media-off:
    - shard-bmg:          NOTRUN -> [SKIP][92] ([Intel XE#7590])
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-8/igt@xe_pat@xa-app-transient-media-off.html

  * igt@xe_pm@d3cold-i2c:
    - shard-bmg:          NOTRUN -> [SKIP][93] ([Intel XE#5694] / [Intel XE#7370])
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-1/igt@xe_pm@d3cold-i2c.html

  * igt@xe_pm@d3cold-mocs:
    - shard-bmg:          NOTRUN -> [SKIP][94] ([Intel XE#2284] / [Intel XE#7370])
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-3/igt@xe_pm@d3cold-mocs.html

  * igt@xe_pm@s4-mocs:
    - shard-ptl:          [PASS][95] -> [ABORT][96] ([Intel XE#9362])
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6105-a6a3cf6cc0759788b1b0ce63f9cfd855d5785449/shard-ptl-2/igt@xe_pm@s4-mocs.html
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-6/igt@xe_pm@s4-mocs.html

  * igt@xe_pm_residency@gt-c6-freeze@gt1:
    - shard-bmg:          [PASS][97] -> [FAIL][98] ([Intel XE#9254]) +1 other test fail
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6105-a6a3cf6cc0759788b1b0ce63f9cfd855d5785449/shard-bmg-8/igt@xe_pm_residency@gt-c6-freeze@gt1.html
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-5/igt@xe_pm_residency@gt-c6-freeze@gt1.html

  * igt@xe_prefetch_fault@l2-prefetch-fault-svm:
    - shard-bmg:          NOTRUN -> [SKIP][99] ([Intel XE#8815]) +1 other test skip
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-3/igt@xe_prefetch_fault@l2-prefetch-fault-svm.html

  * igt@xe_pxp@display-black-pxp-fb:
    - shard-bmg:          NOTRUN -> [SKIP][100] ([Intel XE#4733] / [Intel XE#7417]) +1 other test skip
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-1/igt@xe_pxp@display-black-pxp-fb.html

  * igt@xe_query@multigpu-query-invalid-query:
    - shard-bmg:          NOTRUN -> [SKIP][101] ([Intel XE#944]) +1 other test skip
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-1/igt@xe_query@multigpu-query-invalid-query.html

  * igt@xe_sriov_flr@flr-twice:
    - shard-bmg:          NOTRUN -> [FAIL][102] ([Intel XE#6569])
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-8/igt@xe_sriov_flr@flr-twice.html

  * igt@xe_survivability@runtime-survivability:
    - shard-bmg:          NOTRUN -> [DMESG-WARN][103] ([Intel XE#9365])
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-1/igt@xe_survivability@runtime-survivability.html

  * igt@xe_vm@bind-array-enobufs:
    - shard-bmg:          NOTRUN -> [FAIL][104] ([Intel XE#9424])
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-8/igt@xe_vm@bind-array-enobufs.html

  * igt@xe_wedged@basic-wedged:
    - shard-ptl:          [PASS][105] -> [DMESG-WARN][106] ([Intel XE#8963]) +1 other test dmesg-warn
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6105-a6a3cf6cc0759788b1b0ce63f9cfd855d5785449/shard-ptl-3/igt@xe_wedged@basic-wedged.html
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-ptl-4/igt@xe_wedged@basic-wedged.html
    - shard-lnl:          [PASS][107] -> [DMESG-WARN][108] ([Intel XE#8963]) +1 other test dmesg-warn
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6105-a6a3cf6cc0759788b1b0ce63f9cfd855d5785449/shard-lnl-5/igt@xe_wedged@basic-wedged.html
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-lnl-8/igt@xe_wedged@basic-wedged.html

  
#### Possible fixes ####

  * igt@kms_bw@linear-tiling-1-displays-target-1920x1080p:
    - shard-bmg:          [SKIP][109] ([Intel XE#367]) -> [PASS][110]
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6105-a6a3cf6cc0759788b1b0ce63f9cfd855d5785449/shard-bmg-4/igt@kms_bw@linear-tiling-1-displays-target-1920x1080p.html
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-7/igt@kms_bw@linear-tiling-1-displays-target-1920x1080p.html

  * igt@xe_fault_injection@exec-queue-create-fail-xe_exec_queue_create_bind:
    - shard-bmg:          [ABORT][111] ([Intel XE#9463]) -> [PASS][112] +1 other test pass
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6105-a6a3cf6cc0759788b1b0ce63f9cfd855d5785449/shard-bmg-6/igt@xe_fault_injection@exec-queue-create-fail-xe_exec_queue_create_bind.html
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-3/igt@xe_fault_injection@exec-queue-create-fail-xe_exec_queue_create_bind.html

  
#### Warnings ####

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          [FAIL][113] ([Intel XE#1729] / [Intel XE#7424]) -> [SKIP][114] ([Intel XE#2426] / [Intel XE#5848])
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6105-a6a3cf6cc0759788b1b0ce63f9cfd855d5785449/shard-bmg-10/igt@kms_tiled_display@basic-test-pattern.html
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/shard-bmg-9/igt@kms_tiled_display@basic-test-pattern.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
  [Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2374
  [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2450]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2450
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#3098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3098
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4227
  [Intel XE#4298]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4298
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
  [Intel XE#5694]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5694
  [Intel XE#5764]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5764
  [Intel XE#5800]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5800
  [Intel XE#5808]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5808
  [Intel XE#5812]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5812
  [Intel XE#5822]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5822
  [Intel XE#5835]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5835
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#5849]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5849
  [Intel XE#5854]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5854
  [Intel XE#5857]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5857
  [Intel XE#5858]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5858
  [Intel XE#5873]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5873
  [Intel XE#5900]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5900
  [Intel XE#5901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5901
  [Intel XE#5907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5907
  [Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078
  [Intel XE#6128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6128
  [Intel XE#6293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6293
  [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
  [Intel XE#6569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6569
  [Intel XE#6707]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6707
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6901
  [Intel XE#6927]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6927
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304
  [Intel XE#7349]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7349
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7397
  [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
  [Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
  [Intel XE#7429]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7429
  [Intel XE#7439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7439
  [Intel XE#7444]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7444
  [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
  [Intel XE#7484]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7484
  [Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
  [Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
  [Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
  [Intel XE#7795]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7795
  [Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
  [Intel XE#7980]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7980
  [Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
  [Intel XE#8303]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8303
  [Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
  [Intel XE#8369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8369
  [Intel XE#8370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8370
  [Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
  [Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
  [Intel XE#8391]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8391
  [Intel XE#8395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8395
  [Intel XE#8396]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8396
  [Intel XE#8578]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8578
  [Intel XE#8680]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8680
  [Intel XE#8815]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8815
  [Intel XE#8854]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8854
  [Intel XE#8963]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8963
  [Intel XE#9171]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9171
  [Intel XE#9254]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9254
  [Intel XE#9271]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9271
  [Intel XE#9362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9362
  [Intel XE#9365]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9365
  [Intel XE#9424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9424
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
  [Intel XE#9463]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9463
  [Intel XE#9533]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9533


Build changes
-------------

  * Linux: xe-6105-a6a3cf6cc0759788b1b0ce63f9cfd855d5785449 -> xe-pw-178247v1

  IGT_9186: 9186
  xe-6105-a6a3cf6cc0759788b1b0ce63f9cfd855d5785449: a6a3cf6cc0759788b1b0ce63f9cfd855d5785449
  xe-pw-178247v1: 178247v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178247v1/index.html

[-- Attachment #2: Type: text/html, Size: 42210 bytes --]

Re: [PATCH 00/11] Allow boot with only media GT

[Piotr Piórkowski]

Stuart Summers <stuart.summers@intel.com> wrote on wto [2026-lis-10 23:14:42 +0000]:
> There is a configfs right now which allows enabling either the
> media GT, the primary GT, both, or neither. The driver right now
> cannot load without a primary GT though. For debug purposes, it
> can be interesting to load with only a media GT though. This of
> course means we lose access to blitter and a lot of the core functions.
> 
> This series attempts to cover the most basic scenarios needed to
> support a media-only configuration by splitting the handle_gmdids
> function, adding proper NULL handling and reworking some of the
> root_tile logic. With media we can't use flat_ccs or
> resizeable bar. These are as much as possible split into separate
> patches to help with reviewability.
> 
> I tested this on CRI in each combination of media, primary, and both.
> The configuration without either GT is still not supported and the
> probe will fail. But at least now the driver load can complete
> with only the media GT.
> 
> In addition to the split, there is a patch here which also starts
> checking the GU_CNTL register for IP presense. This is interesting
> because, particularly for debugging, we can fuse off one or both
> GTs and we still want the driver to comprehend that at runtime. Of
> course the VF can't access this register so it still spins off of
> the GMD ID. I confirmed that the GMD ID reads out as 0 when the
> media is fused off since it is powered down.
> 
> Note that while CPU copies used for migrations and page table updates
> when only media GT is enabled, instead of reworking the migration
> structure to move the VM out of the migration queue and back into
> the migration structure itself, I decided for now to just add a
> kind of "fake" engine (just VDBOX class). This isn't actually
> expected to work, but since we're doing CPU copies it shouldn't
> matter. Hoping to get some review feedback here before doing too much
> extensive refactoring here. I can look there if this isn't acceptable
> though.
> 
> I used claude opus 5 through the process here.

Hi Stuart,

I'm a bit concerned about what this series means for SR-IOV. A lot of PF and VF code assumes
the tile always has a primary GT, and the series doesn't touch any of the SR-IOV paths.
Once probe accepts a device without a primary GT, both a PF and a VF running media-only can
hit these paths.

I used an AI assistant to search the code for places that could break. I reviewed its findings
myself, but this is static analysis only, nothing has been run on hardware. Migration is left out;
the list covers only the basic flow: probe PF, provision VFs, enable VFs, FLR, probe VF.

PF side:
1) VF GGTT is never provisioned. Fair provisioning (xe_gt_sriov_pf_config_set_fair_locked())
handles GGTT and LMEM only for the main GT, and the bulk/sysfs provisioning paths only walk
XE_GT_TYPE_MAIN GTs. VFs come up with no GGTT.
2) NULL derefs of tile->primary_gt in the PF config code:
 - pf_push_full_vf_config() for the media GT takes the GGTT config from primary_gt via pf_pick_vf_config(primary, vfid)
 - pf_validate_vf_config(): pf_get_vf_config_ggtt(primary_gt) and pf_get_vf_config_lmem(primary_gt)
 - pf_distribute_config_ggtt(): pf_push_vf_cfg_ggtt(tile->primary_gt, ...)
 - xe_gt_sriov_pf_config_get_ggtt(): pf_get_vf_config_ggtt() / pf_get_spare_ggtt() on primary_gt
 - pf_update_vf_lmtt(): pf_get_vf_config_lmem(tile->primary_gt, ...)
 - xe_sriov_pf_provision.c: the bulk/per-VF/query VRAM helpers call the *_lmem_locked() functions on tile->primary_gt, and these are reachable from sysfs
3) The tile-level PF debugfs files (ggtt_available, ggtt_provisioned, lmem_provisioned, and
the ggtt/vram attributes in xe_tile_sriov_pf_debugfs.c) all use tile->primary_gt, so a plain read dereferences NULL.
4) LMTT is never set up. xe_lmtt_init() is called from xe_gt_init() only for the main GT,
and xe_lmtt_init_hw() on the media GT then returns early (!lmtt->pd). On dGFX VFs end up
without any LMEM mapping.
5) VF resources are not cleaned up on FLR. Releasing and sanitizing VF GGTT/LMEM
(pf_release_vf_config(), pf_sanitize_vf_resources()) only happens on the main GT,
so a VF's memory would not be cleared between VF users. The VF service reset
in pf_exit_vf_flr_reset_data() is also gated on the main GT, so it never runs.
6) With gt_types_allowed=media on a part that still has the graphics IP, the PF never loads
the primary GuC, so VFs fail when they try to bootstrap with it (see 7).

VF side:
7) read_gmdid() skips the GuC query for media when configfs disallows the media GT, but
it has no matching skip for graphics. A media-only VF therefore still bootstraps through
the primary GuC, and that fails if the PF doesn't run it. gt_fused() always returns false
for a VF, so a VF has no other way to find out that the graphics IP is missing.
8) On dGFX, vf_get_lmem_info() is only queried on the main GT, so a media-only VF sees zero LMEM.


Thanks,
Piotr


> 
> Stuart Summers (11):
>   drm/xe: Detect each GMD_ID IP in a loop
>   drm/xe: Tolerate a missing graphics IP in xe_info_init()
>   drm/xe: Verify IP presence against GU_CNTL
>   drm/xe: Guard per-tile primary GT accesses
>   drm/xe: Stop assuming the root tile has a primary GT
>   drm/xe: Do not claim flat CCS without a graphics IP
>   drm/xe: Run page table updates on the media GT when there is no
>     primary
>   drm/xe: Document that gt_types_allowed=media now probes
>   drm/xe: Fall back to CPU copies when the tile cannot blit
>   drm/xe: Require a fully visible VRAM BAR without a primary GT
>   drm/xe: Allow probe without a primary GT
> 
>  drivers/gpu/drm/xe/regs/xe_regs.h  |   2 +
>  drivers/gpu/drm/xe/xe_bo.c         |  43 +++++---
>  drivers/gpu/drm/xe/xe_configfs.c   |   7 +-
>  drivers/gpu/drm/xe/xe_device.h     |  16 +++
>  drivers/gpu/drm/xe/xe_exec_queue.c |   5 +-
>  drivers/gpu/drm/xe/xe_gt.c         |  11 +-
>  drivers/gpu/drm/xe/xe_memirq.c     |   9 +-
>  drivers/gpu/drm/xe/xe_migrate.c    |  45 ++++++---
>  drivers/gpu/drm/xe/xe_migrate.h    |   2 +
>  drivers/gpu/drm/xe/xe_oa.c         |  24 ++++-
>  drivers/gpu/drm/xe/xe_pagefault.c  |   4 +-
>  drivers/gpu/drm/xe/xe_pci.c        | 156 +++++++++++++++++++----------
>  drivers/gpu/drm/xe/xe_query.c      |   3 +-
>  drivers/gpu/drm/xe/xe_tile.h       |  32 ++++++
>  drivers/gpu/drm/xe/xe_tlb_inval.c  |  41 ++++----
>  drivers/gpu/drm/xe/xe_vm.c         |   2 +-
>  drivers/gpu/drm/xe/xe_vram.c       |  15 +++
>  17 files changed, 295 insertions(+), 122 deletions(-)
> 
> -- 
> 2.43.0
> 

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