Re: [PATCH v2 18/28] KVM: arm64: nv: Emulate CMOs via writable-clean translations as NOPs

[Oliver Upton <oupton@kernel.org>]

On Wed, Nov 04, 2026 at 06:32:43PM +0000, Leonardo Bras wrote:
> > > > The operations would be, approximately:
> > > > 
> > > >  - Take a stage-2 permission fault on the cache maintenance instruction.
> > > >    Walk the guest's stage-2 and find a translation in writable-clean
> > > >    state.
> > > > 
> > > >  - Pause the VM, re-enter the guest and single-step the instruction. If
> > > >    we take the debug exception then the guest must've changed the
> > > >    instruction. Go back to base state.
> > > 
> > > Pausing the VM would be required so other vcpu treads do not access the 
> > > page we are trying to run CMO on, right? 

Messing with the data side is fine, the concern is with the page the
instruction sits in.

> > > > 
> > > >  - If we take another stage-2 permission fault for a cache maintenance
> > > >    instruction, temporarily promote the translation to RW in the shadow
> > > >    stage-2 and re-enter with single-step enabled.
> 
> But what if instead of RW we made it WC, and enabled Hardware HAFDBS just 
> in this cpu?
> 
> Other CPUs with HAFDBS=off would fault on write, and we could block them 
> there. 
> 
> (We would have to serialize those accesses, though, as multiple vcpus could 
> use the same strategy at the same time)

That would do what we want, just the idea of maintaining some state
machine across multiple guest exits feels pretty gnarly. Trap + emulate
is the way to go if we can't NOP the CMO.

Thanks,
Oliver