* [PATCH 01/12] phy: rcar-gen3-usb2: Replace the deprecated extcon API
From: Chanwoo Choi @ 2016-12-06 0:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1480485460-2663-2-git-send-email-cw00.choi@samsung.com>
Hi Kishon,
Could you review and pick the patch1/2 for phy driver?
Best Regards,
Chanwoo Choi
On 2016? 11? 30? 14:57, Chanwoo Choi wrote:
> This patch replaces the deprecated extcon API as following:
> - extcon_set_cable_state_() -> extcon_set_state_sync()
>
> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
> ---
> drivers/phy/phy-rcar-gen3-usb2.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/phy/phy-rcar-gen3-usb2.c b/drivers/phy/phy-rcar-gen3-usb2.c
> index bd2430d7339c..7f8081f157f4 100644
> --- a/drivers/phy/phy-rcar-gen3-usb2.c
> +++ b/drivers/phy/phy-rcar-gen3-usb2.c
> @@ -93,11 +93,11 @@ static void rcar_gen3_phy_usb2_work(struct work_struct *work)
> work);
>
> if (ch->extcon_host) {
> - extcon_set_cable_state_(ch->extcon, EXTCON_USB_HOST, true);
> - extcon_set_cable_state_(ch->extcon, EXTCON_USB, false);
> + extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true);
> + extcon_set_state_sync(ch->extcon, EXTCON_USB, false);
> } else {
> - extcon_set_cable_state_(ch->extcon, EXTCON_USB_HOST, false);
> - extcon_set_cable_state_(ch->extcon, EXTCON_USB, true);
> + extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false);
> + extcon_set_state_sync(ch->extcon, EXTCON_USB, true);
> }
> }
>
>
^ permalink raw reply
* [PATCH 03/12] power_supply: axp288_charger: Replace the extcon API
From: Chanwoo Choi @ 2016-12-06 0:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1480485460-2663-4-git-send-email-cw00.choi@samsung.com>
Hi Sebastian,
Could you please review and pick the patch3/4 for power-supply driver?
Best Regards,
Chanwoo Choi
On 2016? 11? 30? 14:57, Chanwoo Choi wrote:
> This patch uses the resource-managed extcon API for extcon_register_notifier()
> and replaces the deprecated extcon API as following:
> - extcon_get_cable_state_() -> extcon_get_state()
>
> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
> ---
> drivers/power/supply/axp288_charger.c | 51 +++++++++--------------------------
> 1 file changed, 13 insertions(+), 38 deletions(-)
>
> diff --git a/drivers/power/supply/axp288_charger.c b/drivers/power/supply/axp288_charger.c
> index 75b8e0c7402b..1115052e9a69 100644
> --- a/drivers/power/supply/axp288_charger.c
> +++ b/drivers/power/supply/axp288_charger.c
> @@ -581,15 +581,15 @@ static void axp288_charger_extcon_evt_worker(struct work_struct *work)
> bool old_connected = info->cable.connected;
>
> /* Determine cable/charger type */
> - if (extcon_get_cable_state_(edev, EXTCON_CHG_USB_SDP) > 0) {
> + if (extcon_get_state(edev, EXTCON_CHG_USB_SDP) > 0) {
> dev_dbg(&info->pdev->dev, "USB SDP charger is connected");
> info->cable.connected = true;
> info->cable.chg_type = POWER_SUPPLY_TYPE_USB;
> - } else if (extcon_get_cable_state_(edev, EXTCON_CHG_USB_CDP) > 0) {
> + } else if (extcon_get_state(edev, EXTCON_CHG_USB_CDP) > 0) {
> dev_dbg(&info->pdev->dev, "USB CDP charger is connected");
> info->cable.connected = true;
> info->cable.chg_type = POWER_SUPPLY_TYPE_USB_CDP;
> - } else if (extcon_get_cable_state_(edev, EXTCON_CHG_USB_DCP) > 0) {
> + } else if (extcon_get_state(edev, EXTCON_CHG_USB_DCP) > 0) {
> dev_dbg(&info->pdev->dev, "USB DCP charger is connected");
> info->cable.connected = true;
> info->cable.chg_type = POWER_SUPPLY_TYPE_USB_DCP;
> @@ -686,7 +686,7 @@ static int axp288_charger_handle_otg_evt(struct notifier_block *nb,
> struct axp288_chrg_info *info =
> container_of(nb, struct axp288_chrg_info, otg.id_nb);
> struct extcon_dev *edev = info->otg.cable;
> - int usb_host = extcon_get_cable_state_(edev, EXTCON_USB_HOST);
> + int usb_host = extcon_get_state(edev, EXTCON_USB_HOST);
>
> dev_dbg(&info->pdev->dev, "external connector USB-Host is %s\n",
> usb_host ? "attached" : "detached");
> @@ -841,33 +841,27 @@ static int axp288_charger_probe(struct platform_device *pdev)
> /* Register for extcon notification */
> INIT_WORK(&info->cable.work, axp288_charger_extcon_evt_worker);
> info->cable.nb.notifier_call = axp288_charger_handle_cable_evt;
> - ret = extcon_register_notifier(info->cable.edev, EXTCON_CHG_USB_SDP,
> - &info->cable.nb);
> + ret = devm_extcon_register_notifier(&pdev->dev, info->cable.edev,
> + EXTCON_CHG_USB_SDP, &info->cable.nb);
> if (ret) {
> dev_err(&info->pdev->dev,
> "failed to register extcon notifier for SDP %d\n", ret);
> return ret;
> }
>
> - ret = extcon_register_notifier(info->cable.edev, EXTCON_CHG_USB_CDP,
> - &info->cable.nb);
> + ret = devm_extcon_register_notifier(&pdev->dev, info->cable.edev,
> + EXTCON_CHG_USB_CDP, &info->cable.nb);
> if (ret) {
> dev_err(&info->pdev->dev,
> "failed to register extcon notifier for CDP %d\n", ret);
> - extcon_unregister_notifier(info->cable.edev,
> - EXTCON_CHG_USB_SDP, &info->cable.nb);
> return ret;
> }
>
> - ret = extcon_register_notifier(info->cable.edev, EXTCON_CHG_USB_DCP,
> - &info->cable.nb);
> + ret = devm_extcon_register_notifier(&pdev->dev, info->cable.edev,
> + EXTCON_CHG_USB_DCP, &info->cable.nb);
> if (ret) {
> dev_err(&info->pdev->dev,
> "failed to register extcon notifier for DCP %d\n", ret);
> - extcon_unregister_notifier(info->cable.edev,
> - EXTCON_CHG_USB_SDP, &info->cable.nb);
> - extcon_unregister_notifier(info->cable.edev,
> - EXTCON_CHG_USB_CDP, &info->cable.nb);
> return ret;
> }
>
> @@ -887,13 +881,13 @@ static int axp288_charger_probe(struct platform_device *pdev)
> /* Register for OTG notification */
> INIT_WORK(&info->otg.work, axp288_charger_otg_evt_worker);
> info->otg.id_nb.notifier_call = axp288_charger_handle_otg_evt;
> - ret = extcon_register_notifier(info->otg.cable, EXTCON_USB_HOST,
> - &info->otg.id_nb);
> + ret = devm_extcon_register_notifier(&pdev->dev, info->otg.cable,
> + EXTCON_USB_HOST, &info->otg.id_nb);
> if (ret)
> dev_warn(&pdev->dev, "failed to register otg notifier\n");
>
> if (info->otg.cable)
> - info->otg.id_short = extcon_get_cable_state_(
> + info->otg.id_short = extcon_get_state(
> info->otg.cable, EXTCON_USB_HOST);
>
> /* Register charger interrupts */
> @@ -921,17 +915,8 @@ static int axp288_charger_probe(struct platform_device *pdev)
> return 0;
>
> intr_reg_failed:
> - if (info->otg.cable)
> - extcon_unregister_notifier(info->otg.cable, EXTCON_USB_HOST,
> - &info->otg.id_nb);
> power_supply_unregister(info->psy_usb);
> psy_reg_failed:
> - extcon_unregister_notifier(info->cable.edev, EXTCON_CHG_USB_SDP,
> - &info->cable.nb);
> - extcon_unregister_notifier(info->cable.edev, EXTCON_CHG_USB_CDP,
> - &info->cable.nb);
> - extcon_unregister_notifier(info->cable.edev, EXTCON_CHG_USB_DCP,
> - &info->cable.nb);
> return ret;
> }
>
> @@ -939,16 +924,6 @@ static int axp288_charger_remove(struct platform_device *pdev)
> {
> struct axp288_chrg_info *info = dev_get_drvdata(&pdev->dev);
>
> - if (info->otg.cable)
> - extcon_unregister_notifier(info->otg.cable, EXTCON_USB_HOST,
> - &info->otg.id_nb);
> -
> - extcon_unregister_notifier(info->cable.edev, EXTCON_CHG_USB_SDP,
> - &info->cable.nb);
> - extcon_unregister_notifier(info->cable.edev, EXTCON_CHG_USB_CDP,
> - &info->cable.nb);
> - extcon_unregister_notifier(info->cable.edev, EXTCON_CHG_USB_DCP,
> - &info->cable.nb);
> power_supply_unregister(info->psy_usb);
>
> return 0;
>
^ permalink raw reply
* [PATCH v3 3/4] dt-bindings: display: add Amlogic Meson DRM Bindings
From: Rob Herring @ 2016-12-06 0:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1480583160-31806-4-git-send-email-narmstrong@baylibre.com>
On Thu, Dec 01, 2016 at 10:05:59AM +0100, Neil Armstrong wrote:
> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> .../bindings/display/amlogic,meson-vpu.txt | 112 +++++++++++++++++++++
> 1 file changed, 112 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/amlogic,meson-vpu.txt
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* [PATCH v3 3/5] spi: armada-3700: Add documentation for the Armada 3700 SPI Controller
From: Rob Herring @ 2016-12-06 0:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161201102719.4291-4-romain.perier@free-electrons.com>
On Thu, Dec 01, 2016 at 11:27:17AM +0100, Romain Perier wrote:
> This adds the devicetree bindings documentation for the SPI controller
> present in the Marvell Armada 3700 SoCs.
>
> Signed-off-by: Romain Perier <romain.perier@free-electrons.com>
> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> ---
>
> Changes in v3:
> - Added tag "Tested-by" by Gregory
> - Fixed commit title, as requested by Mark Brown
>
> .../devicetree/bindings/spi/spi-armada-3700.txt | 25 ++++++++++++++++++++++
> 1 file changed, 25 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/spi/spi-armada-3700.txt
Didn't catch the duplicate with the subject change...
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* [PATCHv4 05/10] arm64: Use __pa_symbol for kernel symbols
From: Florian Fainelli @ 2016-12-06 0:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1480445729-27130-6-git-send-email-labbott@redhat.com>
On 11/29/2016 10:55 AM, Laura Abbott wrote:
> __pa_symbol is technically the marco that should be used for kernel
> symbols. Switch to this as a pre-requisite for DEBUG_VIRTUAL which
> will do bounds checking. As part of this, introduce lm_alias, a
> macro which wraps the __va(__pa(...)) idiom used a few places to
> get the alias.
>
> Signed-off-by: Laura Abbott <labbott@redhat.com>
> ---
> v4: Stop calling __va early, conversion of a few more sites. I decided against
> wrapping the __p*d_populate calls into new functions since the call sites
> should be limited.
> ---
> - pud_populate(&init_mm, pud, bm_pmd);
> + if (pud_none(*pud))
> + __pud_populate(pud, __pa_symbol(bm_pmd), PMD_TYPE_TABLE);
> pmd = fixmap_pmd(addr);
> - pmd_populate_kernel(&init_mm, pmd, bm_pte);
> + __pmd_populate(pmd, __pa_symbol(bm_pte), PMD_TYPE_TABLE);
Is there a particular reason why pmd_populate_kernel() is not changed to
use __pa_symbol() instead of using __pa()? The other users in the arm64
kernel is arch/arm64/kernel/hibernate.c which seems to call this against
kernel symbols as well?
--
Florian
^ permalink raw reply
* [PATCH v2 1/2] arm64: dts: zx: Fix gic GICR property
From: Olof Johansson @ 2016-12-06 0:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161205022451.GA2749@dragon>
Hi Shawn,
On Sun, Dec 4, 2016 at 6:24 PM, Shawn Guo <shawnguo@kernel.org> wrote:
> Hi Arnd,
>
> On Fri, Dec 02, 2016 at 09:28:58PM +0100, Arnd Bergmann wrote:
>> Given that there is any concern about the patch now, and the merge
>> window is almost open, I'm moving both patches to the
>> next/fixes-non-critical branch and will merge it for v4.10 instead
>> of sending it for v4.9.
>>
>> If you end up deciding that the patch is wrong, please follow up
>> with a fix on top. Once the situation is resolved and the patch
>> merged upstream, feel free to ask stable at vger.kernel.org for a
>> backport to stable kernels to get it into v4.9.x.
>
> The patch is correct, though it can be cleaned up a bit further per
> Marc's suggestion. Since we now have 4.9-rc8, I'm wondering if we can
> still get this into 4.9 to save the stable kernel backport.
>
> I sent you a cleanup patch on top of this one yesterday. If you like,
> I can quickly resend the patch with the cleanup squashed.
Since the patches have already been applied, an incremental patch to
apply on top would work best here.
Thanks!
-Olof
^ permalink raw reply
* [resend v2: PATCH 1/2] dt-bindings: Document the hi3660 reset bindings
From: zhangfei @ 2016-12-06 1:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5982682.vMJxVociDa@wuerfel>
Hi, Arnd
On 2016?12?02? 20:32, Arnd Bergmann wrote:
> On Friday, December 2, 2016 8:21:33 AM CET zhangfei wrote:
>> Hi, Arnd
>>
>> On 2016?12?01? 20:05, Arnd Bergmann wrote:
>>> On Thursday, December 1, 2016 8:48:40 AM CET Zhangfei Gao wrote:
>>>> + hisi,reset-bits = <0x20 0x8 /* 0: i2c0 */
>>>> + 0x20 0x10 /* 1: i2c1 */
>>>> + 0x20 0x20 /* 2: i2c2 */
>>>> + 0x20 0x8000000>; /* 3: i2c6 */
>>>> + };
>>>> +
>>>> +Specifying reset lines connected to IP modules
>>>> +==============================================
>>>> +example:
>>>> +
>>>> + i2c0: i2c at ..... {
>>>> + ...
>>>> + resets = <&iomcu_rst 0>;
>>>> + ...
>>>> + };
>>> I don't really like this approach, since now the information is
>>> in two places. Why not put the data into the reset specifier
>>> directly when it is used?
>> Any example, still not understand.
>> They are consumer and provider.
> I mean in the i2c node, have
>
> i2c0: i2c at ..... {
> ...
> resets = <&iomcu_rst 0x20 0x8>;
> ...
> }
Got it.
There is function of_xlate in reset_controller_dev can parse the dts
when devm_reset_control_get
* @of_xlate: translation function to translate from specifier as found
in the
* device tree to id as given to the reset control ops
Will use this instead.
>>> Also the format seems a little too close to the actual register
>>> layout and could be a little more abstract, using bit numbers instead
>>> of a bitmask and register numbers instead of offsets.
>> We use bit numbers first.
>> But in the developing process, we found several bits may be required for
>> one driver.
>> And they may not be continuous as the bits may already be occupied.
>> Directly using offset, we can set several bits together for simple, to
>> give more flexibility.
>> So after discussion, we directly use offset.
> Can you give an example for why this is needed? Is this different
> from a device that has multiple reset lines?
Yes, we can use multiple reset lines, which is also our original method.
But it may have too many reset lines, like pcie driver will have 5 resets.
So just thinking it can be optimized.
However, when using of_xlate, parsing offset & bit to rstc->id (unsigned
int),
It only support u32, so will use bit numbers again.
rstc_id = rcdev->of_xlate(rcdev, &args);
Will update v3 patch, help take a look.
Thanks
^ permalink raw reply
* [PATCH v2 1/2] arm64: dts: zx: Fix gic GICR property
From: Shawn Guo @ 2016-12-06 1:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAOesGMhNJhOZDFvVzU3nVySZLf4N4Rk2mvjb3se_f_1_N=zk3Q@mail.gmail.com>
Hi Olof,
On Mon, Dec 05, 2016 at 04:55:02PM -0800, Olof Johansson wrote:
> Hi Shawn,
>
> On Sun, Dec 4, 2016 at 6:24 PM, Shawn Guo <shawnguo@kernel.org> wrote:
> > Hi Arnd,
> >
> > On Fri, Dec 02, 2016 at 09:28:58PM +0100, Arnd Bergmann wrote:
> >> Given that there is any concern about the patch now, and the merge
> >> window is almost open, I'm moving both patches to the
> >> next/fixes-non-critical branch and will merge it for v4.10 instead
> >> of sending it for v4.9.
> >>
> >> If you end up deciding that the patch is wrong, please follow up
> >> with a fix on top. Once the situation is resolved and the patch
> >> merged upstream, feel free to ask stable at vger.kernel.org for a
> >> backport to stable kernels to get it into v4.9.x.
> >
> > The patch is correct, though it can be cleaned up a bit further per
> > Marc's suggestion. Since we now have 4.9-rc8, I'm wondering if we can
> > still get this into 4.9 to save the stable kernel backport.
> >
> > I sent you a cleanup patch on top of this one yesterday. If you like,
> > I can quickly resend the patch with the cleanup squashed.
>
> Since the patches have already been applied, an incremental patch to
> apply on top would work best here.
No problem. So would you please apply the incremental patch [1] to the
same branch? Or I can send it to you later during -rc cycles. Just let
me know your preference.
Shawn
[1] https://www.spinics.net/lists/arm-kernel/msg546957.html
^ permalink raw reply
* [PATCH v2 1/2] soc: zte: pm_domains: Prepare for supporting ARMv8 2967 family
From: Baoyou Xie @ 2016-12-06 1:30 UTC (permalink / raw)
To: linux-arm-kernel
The ARMv8 2967 family (296718, 296716 etc) uses different value
for controlling the power domain on/off registers, Choose the
value depending on the compatible.
Multiple domains are prepared for the family, they'are privated
by the drivers of boards.
This patch prepares the common functions.
Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
---
drivers/soc/Kconfig | 1 +
drivers/soc/Makefile | 1 +
drivers/soc/zte/Kconfig | 13 ++++
drivers/soc/zte/Makefile | 4 ++
drivers/soc/zte/pm_domains.c | 140 +++++++++++++++++++++++++++++++++++++++++++
drivers/soc/zte/pm_domains.h | 41 +++++++++++++
6 files changed, 200 insertions(+)
create mode 100644 drivers/soc/zte/Kconfig
create mode 100644 drivers/soc/zte/Makefile
create mode 100644 drivers/soc/zte/pm_domains.c
create mode 100644 drivers/soc/zte/pm_domains.h
diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
index f31bceb..f09023f 100644
--- a/drivers/soc/Kconfig
+++ b/drivers/soc/Kconfig
@@ -11,5 +11,6 @@ source "drivers/soc/tegra/Kconfig"
source "drivers/soc/ti/Kconfig"
source "drivers/soc/ux500/Kconfig"
source "drivers/soc/versatile/Kconfig"
+source "drivers/soc/zte/Kconfig"
endmenu
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index 50c23d0..05eae52 100644
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -16,3 +16,4 @@ obj-$(CONFIG_ARCH_TEGRA) += tegra/
obj-$(CONFIG_SOC_TI) += ti/
obj-$(CONFIG_ARCH_U8500) += ux500/
obj-$(CONFIG_PLAT_VERSATILE) += versatile/
+obj-$(CONFIG_ARCH_ZX) += zte/
diff --git a/drivers/soc/zte/Kconfig b/drivers/soc/zte/Kconfig
new file mode 100644
index 0000000..4953c3fa
--- /dev/null
+++ b/drivers/soc/zte/Kconfig
@@ -0,0 +1,13 @@
+#
+# zx SoC drivers
+#
+menuconfig SOC_ZX
+ bool "zx SoC driver support"
+
+if SOC_ZX
+
+config ZX_PM_DOMAINS
+ bool "zx PM domains"
+ depends on PM_GENERIC_DOMAINS
+
+endif
diff --git a/drivers/soc/zte/Makefile b/drivers/soc/zte/Makefile
new file mode 100644
index 0000000..97ac8ea
--- /dev/null
+++ b/drivers/soc/zte/Makefile
@@ -0,0 +1,4 @@
+#
+# zx SOC drivers
+#
+obj-$(CONFIG_ZX_PM_DOMAINS) += pm_domains.o
diff --git a/drivers/soc/zte/pm_domains.c b/drivers/soc/zte/pm_domains.c
new file mode 100644
index 0000000..956c963
--- /dev/null
+++ b/drivers/soc/zte/pm_domains.c
@@ -0,0 +1,140 @@
+/*
+ * Copyright (C) 2015 ZTE Ltd.
+ *
+ * Author: Baoyou Xie <baoyou.xie@linaro.org>
+ * License terms: GNU General Public License (GPL) version 2
+ */
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include "pm_domains.h"
+
+#define PCU_DM_CLKEN(zpd) ((zpd)->reg_offset[REG_CLKEN])
+#define PCU_DM_ISOEN(zpd) ((zpd)->reg_offset[REG_ISOEN])
+#define PCU_DM_RSTEN(zpd) ((zpd)->reg_offset[REG_RSTEN])
+#define PCU_DM_PWREN(zpd) ((zpd)->reg_offset[REG_PWREN])
+#define PCU_DM_ACK_SYNC(zpd) ((zpd)->reg_offset[REG_ACK_SYNC])
+
+static void __iomem *pcubase;
+
+int zx_normal_power_on(struct generic_pm_domain *domain)
+{
+ struct zx_pm_domain *zpd = (struct zx_pm_domain *)domain;
+ unsigned long loop = 20000;
+ u32 val;
+
+ loop = 1000;
+ do {
+ val = readl_relaxed(pcubase + PCU_DM_PWREN(zpd));
+ val |= BIT(zpd->bit);
+ writel_relaxed(val, pcubase + PCU_DM_PWREN(zpd));
+
+ udelay(1);
+ val = readl_relaxed(pcubase
+ + PCU_DM_ACK_SYNC(zpd)) & BIT(zpd->bit);
+ } while (--loop && !val);
+
+ if (!loop) {
+ pr_err("Error: %s %s fail\n", __func__, domain->name);
+ return -EIO;
+ }
+
+ val = readl_relaxed(pcubase + PCU_DM_RSTEN(zpd));
+ val &= ~BIT(zpd->bit);
+ writel_relaxed(val | BIT(zpd->bit), pcubase + PCU_DM_RSTEN(zpd));
+ udelay(5);
+
+ val = readl_relaxed(pcubase + PCU_DM_ISOEN(zpd));
+ val &= ~BIT(zpd->bit);
+ writel_relaxed(val, pcubase + PCU_DM_ISOEN(zpd));
+ udelay(5);
+
+ val = readl_relaxed(pcubase + PCU_DM_CLKEN(zpd));
+ val &= ~BIT(zpd->bit);
+ writel_relaxed(val | BIT(zpd->bit), pcubase + PCU_DM_CLKEN(zpd));
+ udelay(5);
+
+ pr_info("normal poweron %s\n", domain->name);
+
+ return 0;
+}
+
+int zx_normal_power_off(struct generic_pm_domain *domain)
+{
+ struct zx_pm_domain *zpd = (struct zx_pm_domain *)domain;
+ unsigned long loop = 1000;
+ u32 val;
+
+ val = readl_relaxed(pcubase + PCU_DM_CLKEN(zpd));
+ val &= ~BIT(zpd->bit);
+ writel_relaxed(val, pcubase + PCU_DM_CLKEN(zpd));
+ udelay(5);
+
+ val = readl_relaxed(pcubase + PCU_DM_ISOEN(zpd));
+ val &= ~BIT(zpd->bit);
+ writel_relaxed(val | BIT(zpd->bit), pcubase + PCU_DM_ISOEN(zpd));
+ udelay(5);
+
+ val = readl_relaxed(pcubase + PCU_DM_RSTEN(zpd));
+ val &= ~BIT(zpd->bit);
+ writel_relaxed(val, pcubase + PCU_DM_RSTEN(zpd));
+ udelay(5);
+
+ loop = 1000;
+ do {
+ val = readl_relaxed(pcubase + PCU_DM_PWREN(zpd));
+ val &= ~BIT(zpd->bit);
+ writel_relaxed(val, pcubase + PCU_DM_PWREN(zpd));
+
+ udelay(1);
+
+ val = readl_relaxed(pcubase
+ + PCU_DM_ACK_SYNC(zpd)) & BIT(zpd->bit);
+ } while (--loop && val);
+
+ if (!loop) {
+ pr_err("Error: %s %s fail\n", __func__, domain->name);
+ return -EIO;
+ }
+
+ pr_info("normal poweroff %s\n", domain->name);
+
+ return 0;
+}
+
+int
+zx_pd_probe(struct platform_device *pdev,
+ struct generic_pm_domain **zx_pm_domains,
+ int domain_num)
+{
+ struct genpd_onecell_data *genpd_data;
+ struct resource *res;
+ int i;
+
+ genpd_data = devm_kzalloc(&pdev->dev, sizeof(*genpd_data), GFP_KERNEL);
+ if (!genpd_data)
+ return -ENOMEM;
+
+ genpd_data->domains = zx_pm_domains;
+ genpd_data->num_domains = domain_num;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(&pdev->dev, "no memory resource defined\n");
+ return -ENODEV;
+ }
+
+ pcubase = devm_ioremap_resource(&pdev->dev, res);
+ if (!pcubase) {
+ dev_err(&pdev->dev, "ioremap fail.\n");
+ return -EIO;
+ }
+
+ for (i = 0; i < domain_num; ++i)
+ pm_genpd_init(zx_pm_domains[i], NULL, false);
+
+ of_genpd_add_provider_onecell(pdev->dev.of_node, genpd_data);
+ dev_info(&pdev->dev, "powerdomain init ok\n");
+ return 0;
+}
diff --git a/drivers/soc/zte/pm_domains.h b/drivers/soc/zte/pm_domains.h
new file mode 100644
index 0000000..e02518e
--- /dev/null
+++ b/drivers/soc/zte/pm_domains.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2015 ZTE Co., Ltd.
+ * http://www.zte.com.cn
+ *
+ * Header for ZTE's Power Domain Driver support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ZTE_PM_DOMAIN_H
+#define __ZTE_PM_DOMAIN_H
+
+#include <linux/platform_device.h>
+#include <linux/pm_domain.h>
+
+enum {
+ REG_CLKEN,
+ REG_ISOEN,
+ REG_RSTEN,
+ REG_PWREN,
+ REG_ACK_SYNC,
+
+ /* The size of the array - must be last */
+ REG_ARRAY_SIZE,
+};
+
+struct zx_pm_domain {
+ struct generic_pm_domain dm;
+ const u16 bit;
+ const u16 *reg_offset;
+};
+
+extern int zx_normal_power_on(struct generic_pm_domain *domain);
+extern int zx_normal_power_off(struct generic_pm_domain *domain);
+extern int
+zx_pd_probe(struct platform_device *pdev,
+ struct generic_pm_domain **zx_pm_domains,
+ int domain_num);
+#endif /* __ZTE_PM_DOMAIN_H */
--
2.7.4
^ permalink raw reply related
* [PATCH v2 2/2] soc: zte: pm_domains: Add support for zx296718 board
From: Baoyou Xie @ 2016-12-06 1:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1480987828-20549-1-git-send-email-baoyou.xie@linaro.org>
This patch introduces the power domain driver of zx296718
which belongs to zte's 2967 family.
Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
---
drivers/soc/zte/Makefile | 2 +-
drivers/soc/zte/zx296718_pm_domains.c | 182 ++++++++++++++++++++++++++++++++++
2 files changed, 183 insertions(+), 1 deletion(-)
create mode 100644 drivers/soc/zte/zx296718_pm_domains.c
diff --git a/drivers/soc/zte/Makefile b/drivers/soc/zte/Makefile
index 97ac8ea..2d2a2cc 100644
--- a/drivers/soc/zte/Makefile
+++ b/drivers/soc/zte/Makefile
@@ -1,4 +1,4 @@
#
# zx SOC drivers
#
-obj-$(CONFIG_ZX_PM_DOMAINS) += pm_domains.o
+obj-$(CONFIG_ZX_PM_DOMAINS) += pm_domains.o zx296718_pm_domains.o
diff --git a/drivers/soc/zte/zx296718_pm_domains.c b/drivers/soc/zte/zx296718_pm_domains.c
new file mode 100644
index 0000000..ed18b33
--- /dev/null
+++ b/drivers/soc/zte/zx296718_pm_domains.c
@@ -0,0 +1,182 @@
+/*
+ * Copyright (C) 2015 ZTE Ltd.
+ *
+ * Author: Baoyou Xie <baoyou.xie@linaro.org>
+ * License terms: GNU General Public License (GPL) version 2
+ */
+#include <dt-bindings/arm/zte_pm_domains.h>
+#include "pm_domains.h"
+
+static u16 zx296718_offsets[REG_ARRAY_SIZE] = {
+ [REG_CLKEN] = 0x18,
+ [REG_ISOEN] = 0x1c,
+ [REG_RSTEN] = 0x20,
+ [REG_PWREN] = 0x24,
+ [REG_ACK_SYNC] = 0x28,
+};
+
+enum {
+ PCU_DM_VOU = 0,
+ PCU_DM_SAPPU,
+ PCU_DM_VDE,
+ PCU_DM_VCE,
+ PCU_DM_HDE,
+ PCU_DM_VIU,
+ PCU_DM_USB20,
+ PCU_DM_USB21,
+ PCU_DM_USB30,
+ PCU_DM_HSIC,
+ PCU_DM_GMAC,
+ PCU_DM_TS,
+};
+
+static struct zx_pm_domain vou_domain = {
+ .dm = {
+ .name = "vou_domain",
+ .power_off = zx_normal_power_off,
+ .power_on = zx_normal_power_on,
+ },
+ .bit = PCU_DM_VOU,
+ .reg_offset = zx296718_offsets,
+};
+static struct zx_pm_domain sappu_domain = {
+ .dm = {
+ .name = "sappu_domain",
+ .power_off = zx_normal_power_off,
+ .power_on = zx_normal_power_on,
+ },
+ .bit = PCU_DM_SAPPU,
+ .reg_offset = zx296718_offsets,
+};
+static struct zx_pm_domain vde_domain = {
+ .dm = {
+ .name = "vde_domain",
+ .power_off = zx_normal_power_off,
+ .power_on = zx_normal_power_on,
+ },
+ .bit = PCU_DM_VDE,
+ .reg_offset = zx296718_offsets,
+};
+static struct zx_pm_domain vce_domain = {
+ .dm = {
+ .name = "vce_domain",
+ .power_off = zx_normal_power_off,
+ .power_on = zx_normal_power_on,
+ },
+ .bit = PCU_DM_VCE,
+ .reg_offset = zx296718_offsets,
+};
+static struct zx_pm_domain hde_domain = {
+ .dm = {
+ .name = "hde_domain",
+ .power_off = zx_normal_power_off,
+ .power_on = zx_normal_power_on,
+ },
+ .bit = PCU_DM_HDE,
+ .reg_offset = zx296718_offsets,
+};
+
+static struct zx_pm_domain viu_domain = {
+ .dm = {
+ .name = "viu_domain",
+ .power_off = zx_normal_power_off,
+ .power_on = zx_normal_power_on,
+ },
+ .bit = PCU_DM_VIU,
+ .reg_offset = zx296718_offsets,
+};
+static struct zx_pm_domain usb20_domain = {
+ .dm = {
+ .name = "usb20_domain",
+ .power_off = zx_normal_power_off,
+ .power_on = zx_normal_power_on,
+ },
+ .bit = PCU_DM_USB20,
+ .reg_offset = zx296718_offsets,
+};
+static struct zx_pm_domain usb21_domain = {
+ .dm = {
+ .name = "usb21_domain",
+ .power_off = zx_normal_power_off,
+ .power_on = zx_normal_power_on,
+ },
+ .bit = PCU_DM_USB21,
+ .reg_offset = zx296718_offsets,
+};
+static struct zx_pm_domain usb30_domain = {
+ .dm = {
+ .name = "usb30_domain",
+ .power_off = zx_normal_power_off,
+ .power_on = zx_normal_power_on,
+ },
+ .bit = PCU_DM_USB30,
+ .reg_offset = zx296718_offsets,
+};
+static struct zx_pm_domain hsic_domain = {
+ .dm = {
+ .name = "hsic_domain",
+ .power_off = zx_normal_power_off,
+ .power_on = zx_normal_power_on,
+ },
+ .bit = PCU_DM_HSIC,
+ .reg_offset = zx296718_offsets,
+};
+static struct zx_pm_domain gmac_domain = {
+ .dm = {
+ .name = "gmac_domain",
+ .power_off = zx_normal_power_off,
+ .power_on = zx_normal_power_on,
+ },
+ .bit = PCU_DM_GMAC,
+ .reg_offset = zx296718_offsets,
+};
+static struct zx_pm_domain ts_domain = {
+ .dm = {
+ .name = "ts_domain",
+ .power_off = zx_normal_power_off,
+ .power_on = zx_normal_power_on,
+ },
+ .bit = PCU_DM_TS,
+ .reg_offset = zx296718_offsets,
+};
+struct generic_pm_domain *zx296718_pm_domains[] = {
+ [DM_ZX296718_SAPPU] = &sappu_domain.dm,
+ [DM_ZX296718_VDE] = &vde_domain.dm,
+ [DM_ZX296718_VCE] = &vce_domain.dm,
+ [DM_ZX296718_HDE] = &hde_domain.dm,
+ [DM_ZX296718_VIU] = &viu_domain.dm,
+ [DM_ZX296718_USB20] = &usb20_domain.dm,
+ [DM_ZX296718_USB21] = &usb21_domain.dm,
+ [DM_ZX296718_USB30] = &usb30_domain.dm,
+ [DM_ZX296718_HSIC] = &hsic_domain.dm,
+ [DM_ZX296718_GMAC] = &gmac_domain.dm,
+ [DM_ZX296718_TS] = &ts_domain.dm,
+ [DM_ZX296718_VOU] = &vou_domain.dm,
+};
+
+static int zx296718_pd_probe(struct platform_device *pdev)
+{
+ return zx_pd_probe(pdev,
+ zx296718_pm_domains,
+ ARRAY_SIZE(zx296718_pm_domains));
+}
+
+static const struct of_device_id zx296718_pm_domain_matches[] = {
+ { .compatible = "zte,zx296718-pcu", },
+ { },
+};
+
+static struct platform_driver zx296718_pd_driver = {
+ .driver = {
+ .name = "zx-powerdomain",
+ .owner = THIS_MODULE,
+ .of_match_table = zx296718_pm_domain_matches,
+ },
+ .probe = zx296718_pd_probe,
+};
+
+static int __init zx296718_pd_init(void)
+{
+ return platform_driver_register(&zx296718_pd_driver);
+}
+subsys_initcall(zx296718_pd_init);
--
2.7.4
^ permalink raw reply related
* [PATCH 01/12] phy: rcar-gen3-usb2: Replace the deprecated extcon API
From: Yoshihiro Shimoda @ 2016-12-06 1:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1480485460-2663-2-git-send-email-cw00.choi@samsung.com>
Hi,
> From: Chanwoo Choi
> Sent: Wednesday, November 30, 2016 2:57 PM
>
> This patch replaces the deprecated extcon API as following:
> - extcon_set_cable_state_() -> extcon_set_state_sync()
>
> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Thank you for the patch!
Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Best regards,
Yoshihiro Shimoda
^ permalink raw reply
* [PATCH 12/12] usb: renesas_usbhs: Replace the deprecated extcon API
From: Yoshihiro Shimoda @ 2016-12-06 1:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1480485460-2663-13-git-send-email-cw00.choi@samsung.com>
Hi,
> From: Chanwoo Choi
> Sent: Wednesday, November 30, 2016 2:58 PM
>
> This patch replaces the deprecated extcon API as following:
> - extcon_get_cable_state_() -> extcon_get_state()
>
> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Thank you for the patch!
Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Best regards,
Yoshihiro Shimoda
^ permalink raw reply
* [RESEND PATCH v2 4/7] drm/vc4: Add support for the VEC (Video Encoder) IP
From: Florian Fainelli @ 2016-12-06 1:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1480686493-4813-5-git-send-email-boris.brezillon@free-electrons.com>
On 12/02/2016 05:48 AM, Boris Brezillon wrote:
> The VEC IP is a TV DAC, providing support for PAL and NTSC standards.
>
> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> ---
> diff --git a/drivers/gpu/drm/vc4/vc4_vec.c b/drivers/gpu/drm/vc4/vc4_vec.c
> new file mode 100644
> index 000000000000..2d4256fcc6f2
> --- /dev/null
> +++ b/drivers/gpu/drm/vc4/vc4_vec.c
> @@ -0,0 +1,657 @@
> +/*
> + * Copyright (C) 2016 Broadcom Limited
The standard copyright template post acquisition is just Broadcom, not
Broadcom Limited, nor Broadcom corporation. Can you audit your entire
submission and fix this up accordingly?
Thanks!
--
Florian
^ permalink raw reply
* [PATCH v3 0/2] add reset-hi3660
From: Zhangfei Gao @ 2016-12-06 1:51 UTC (permalink / raw)
To: linux-arm-kernel
v3:
change dts usage suggested by Arnd
from
resets = <&iomcu_rst 0>;
to
resets = <&iomcu_rst 0x20 3>; /* offset: 0x20; bit: 3 */
v2:
Considering Arnd and Philipp suggestions,
move reset register to dts as table instead of dts header in case of ABI issue
Zhangfei Gao (2):
dt-bindings: Document the hi3660 reset bindings
reset: hisilicon: add reset-hi3660
.../bindings/reset/hisilicon,hi3660-reset.txt | 36 ++++++
drivers/reset/hisilicon/Kconfig | 7 ++
drivers/reset/hisilicon/Makefile | 1 +
drivers/reset/hisilicon/reset-hi3660.c | 126 +++++++++++++++++++++
4 files changed, 170 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.txt
create mode 100644 drivers/reset/hisilicon/reset-hi3660.c
--
2.7.4
^ permalink raw reply
* [PATCH v3 1/2] dt-bindings: Document the hi3660 reset bindings
From: Zhangfei Gao @ 2016-12-06 1:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1480989092-31847-1-git-send-email-zhangfei.gao@linaro.org>
Add DT bindings documentation for hi3660 SoC reset controller.
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
---
.../bindings/reset/hisilicon,hi3660-reset.txt | 36 ++++++++++++++++++++++
1 file changed, 36 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.txt
diff --git a/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.txt b/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.txt
new file mode 100644
index 0000000..178e478
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.txt
@@ -0,0 +1,36 @@
+Hisilicon System Reset Controller
+======================================
+
+Please also refer to reset.txt in this directory for common reset
+controller binding usage.
+
+The reset controller registers are part of the system-ctl block on
+hi3660 SoC.
+
+Required properties:
+- compatible: should be
+ "hisilicon,hi3660-reset"
+- #reset-cells: 2, see below
+- hisi,rst-syscon: phandle of the reset's syscon.
+
+Example:
+ iomcu: iomcu at ffd7e000 {
+ compatible = "hisilicon,hi3660-iomcu", "syscon";
+ reg = <0x0 0xffd7e000 0x0 0x1000>;
+ };
+
+ iomcu_rst: iomcu_rst_controller {
+ compatible = "hisilicon,hi3660-reset";
+ hisi,rst-syscon = <&iomcu>;
+ #reset-cells = <2>;
+ };
+
+Specifying reset lines connected to IP modules
+==============================================
+example:
+
+ i2c0: i2c at ..... {
+ ...
+ resets = <&iomcu_rst 0x20 3>; /* offset: 0x20; bit: 3 */
+ ...
+ };
--
2.7.4
^ permalink raw reply related
* [PATCH v3 2/2] reset: hisilicon: add reset-hi3660
From: Zhangfei Gao @ 2016-12-06 1:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1480989092-31847-1-git-send-email-zhangfei.gao@linaro.org>
Add hi3660 reset driver
Example of dts usage:
iomcu_rst: iomcu_rst_controller {
compatible = "hisilicon,hi3660-reset";
hisi,rst-syscon = <&iomcu>;
#reset-cells = <2>;
};
i2c0: i2c at ..... {
...
resets = <&iomcu_rst 0x20 3>; /* offset: 0x20; bit: 3 */
...
};
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
---
drivers/reset/hisilicon/Kconfig | 7 ++
drivers/reset/hisilicon/Makefile | 1 +
drivers/reset/hisilicon/reset-hi3660.c | 126 +++++++++++++++++++++++++++++++++
3 files changed, 134 insertions(+)
create mode 100644 drivers/reset/hisilicon/reset-hi3660.c
diff --git a/drivers/reset/hisilicon/Kconfig b/drivers/reset/hisilicon/Kconfig
index 1ff8b0c..10134dc 100644
--- a/drivers/reset/hisilicon/Kconfig
+++ b/drivers/reset/hisilicon/Kconfig
@@ -1,3 +1,10 @@
+config COMMON_RESET_HI3660
+ tristate "Hi3660 Reset Driver"
+ depends on ARCH_HISI || COMPILE_TEST
+ default ARCH_HISI
+ help
+ Build the Hisilicon Hi3660 reset driver.
+
config COMMON_RESET_HI6220
tristate "Hi6220 Reset Driver"
depends on ARCH_HISI || COMPILE_TEST
diff --git a/drivers/reset/hisilicon/Makefile b/drivers/reset/hisilicon/Makefile
index c932f86..ab8a7bf 100644
--- a/drivers/reset/hisilicon/Makefile
+++ b/drivers/reset/hisilicon/Makefile
@@ -1 +1,2 @@
obj-$(CONFIG_COMMON_RESET_HI6220) += hi6220_reset.o
+obj-$(CONFIG_COMMON_RESET_HI3660) += reset-hi3660.o
diff --git a/drivers/reset/hisilicon/reset-hi3660.c b/drivers/reset/hisilicon/reset-hi3660.c
new file mode 100644
index 0000000..17d8bb12
--- /dev/null
+++ b/drivers/reset/hisilicon/reset-hi3660.c
@@ -0,0 +1,126 @@
+/*
+ * Copyright (c) 2016-2017 Linaro Ltd.
+ * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#include <linux/kernel.h>
+#include <linux/mfd/syscon.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/reset-controller.h>
+
+struct hi3660_reset_controller {
+ struct reset_controller_dev rst;
+ struct regmap *map;
+};
+
+#define to_hi3660_reset_controller(_rst) \
+ container_of(_rst, struct hi3660_reset_controller, rst)
+
+static int hi3660_reset_program_hw(struct reset_controller_dev *rcdev,
+ unsigned long idx, bool assert)
+{
+ struct hi3660_reset_controller *rc = to_hi3660_reset_controller(rcdev);
+ unsigned int offset = idx >> 8;
+ unsigned int mask = BIT(idx & 0x1f);
+
+ if (assert)
+ return regmap_write(rc->map, offset, mask);
+ else
+ return regmap_write(rc->map, offset + 4, mask);
+}
+
+static int hi3660_reset_assert(struct reset_controller_dev *rcdev,
+ unsigned long idx)
+{
+ return hi3660_reset_program_hw(rcdev, idx, true);
+}
+
+static int hi3660_reset_deassert(struct reset_controller_dev *rcdev,
+ unsigned long idx)
+{
+ return hi3660_reset_program_hw(rcdev, idx, false);
+}
+
+static int hi3660_reset_dev(struct reset_controller_dev *rcdev,
+ unsigned long idx)
+{
+ int err;
+
+ err = hi3660_reset_assert(rcdev, idx);
+ if (err)
+ return err;
+
+ return hi3660_reset_deassert(rcdev, idx);
+}
+
+static struct reset_control_ops hi3660_reset_ops = {
+ .reset = hi3660_reset_dev,
+ .assert = hi3660_reset_assert,
+ .deassert = hi3660_reset_deassert,
+};
+
+static int hi3660_reset_xlate(struct reset_controller_dev *rcdev,
+ const struct of_phandle_args *reset_spec)
+{
+ unsigned int offset, bit;
+
+ offset = reset_spec->args[0];
+ bit = reset_spec->args[1];
+
+ return (offset << 8) | bit;
+}
+
+static int hi3660_reset_probe(struct platform_device *pdev)
+{
+ struct hi3660_reset_controller *rc;
+ struct device_node *np = pdev->dev.of_node;
+ struct device *dev = &pdev->dev;
+
+ rc = devm_kzalloc(dev, sizeof(*rc), GFP_KERNEL);
+ if (!rc)
+ return -ENOMEM;
+
+ rc->map = syscon_regmap_lookup_by_phandle(np, "hisi,rst-syscon");
+ if (IS_ERR(rc->map)) {
+ dev_err(dev, "failed to get hi3660,rst-syscon\n");
+ return PTR_ERR(rc->map);
+ }
+
+ rc->rst.ops = &hi3660_reset_ops,
+ rc->rst.of_node = np;
+ rc->rst.of_reset_n_cells = 2;
+ rc->rst.of_xlate = hi3660_reset_xlate;
+
+ return reset_controller_register(&rc->rst);
+}
+
+static const struct of_device_id hi3660_reset_match[] = {
+ { .compatible = "hisilicon,hi3660-reset", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, hi3660_reset_match);
+
+static struct platform_driver hi3660_reset_driver = {
+ .probe = hi3660_reset_probe,
+ .driver = {
+ .name = "hi3660-reset",
+ .of_match_table = hi3660_reset_match,
+ },
+};
+
+static int __init hi3660_reset_init(void)
+{
+ return platform_driver_register(&hi3660_reset_driver);
+}
+arch_initcall(hi3660_reset_init);
+
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:hi3660-reset");
+MODULE_DESCRIPTION("HiSilicon Hi3660 Reset Driver");
--
2.7.4
^ permalink raw reply related
* [PATCH v3 -next 2/2] ARM: dts: sunxi: add support for Orange Pi Zero board
From: Alexey Kardashevskiy @ 2016-12-06 1:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161202150513.34691-2-icenowy@aosc.xyz>
On 03/12/16 02:05, Icenowy Zheng wrote:
> Orange Pi Zero is a board that came with the new Allwinner H2+ SoC and a
> SDIO Wi-Fi chip by Allwinner (XR819).
>
> Add a device tree file for it.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
> ---
> Changes since v2:
> - Merged SDIO Wi-Fi patch into it.
> - SDIO Wi-Fi: add a ethernet1 alias to it, as it has no internal NVRAM.
> - SDIO Wi-Fi: changed pinctrl binding to generic pinconf
> - removed all gpio pinctrl nodes
> - changed h2plus to h2-plus
> Changes since v1:
> - Convert to generic pinconf bindings.
> - SDIO Wi-Fi: add patch.
>
> Some notes:
> - The uart1 and uart2 is available on the unsoldered gpio header.
> - The onboard USB connector has its Vbus directly connected to DCIN-5V (the
> power jack)
>
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 159 ++++++++++++++++++++++
> 2 files changed, 160 insertions(+)
> create mode 100644 arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 6447abc..59f6e86 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -844,6 +844,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
> sun8i-a33-sinlinx-sina33.dtb \
> sun8i-a83t-allwinner-h8homlet-v2.dtb \
> sun8i-a83t-cubietruck-plus.dtb \
> + sun8i-h2-plus-orangepi-zero.dtb \
> sun8i-h3-bananapi-m2-plus.dtb \
> sun8i-h3-nanopi-neo.dtb \
> sun8i-h3-orangepi-2.dtb \
> diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
> new file mode 100644
> index 0000000..d18807f
> --- /dev/null
> +++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
> @@ -0,0 +1,159 @@
> +/*
> + * Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.xyz>
> + *
> + * Based on sun8i-h3-orangepi-one.dts, which is:
> + * Copyright (C) 2016 Hans de Goede <hdegoede@redhat.com>
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of the
> + * License, or (at your option) any later version.
> + *
> + * This file is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;
> +#include "sun8i-h3.dtsi"
> +#include "sunxi-common-regulators.dtsi"
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/pinctrl/sun4i-a10.h>
> +
> +/ {
> + model = "Xunlong Orange Pi Zero";
> + compatible = "xunlong,orangepi-zero", "allwinner,sun8i-h2-plus";
> +
> + aliases {
> + serial0 = &uart0;
> + /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
It is not defined there as for:
cef87e9 (tag: next-20161205) 20 hours ago Stephen Rothwell Add linux-next
specific files for 20161205
> + ethernet1 = &xr819;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + pwr_led {
> + label = "orangepi:green:pwr";
> + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
> + default-state = "on";
> + };
> +
> + status_led {
> + label = "orangepi:red:status";
> + gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>;
> + };
> + };
> +
> + reg_vcc_wifi: reg_vcc_wifi {
> + compatible = "regulator-fixed";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-name = "vcc-wifi";
> + enable-active-high;
> + gpio = <&pio 0 20 GPIO_ACTIVE_HIGH>;
> + };
> +
> + wifi_pwrseq: wifi_pwrseq {
> + compatible = "mmc-pwrseq-simple";
> + reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>;
> + };
> +};
> +
> +&ehci1 {
> + status = "okay";
> +};
> +
> +&mmc0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc0_pins_a>;
> + vmmc-supply = <®_vcc3v3>;
> + bus-width = <4>;
> + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
> + cd-inverted;
> + status = "okay";
> +};
> +
> +&mmc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc1_pins_a>;
> + vmmc-supply = <®_vcc_wifi>;
> + mmc-pwrseq = <&wifi_pwrseq>;
> + bus-width = <4>;
> + non-removable;
> + status = "okay";
> +
> + /*
> + * Explicitly define the sdio device, so that we can add an ethernet
> + * alias for it (which e.g. makes u-boot set a mac-address).
> + */
> + xr819: sdio_wifi at 1 {
> + reg = <1>;
> + };
> +};
> +
> +&mmc1_pins_a {
> + bias-pull-up;
> +};
> +
> +&ohci1 {
> + status = "okay";
> +};
> +
> +&uart0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart0_pins_a>;
> + status = "okay";
> +};
> +
> +&uart1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart1_pins>;
> + status = "disabled";
> +};
> +
> +&uart2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart2_pins>;
> + status = "disabled";
> +};
> +
> +&usbphy {
> + /* USB VBUS is always on */
> + status = "okay";
> +};
>
--
Alexey
^ permalink raw reply
* [PATCH v3 -next 1/2] ARM: sunxi: add support for H2+ SoC
From: Alexey Kardashevskiy @ 2016-12-06 2:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161205091955.zkffyktw5trfocnx@lukather>
On 05/12/16 20:19, Maxime Ripard wrote:
> On Fri, Dec 02, 2016 at 11:05:12PM +0800, Icenowy Zheng wrote:
>> Allwinner H2+ is a quad-core Cortex-A7 SoC.
>>
>> It is very like H3, that they share the same SoC ID (0x1680), and H3
>> memory maps as well as drivers works well on the SoC.
>>
>> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
>
> Fixed the alphabetical order in the bindings doc, and applied.
Where is that resulting tree, with these ones and EMAC? Thanks.
--
Alexey
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^ permalink raw reply
* [PATCH v3 0/6] mfd: dt: Add bindings for the Aspeed MFDs
From: Andrew Jeffery @ 2016-12-06 2:53 UTC (permalink / raw)
To: linux-arm-kernel
Hi Lee,
Here's a series describing the bindings for some MFDs in the Aspeed SoCs. I
expect there will be discussion about how I've gone about this with adding a
ranges property to the MFD bindings: The motivation here is to allow re-use of
the standard regs property to describe resources used inside the MFD. This is
partly driven by wanting to avoid modifying the existing IPMI Block Transfer
bindings which were written prior to sorting out how we were going to represent
the Aspeed LPC controller, but also because the register layout for sub-devices
of the LPC controller is quite esoteric. Further, the pinmux state depends on
bits in the Low Pin Count (LPC) bus controller, which is the motivation for
exposing a part of the LPC space as a syscon.
These issues were described in the comments of a small RFC patch, and the
implementation provided here is an extension of those thoughts:
https://lkml.org/lkml/2016/11/17/24
Some of the patches in this MFD series has been split from the v2 of Aspeed
pinmux patches posted below:
https://lkml.org/lkml/2016/11/2/263
and to address your comments on relevant patches in the v2 above I've created a
syscon directory under mfd. The Aspeed SoC Display Controller is the first
bindings document to live there (and is otherwise unchanged), and a subsequent
patch moves all documents whose compatible contains "syscon" but not
"simple-mfd".
Andrew Jeffery (6):
mfd: dt: Fix "indicates" typo in mfd bindings document
mfd: dt: ranges, #address-cells and #size-cells as optional properties
mfd: dt: Add Aspeed Low Pin Count Controller bindings
mfd: dt: Add bindings for the Aspeed LPC Host Controller (LHC)
mfd: dt: Add bindings for the Aspeed SoC Display Controller (GFX)
mfd: dt: Move syscon bindings to syscon subdirectory
.../devicetree/bindings/mfd/aspeed-lpc.txt | 133 +++++++++++++++++++++
Documentation/devicetree/bindings/mfd/mfd.txt | 12 +-
.../devicetree/bindings/mfd/syscon/aspeed-gfx.txt | 17 +++
.../bindings/mfd/{ => syscon}/aspeed-scu.txt | 0
.../bindings/mfd/{ => syscon}/atmel-gpbr.txt | 0
.../bindings/mfd/{ => syscon}/atmel-matrix.txt | 0
.../bindings/mfd/{ => syscon}/atmel-smc.txt | 0
.../bindings/mfd/{ => syscon}/qcom,tcsr.txt | 0
.../bindings/mfd/{ => syscon}/syscon.txt | 0
.../mfd/{ => syscon}/ti-keystone-devctrl.txt | 0
10 files changed, 161 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
create mode 100644 Documentation/devicetree/bindings/mfd/syscon/aspeed-gfx.txt
rename Documentation/devicetree/bindings/mfd/{ => syscon}/aspeed-scu.txt (100%)
rename Documentation/devicetree/bindings/mfd/{ => syscon}/atmel-gpbr.txt (100%)
rename Documentation/devicetree/bindings/mfd/{ => syscon}/atmel-matrix.txt (100%)
rename Documentation/devicetree/bindings/mfd/{ => syscon}/atmel-smc.txt (100%)
rename Documentation/devicetree/bindings/mfd/{ => syscon}/qcom,tcsr.txt (100%)
rename Documentation/devicetree/bindings/mfd/{ => syscon}/syscon.txt (100%)
rename Documentation/devicetree/bindings/mfd/{ => syscon}/ti-keystone-devctrl.txt (100%)
--
2.9.3
^ permalink raw reply
* [PATCH v3 1/6] mfd: dt: Fix "indicates" typo in mfd bindings document
From: Andrew Jeffery @ 2016-12-06 2:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161206025321.1792-1-andrew@aj.id.au>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
---
Documentation/devicetree/bindings/mfd/mfd.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/mfd/mfd.txt b/Documentation/devicetree/bindings/mfd/mfd.txt
index af9d6931a1a2..f1fceeda12f1 100644
--- a/Documentation/devicetree/bindings/mfd/mfd.txt
+++ b/Documentation/devicetree/bindings/mfd/mfd.txt
@@ -19,7 +19,7 @@ Optional properties:
- compatible : "simple-mfd" - this signifies that the operating system should
consider all subnodes of the MFD device as separate devices akin to how
- "simple-bus" inidicates when to see subnodes as children for a simple
+ "simple-bus" indicates when to see subnodes as children for a simple
memory-mapped bus. For more complex devices, when the nexus driver has to
probe registers to figure out what child devices exist etc, this should not
be used. In the latter case the child devices will be determined by the
--
2.9.3
^ permalink raw reply related
* [PATCH v3 2/6] mfd: dt: ranges, #address-cells and #size-cells as optional properties
From: Andrew Jeffery @ 2016-12-06 2:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161206025321.1792-1-andrew@aj.id.au>
Whilst describing a device and not a bus, simple-mfd is modelled on
simple-bus where child nodes are iterated and registered as platform
devices. Some complex devices, e.g. the Aspeed LPC controller, can
benefit from address space mapping such that child nodes can use the
regs property to describe their resources within the multi-function
device.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
---
Documentation/devicetree/bindings/mfd/mfd.txt | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/Documentation/devicetree/bindings/mfd/mfd.txt b/Documentation/devicetree/bindings/mfd/mfd.txt
index f1fceeda12f1..bcb6abb9d413 100644
--- a/Documentation/devicetree/bindings/mfd/mfd.txt
+++ b/Documentation/devicetree/bindings/mfd/mfd.txt
@@ -25,6 +25,16 @@ Optional properties:
be used. In the latter case the child devices will be determined by the
operating system.
+- ranges: Describes the address mapping relationship to the parent. Should set
+ the child's base address to 0, the physical address within parent's address
+ space, and the length of the address map.
+
+- #address-cells: Specifies the number of cells used to represent physical base
+ addresses. Must be present if ranges is used.
+
+- #size-cells: Specifies the number of cells used to represent the size of an
+ address. Must be present if ranges is used.
+
Example:
foo at 1000 {
--
2.9.3
^ permalink raw reply related
* [PATCH v3 3/6] mfd: dt: Add Aspeed Low Pin Count Controller bindings
From: Andrew Jeffery @ 2016-12-06 2:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161206025321.1792-1-andrew@aj.id.au>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
---
.../devicetree/bindings/mfd/aspeed-lpc.txt | 111 +++++++++++++++++++++
1 file changed, 111 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
new file mode 100644
index 000000000000..a97131aba446
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
@@ -0,0 +1,111 @@
+======================================================================
+Device tree bindings for the Aspeed Low Pin Count (LPC) Bus Controller
+======================================================================
+
+The LPC bus is a means to bridge a host CPU to a number of low-bandwidth
+peripheral devices, replacing the use of the ISA bus in the age of PCI[0]. The
+primary use case of the Aspeed LPC controller is as a slave on the bus
+(typically in a Baseboard Management Controller SoC), but under certain
+conditions it can also take the role of bus master.
+
+The LPC controller is represented as a multi-function device to account for the
+mix of functionality it provides. The principle split is between the register
+layout at the start of the I/O space which is, to quote the Aspeed datasheet,
+"basically compatible with the [LPC registers from the] popular BMC controller
+H8S/2168[1]", and everything else, where everything else is an eclectic
+collection of functions with a esoteric register layout. "Everything else",
+here labeled the "host" portion of the controller, includes, but is not limited
+to:
+
+* An IPMI Block Transfer[2] Controller
+
+* An LPC Host Controller: Manages LPC functions such as host vs slave mode, the
+ physical properties of some LPC pins, configuration of serial IRQs, and
+ APB-to-LPC bridging amonst other functions.
+
+* An LPC Host Interface Controller: Manages functions exposed to the host such
+ as LPC firmware hub cycles, configuration of the LPC-to-AHB mapping, UART
+ management and bus snoop configuration.
+
+* A set of SuperIO[3] scratch registers: Enables implementation of e.g. custom
+ hardware management protocols for handover between the host and baseboard
+ management controller.
+
+Additionally the state of the LPC controller influences the pinmux
+configuration, therefore the host portion of the controller is exposed as a
+syscon as a means to arbitrate access.
+
+[0] http://www.intel.com/design/chipsets/industry/25128901.pdf
+[1] https://www.renesas.com/en-sg/doc/products/mpumcu/001/rej09b0078_h8s2168.pdf?key=7c88837454702128622bee53acbda8f4
+[2] http://www.intel.com/content/dam/www/public/us/en/documents/product-briefs/ipmi-second-gen-interface-spec-v2-rev1-1.pdf
+[3] https://en.wikipedia.org/wiki/Super_I/O
+
+Required properties
+===================
+
+- compatible: One of:
+ "aspeed,ast2400-lpc", "simple-mfd"
+ "aspeed,ast2500-lpc", "simple-mfd"
+
+- reg: contains the physical address and length values of the Aspeed
+ LPC memory region.
+
+- #address-cells: <1>
+- #size-cells: <1>
+- ranges: Maps 0 to the physical address and length of the LPC memory
+ region
+
+Required LPC Child nodes
+========================
+
+BMC Node
+--------
+
+- compatible: One of:
+ "aspeed,ast2400-lpc-bmc"
+ "aspeed,ast2500-lpc-bmc"
+
+- reg: contains the physical address and length values of the
+ H8S/2168-compatible LPC controller memory region
+
+Host Node
+---------
+
+- compatible: One of:
+ "aspeed,ast2400-lpc-host", "simple-mfd", "syscon"
+ "aspeed,ast2500-lpc-host", "simple-mfd", "syscon"
+
+- reg: contains the address and length values of the host-related
+ register space for the Aspeed LPC controller
+
+- #address-cells: <1>
+- #size-cells: <1>
+- ranges: Maps 0 to the address and length of the host-related LPC memory
+ region
+
+Example:
+
+lpc: lpc at 1e789000 {
+ compatible = "aspeed,ast2500-lpc", "simple-mfd";
+ reg = <0x1e789000 0x1000>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1e789000 0x1000>;
+
+ lpc_bmc: lpc-bmc at 0 {
+ compatible = "aspeed,ast2500-lpc-bmc";
+ reg = <0x0 0x80>;
+ };
+
+ lpc_host: lpc-host at 80 {
+ compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
+ reg = <0x80 0x1e0>;
+ reg-io-width = <4>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x80 0x1e0>;
+ };
+};
+
--
2.9.3
^ permalink raw reply related
* [PATCH v3 4/6] mfd: dt: Add bindings for the Aspeed LPC Host Controller (LHC)
From: Andrew Jeffery @ 2016-12-06 2:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161206025321.1792-1-andrew@aj.id.au>
The LPC bus pinmux configuration on fifth generation Aspeed SoCs depends
on bits in both the System Control Unit and the LPC Host Controller.
The Aspeed LPC Host Controller is described as a child node of the
LPC host-range syscon device for arbitration of access by the host
controller and pinmux drivers.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
---
.../devicetree/bindings/mfd/aspeed-lpc.txt | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
index a97131aba446..9de318ef72da 100644
--- a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
+++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
@@ -109,3 +109,25 @@ lpc: lpc at 1e789000 {
};
};
+Host Node Children
+==================
+
+LPC Host Controller
+-------------------
+
+The Aspeed LPC Host Controller configures the Low Pin Count (LPC) bus behaviour
+between the host and the baseboard management controller. The registers exist
+in the "host" portion of the Aspeed LPC controller, which must be the parent of
+the LPC host controller node.
+
+Required properties:
+- compatible: "aspeed,ast2500-lhc";
+- reg: contains offset/length value of the LHC memory
+ region.
+
+Example:
+
+lhc: lhc at 20 {
+ compatible = "aspeed,ast2500-lhc";
+ reg = <0x20 0x24 0x48 0x8>;
+};
--
2.9.3
^ permalink raw reply related
* [PATCH v3 5/6] mfd: dt: Add bindings for the Aspeed SoC Display Controller (GFX)
From: Andrew Jeffery @ 2016-12-06 2:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161206025321.1792-1-andrew@aj.id.au>
The Aspeed SoC Display Controller is presented as a syscon device to
arbitrate access by display and pinmux drivers. Video pinmux
configuration on fifth generation SoCs depends on bits in both the
System Control Unit and the Display Controller.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/mfd/syscon/aspeed-gfx.txt | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mfd/syscon/aspeed-gfx.txt
diff --git a/Documentation/devicetree/bindings/mfd/syscon/aspeed-gfx.txt b/Documentation/devicetree/bindings/mfd/syscon/aspeed-gfx.txt
new file mode 100644
index 000000000000..aea5370efd97
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/syscon/aspeed-gfx.txt
@@ -0,0 +1,17 @@
+* Device tree bindings for Aspeed SoC Display Controller (GFX)
+
+The Aspeed SoC Display Controller primarily does as its name suggests, but also
+participates in pinmux requests on the g5 SoCs. It is therefore considered a
+syscon device.
+
+Required properties:
+- compatible: "aspeed,ast2500-gfx", "syscon"
+- reg: contains offset/length value of the GFX memory
+ region.
+
+Example:
+
+gfx: display at 1e6e6000 {
+ compatible = "aspeed,ast2500-gfx", "syscon";
+ reg = <0x1e6e6000 0x1000>;
+};
--
2.9.3
^ permalink raw reply related
* [PATCH v3 6/6] mfd: dt: Move syscon bindings to syscon subdirectory
From: Andrew Jeffery @ 2016-12-06 2:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161206025321.1792-1-andrew@aj.id.au>
The use of syscons is growing, lets collate them in their own part of
the bindings tree.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
---
Documentation/devicetree/bindings/mfd/{ => syscon}/aspeed-scu.txt | 0
Documentation/devicetree/bindings/mfd/{ => syscon}/atmel-gpbr.txt | 0
Documentation/devicetree/bindings/mfd/{ => syscon}/atmel-matrix.txt | 0
Documentation/devicetree/bindings/mfd/{ => syscon}/atmel-smc.txt | 0
Documentation/devicetree/bindings/mfd/{ => syscon}/qcom,tcsr.txt | 0
Documentation/devicetree/bindings/mfd/{ => syscon}/syscon.txt | 0
.../devicetree/bindings/mfd/{ => syscon}/ti-keystone-devctrl.txt | 0
7 files changed, 0 insertions(+), 0 deletions(-)
rename Documentation/devicetree/bindings/mfd/{ => syscon}/aspeed-scu.txt (100%)
rename Documentation/devicetree/bindings/mfd/{ => syscon}/atmel-gpbr.txt (100%)
rename Documentation/devicetree/bindings/mfd/{ => syscon}/atmel-matrix.txt (100%)
rename Documentation/devicetree/bindings/mfd/{ => syscon}/atmel-smc.txt (100%)
rename Documentation/devicetree/bindings/mfd/{ => syscon}/qcom,tcsr.txt (100%)
rename Documentation/devicetree/bindings/mfd/{ => syscon}/syscon.txt (100%)
rename Documentation/devicetree/bindings/mfd/{ => syscon}/ti-keystone-devctrl.txt (100%)
diff --git a/Documentation/devicetree/bindings/mfd/aspeed-scu.txt b/Documentation/devicetree/bindings/mfd/syscon/aspeed-scu.txt
similarity index 100%
rename from Documentation/devicetree/bindings/mfd/aspeed-scu.txt
rename to Documentation/devicetree/bindings/mfd/syscon/aspeed-scu.txt
diff --git a/Documentation/devicetree/bindings/mfd/atmel-gpbr.txt b/Documentation/devicetree/bindings/mfd/syscon/atmel-gpbr.txt
similarity index 100%
rename from Documentation/devicetree/bindings/mfd/atmel-gpbr.txt
rename to Documentation/devicetree/bindings/mfd/syscon/atmel-gpbr.txt
diff --git a/Documentation/devicetree/bindings/mfd/atmel-matrix.txt b/Documentation/devicetree/bindings/mfd/syscon/atmel-matrix.txt
similarity index 100%
rename from Documentation/devicetree/bindings/mfd/atmel-matrix.txt
rename to Documentation/devicetree/bindings/mfd/syscon/atmel-matrix.txt
diff --git a/Documentation/devicetree/bindings/mfd/atmel-smc.txt b/Documentation/devicetree/bindings/mfd/syscon/atmel-smc.txt
similarity index 100%
rename from Documentation/devicetree/bindings/mfd/atmel-smc.txt
rename to Documentation/devicetree/bindings/mfd/syscon/atmel-smc.txt
diff --git a/Documentation/devicetree/bindings/mfd/qcom,tcsr.txt b/Documentation/devicetree/bindings/mfd/syscon/qcom,tcsr.txt
similarity index 100%
rename from Documentation/devicetree/bindings/mfd/qcom,tcsr.txt
rename to Documentation/devicetree/bindings/mfd/syscon/qcom,tcsr.txt
diff --git a/Documentation/devicetree/bindings/mfd/syscon.txt b/Documentation/devicetree/bindings/mfd/syscon/syscon.txt
similarity index 100%
rename from Documentation/devicetree/bindings/mfd/syscon.txt
rename to Documentation/devicetree/bindings/mfd/syscon/syscon.txt
diff --git a/Documentation/devicetree/bindings/mfd/ti-keystone-devctrl.txt b/Documentation/devicetree/bindings/mfd/syscon/ti-keystone-devctrl.txt
similarity index 100%
rename from Documentation/devicetree/bindings/mfd/ti-keystone-devctrl.txt
rename to Documentation/devicetree/bindings/mfd/syscon/ti-keystone-devctrl.txt
--
2.9.3
^ permalink raw reply
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