* [PATCH v5 1/3] dt-bindings: i2c: qcom-cci: Document qcs8300 compatible
2025-11-14 6:45 [PATCH v5 0/3] Add CCI and imx577 sensor support for monaco evk Vikram Sharma
@ 2025-11-14 6:45 ` Vikram Sharma
2025-11-14 6:45 ` [PATCH v5 2/3] arm64: dts: qcom: qcs8300: Add CCI definitions Vikram Sharma
2025-11-14 6:45 ` [PATCH v5 3/3] arm64: dts: qcom: monaco-evk-camera: Add DT overlay Vikram Sharma
2 siblings, 0 replies; 8+ messages in thread
From: Vikram Sharma @ 2025-11-14 6:45 UTC (permalink / raw)
To: bryan.odonoghue, mchehab, robh, krzk+dt, conor+dt, andersson,
konradybcio, hverkuil-cisco, cros-qcom-dts-watchers,
catalin.marinas, will
Cc: linux-arm-kernel, quic_svankada, linux-media, linux-arm-msm,
devicetree, linux-kernel, quic_nihalkum, quic_vikramsa,
Vladimir Zapolskiy
From: Nihal Kumar Gupta <quic_nihalkum@quicinc.com>
The three instances of CCI found on the QCS8300 are functionally the same
as on a number of existing Qualcomm SoCs.
Introduce a new SoC-specific compatible string "qcom,qcs8300-cci" with a
common fallback.
Signed-off-by: Nihal Kumar Gupta <quic_nihalkum@quicinc.com>
Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
---
Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml
index 33852a5ffca8..f1919f59d521 100644
--- a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml
+++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml
@@ -28,6 +28,7 @@ properties:
- enum:
- qcom,kaanapali-cci
- qcom,qcm2290-cci
+ - qcom,qcs8300-cci
- qcom,sa8775p-cci
- qcom,sc7280-cci
- qcom,sc8280xp-cci
@@ -132,6 +133,7 @@ allOf:
enum:
- qcom,kaanapali-cci
- qcom,qcm2290-cci
+ - qcom,qcs8300-cci
then:
properties:
clocks:
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH v5 2/3] arm64: dts: qcom: qcs8300: Add CCI definitions
2025-11-14 6:45 [PATCH v5 0/3] Add CCI and imx577 sensor support for monaco evk Vikram Sharma
2025-11-14 6:45 ` [PATCH v5 1/3] dt-bindings: i2c: qcom-cci: Document qcs8300 compatible Vikram Sharma
@ 2025-11-14 6:45 ` Vikram Sharma
2025-11-14 22:16 ` Konrad Dybcio
2025-11-14 6:45 ` [PATCH v5 3/3] arm64: dts: qcom: monaco-evk-camera: Add DT overlay Vikram Sharma
2 siblings, 1 reply; 8+ messages in thread
From: Vikram Sharma @ 2025-11-14 6:45 UTC (permalink / raw)
To: bryan.odonoghue, mchehab, robh, krzk+dt, conor+dt, andersson,
konradybcio, hverkuil-cisco, cros-qcom-dts-watchers,
catalin.marinas, will
Cc: linux-arm-kernel, quic_svankada, linux-media, linux-arm-msm,
devicetree, linux-kernel, quic_nihalkum, quic_vikramsa,
Ravi Shankar, Vishal Verma, Vladimir Zapolskiy
From: Nihal Kumar Gupta <quic_nihalkum@quicinc.com>
Qualcomm QCS8300 SoC contains three Camera Control Interface (CCI).
Compared to Lemans, the key difference is in SDA/SCL GPIO assignments
and number of CCIs.
Signed-off-by: Nihal Kumar Gupta <quic_nihalkum@quicinc.com>
Co-developed-by: Ravi Shankar <quic_rshankar@quicinc.com>
Signed-off-by: Ravi Shankar <quic_rshankar@quicinc.com>
Co-developed-by: Vishal Verma <quic_vishverm@quicinc.com>
Signed-off-by: Vishal Verma <quic_vishverm@quicinc.com>
Co-developed-by: Suresh Vankadara <quic_svankada@quicinc.com>
Signed-off-by: Suresh Vankadara <quic_svankada@quicinc.com>
Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com>
Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
---
arch/arm64/boot/dts/qcom/monaco.dtsi | 303 +++++++++++++++++++++++++++
1 file changed, 303 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi
index 774255c3f6fc..92cddcbabd97 100644
--- a/arch/arm64/boot/dts/qcom/monaco.dtsi
+++ b/arch/arm64/boot/dts/qcom/monaco.dtsi
@@ -4776,6 +4776,117 @@ videocc: clock-controller@abf0000 {
#power-domain-cells = <1>;
};
+ cci0: cci@ac13000 {
+ compatible = "qcom,qcs8300-cci", "qcom,msm8996-cci";
+ reg = <0x0 0x0ac13000 0x0 0x1000>;
+
+ interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>;
+
+ clocks = <&camcc CAM_CC_CPAS_AHB_CLK>,
+ <&camcc CAM_CC_CCI_0_CLK>;
+ clock-names = "cpas_ahb",
+ "cci";
+
+ power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>;
+
+ pinctrl-0 = <&cci0_0_default &cci0_1_default>;
+ pinctrl-1 = <&cci0_0_sleep &cci0_1_sleep>;
+ pinctrl-names = "default", "sleep";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ status = "disabled";
+
+ cci0_i2c0: i2c-bus@0 {
+ reg = <0>;
+ clock-frequency = <1000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ cci0_i2c1: i2c-bus@1 {
+ reg = <1>;
+ clock-frequency = <1000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ cci1: cci@ac14000 {
+ compatible = "qcom,qcs8300-cci", "qcom,msm8996-cci";
+ reg = <0x0 0x0ac14000 0x0 0x1000>;
+
+ interrupts = <GIC_SPI 271 IRQ_TYPE_EDGE_RISING>;
+
+ power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>;
+
+ clocks = <&camcc CAM_CC_CPAS_AHB_CLK>,
+ <&camcc CAM_CC_CCI_1_CLK>;
+ clock-names = "cpas_ahb",
+ "cci";
+
+ pinctrl-0 = <&cci1_0_default &cci1_1_default>;
+ pinctrl-1 = <&cci1_0_sleep &cci1_1_sleep>;
+ pinctrl-names = "default", "sleep";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ status = "disabled";
+
+ cci1_i2c0: i2c-bus@0 {
+ reg = <0>;
+ clock-frequency = <1000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ cci1_i2c1: i2c-bus@1 {
+ reg = <1>;
+ clock-frequency = <1000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ cci2: cci@ac15000 {
+ compatible = "qcom,qcs8300-cci", "qcom,msm8996-cci";
+ reg = <0x0 0x0ac15000 0x0 0x1000>;
+
+ interrupts = <GIC_SPI 651 IRQ_TYPE_EDGE_RISING>;
+
+ clocks = <&camcc CAM_CC_CPAS_AHB_CLK>,
+ <&camcc CAM_CC_CCI_2_CLK>;
+ clock-names = "cpas_ahb",
+ "cci";
+
+ power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>;
+
+ pinctrl-0 = <&cci2_0_default &cci2_1_default>;
+ pinctrl-1 = <&cci2_0_sleep &cci2_1_sleep>;
+ pinctrl-names = "default", "sleep";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ status = "disabled";
+
+ cci2_i2c0: i2c-bus@0 {
+ reg = <0>;
+ clock-frequency = <1000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ cci2_i2c1: i2c-bus@1 {
+ reg = <1>;
+ clock-frequency = <1000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
camss: isp@ac78000 {
compatible = "qcom,qcs8300-camss";
@@ -5071,6 +5182,198 @@ tlmm: pinctrl@f100000 {
#interrupt-cells = <2>;
wakeup-parent = <&pdc>;
+ cci0_0_default: cci0-0-default-state {
+ sda-pins {
+ pins = "gpio57";
+ function = "cci_i2c_sda";
+ drive-strength = <2>;
+ bias-pull-up = <2200>;
+ };
+
+ scl-pins {
+ pins = "gpio58";
+ function = "cci_i2c_scl";
+ drive-strength = <2>;
+ bias-pull-up = <2200>;
+ };
+ };
+
+ cci0_0_sleep: cci0-0-sleep-state {
+ sda-pins {
+ pins = "gpio57";
+ function = "cci_i2c_sda";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+
+ scl-pins {
+ pins = "gpio58";
+ function = "cci_i2c_scl";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+ };
+
+ cci0_1_default: cci0-1-default-state {
+ sda-pins {
+ pins = "gpio29";
+ function = "cci_i2c_sda";
+ drive-strength = <2>;
+ bias-pull-up = <2200>;
+ };
+
+ scl-pins {
+ pins = "gpio30";
+ function = "cci_i2c_scl";
+ drive-strength = <2>;
+ bias-pull-up = <2200>;
+ };
+ };
+
+ cci0_1_sleep: cci0-1-sleep-state {
+ sda-pins {
+ pins = "gpio29";
+ function = "cci_i2c_sda";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+
+ scl-pins {
+ pins = "gpio30";
+ function = "cci_i2c_scl";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+ };
+
+ cci1_0_default: cci1-0-default-state {
+ sda-pins {
+ pins = "gpio59";
+ function = "cci_i2c_sda";
+ drive-strength = <2>;
+ bias-pull-up = <2200>;
+ };
+
+ scl-pins {
+ pins = "gpio60";
+ function = "cci_i2c_scl";
+ drive-strength = <2>;
+ bias-pull-up = <2200>;
+ };
+ };
+
+ cci1_0_sleep: cci1-0-sleep-state {
+ sda-pins {
+ pins = "gpio59";
+ function = "cci_i2c_sda";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+
+ scl-pins {
+ pins = "gpio60";
+ function = "cci_i2c_scl";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+ };
+
+ cci1_1_default: cci1-1-default-state {
+ sda-pins {
+ pins = "gpio31";
+ function = "cci_i2c_sda";
+ drive-strength = <2>;
+ bias-pull-up = <2200>;
+ };
+
+ scl-pins {
+ pins = "gpio32";
+ function = "cci_i2c_scl";
+ drive-strength = <2>;
+ bias-pull-up = <2200>;
+ };
+ };
+
+ cci1_1_sleep: cci1-1-sleep-state {
+ sda-pins {
+ pins = "gpio31";
+ function = "cci_i2c_sda";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+
+ scl-pins {
+ pins = "gpio32";
+ function = "cci_i2c_scl";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+ };
+
+ cci2_0_default: cci2-0-default-state {
+ sda-pins {
+ pins = "gpio61";
+ function = "cci_i2c_sda";
+ drive-strength = <2>;
+ bias-pull-up = <2200>;
+ };
+
+ scl-pins {
+ pins = "gpio62";
+ function = "cci_i2c_scl";
+ drive-strength = <2>;
+ bias-pull-up = <2200>;
+ };
+ };
+
+ cci2_0_sleep: cci2-0-sleep-state {
+ sda-pins {
+ pins = "gpio61";
+ function = "cci_i2c_sda";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+
+ scl-pins {
+ pins = "gpio62";
+ function = "cci_i2c_scl";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+ };
+
+ cci2_1_default: cci2-1-default-state {
+ sda-pins {
+ pins = "gpio54";
+ function = "cci_i2c_sda";
+ drive-strength = <2>;
+ bias-pull-up = <2200>;
+ };
+
+ scl-pins {
+ pins = "gpio55";
+ function = "cci_i2c_scl";
+ drive-strength = <2>;
+ bias-pull-up = <2200>;
+ };
+ };
+
+ cci2_1_sleep: cci2-1-sleep-state {
+ sda-pins {
+ pins = "gpio54";
+ function = "cci_i2c_sda";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+
+ scl-pins {
+ pins = "gpio55";
+ function = "cci_i2c_scl";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+ };
+
hs0_mi2s_active: hs0-mi2s-active-state {
pins = "gpio106", "gpio107", "gpio108", "gpio109";
function = "hs0_mi2s";
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH v5 2/3] arm64: dts: qcom: qcs8300: Add CCI definitions
2025-11-14 6:45 ` [PATCH v5 2/3] arm64: dts: qcom: qcs8300: Add CCI definitions Vikram Sharma
@ 2025-11-14 22:16 ` Konrad Dybcio
0 siblings, 0 replies; 8+ messages in thread
From: Konrad Dybcio @ 2025-11-14 22:16 UTC (permalink / raw)
To: Vikram Sharma, bryan.odonoghue, mchehab, robh, krzk+dt, conor+dt,
andersson, konradybcio, hverkuil-cisco, cros-qcom-dts-watchers,
catalin.marinas, will
Cc: linux-arm-kernel, quic_svankada, linux-media, linux-arm-msm,
devicetree, linux-kernel, quic_nihalkum, Ravi Shankar,
Vishal Verma, Vladimir Zapolskiy
On 11/14/25 7:45 AM, Vikram Sharma wrote:
> From: Nihal Kumar Gupta <quic_nihalkum@quicinc.com>
>
> Qualcomm QCS8300 SoC contains three Camera Control Interface (CCI).
> Compared to Lemans, the key difference is in SDA/SCL GPIO assignments
> and number of CCIs.
>
> Signed-off-by: Nihal Kumar Gupta <quic_nihalkum@quicinc.com>
> Co-developed-by: Ravi Shankar <quic_rshankar@quicinc.com>
> Signed-off-by: Ravi Shankar <quic_rshankar@quicinc.com>
> Co-developed-by: Vishal Verma <quic_vishverm@quicinc.com>
> Signed-off-by: Vishal Verma <quic_vishverm@quicinc.com>
> Co-developed-by: Suresh Vankadara <quic_svankada@quicinc.com>
> Signed-off-by: Suresh Vankadara <quic_svankada@quicinc.com>
> Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com>
> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v5 3/3] arm64: dts: qcom: monaco-evk-camera: Add DT overlay
2025-11-14 6:45 [PATCH v5 0/3] Add CCI and imx577 sensor support for monaco evk Vikram Sharma
2025-11-14 6:45 ` [PATCH v5 1/3] dt-bindings: i2c: qcom-cci: Document qcs8300 compatible Vikram Sharma
2025-11-14 6:45 ` [PATCH v5 2/3] arm64: dts: qcom: qcs8300: Add CCI definitions Vikram Sharma
@ 2025-11-14 6:45 ` Vikram Sharma
2025-11-14 22:19 ` Konrad Dybcio
2 siblings, 1 reply; 8+ messages in thread
From: Vikram Sharma @ 2025-11-14 6:45 UTC (permalink / raw)
To: bryan.odonoghue, mchehab, robh, krzk+dt, conor+dt, andersson,
konradybcio, hverkuil-cisco, cros-qcom-dts-watchers,
catalin.marinas, will
Cc: linux-arm-kernel, quic_svankada, linux-media, linux-arm-msm,
devicetree, linux-kernel, quic_nihalkum, quic_vikramsa,
Ravi Shankar, Vishal Verma, Vladimir Zapolskiy
From: Nihal Kumar Gupta <quic_nihalkum@quicinc.com>
Monaco EVK board does not include a camera sensor in its default hardware
configuration. Introducing a device tree overlay to support optional
integration of the IMX577 sensor via CSIPHY1.
Camera reset is handled through an I2C expander, and power is enabled
via TLMM GPIO74.
An example media-ctl pipeline for the imx577 is:
media-ctl --reset
media-ctl -V '"imx577 3-001a":0[fmt:SRGGB10/4056x3040 field:none]'
media-ctl -V '"msm_csiphy1":0[fmt:SRGGB10/4056x3040]'
media-ctl -V '"msm_csid0":0[fmt:SRGGB10/4056x3040]'
media-ctl -V '"msm_vfe0_rdi0":0[fmt:SRGGB10/4056x3040]'
media-ctl -l '"msm_csiphy1":1->"msm_csid0":0[1]'
media-ctl -l '"msm_csid0":1->"msm_vfe0_rdi0":0[1]'
yavta -B capture-mplane -c -I -n 5 -f SRGGB10P -s 4056x3040 -F /dev/video1
Signed-off-by: Nihal Kumar Gupta <quic_nihalkum@quicinc.com>
Co-developed-by: Ravi Shankar <quic_rshankar@quicinc.com>
Signed-off-by: Ravi Shankar <quic_rshankar@quicinc.com>
Co-developed-by: Vishal Verma <quic_vishverm@quicinc.com>
Signed-off-by: Vishal Verma <quic_vishverm@quicinc.com>
Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com>
Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
---
arch/arm64/boot/dts/qcom/Makefile | 4 +
.../dts/qcom/monaco-evk-camera-imx577.dtso | 105 ++++++++++++++++++
2 files changed, 109 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/monaco-evk-camera-imx577.dtso
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index 6f34d5ed331c..b1ba182a0d8d 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -38,6 +38,10 @@ lemans-evk-camera-dtbs := lemans-evk.dtb lemans-evk-camera.dtbo
dtb-$(CONFIG_ARCH_QCOM) += lemans-evk-camera-csi1-imx577.dtb
dtb-$(CONFIG_ARCH_QCOM) += lemans-evk-camera.dtb
dtb-$(CONFIG_ARCH_QCOM) += monaco-evk.dtb
+
+monaco-evk-camera-imx577-dtbs := monaco-evk.dtb monaco-evk-camera-imx577.dtbo
+dtb-$(CONFIG_ARCH_QCOM) += monaco-evk-camera-imx577.dtb
+
dtb-$(CONFIG_ARCH_QCOM) += msm8216-samsung-fortuna3g.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-acer-a1-724.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-alcatel-idol347.dtb
diff --git a/arch/arm64/boot/dts/qcom/monaco-evk-camera-imx577.dtso b/arch/arm64/boot/dts/qcom/monaco-evk-camera-imx577.dtso
new file mode 100644
index 000000000000..9bc8fdb9e743
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/monaco-evk-camera-imx577.dtso
@@ -0,0 +1,105 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/clock/qcom,sa8775p-camcc.h>
+#include <dt-bindings/gpio/gpio.h>
+
+&{/} {
+ vreg_cam1_2p8: vreg-cam1-2p8 {
+ compatible = "regulator-fixed";
+ regulator-name = "vreg_cam1_2p8";
+ startup-delay-us = <10000>;
+ enable-active-high;
+ gpio = <&tlmm 74 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&cam1_avdd_2v8_en_default>;
+ };
+};
+
+&camss {
+ vdda-phy-supply = <&vreg_l4a>;
+ vdda-pll-supply = <&vreg_l5a>;
+
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@1 {
+ reg = <1>;
+
+ csiphy1_ep: endpoint {
+ clock-lanes = <7>;
+ data-lanes = <0 1 2 3>;
+ remote-endpoint = <&imx577_ep1>;
+ };
+ };
+ };
+};
+
+&cci1 {
+ pinctrl-0 = <&cci1_0_default>;
+ pinctrl-1 = <&cci1_0_sleep>;
+
+ status = "okay";
+};
+
+&cci1_i2c0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ camera@1a {
+ compatible = "sony,imx577";
+ reg = <0x1a>;
+
+ reset-gpios = <&expander2 1 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&cam1_default>;
+ pinctrl-names = "default";
+
+ clocks = <&camcc CAM_CC_MCLK1_CLK>;
+ assigned-clocks = <&camcc CAM_CC_MCLK1_CLK>;
+ assigned-clock-rates = <24000000>;
+
+ avdd-supply = <&vreg_cam1_2p8>;
+
+ port {
+ imx577_ep1: endpoint {
+ link-frequencies = /bits/ 64 <600000000>;
+ data-lanes = <0 1 2 3>;
+ remote-endpoint = <&csiphy1_ep>;
+ };
+ };
+ };
+};
+
+&tlmm {
+ /*
+ * gpio67, gpio68, gpio69 provide MCLK0, MCLK1, MCLK2 for
+ * CAM0, CAM1 and CAM2 respectively via the "cam_mclk" function.
+ * So, here it's MCLK1 pin for instance.
+ */
+ cam1_default: cam1-default-state {
+ pins = "gpio68";
+ function = "cam_mclk";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ /*
+ * gpio73, gpio74, gpio75 enable AVDD regulators for
+ * CAM0, CAM1 and CAM2 respectively via the "gpio" function.
+ * So, here it's AVDD1 pin for instance.
+ */
+ cam1_avdd_2v8_en_default: cam1-avdd-2v8-en-state {
+ pins = "gpio74";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ };
+};
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH v5 3/3] arm64: dts: qcom: monaco-evk-camera: Add DT overlay
2025-11-14 6:45 ` [PATCH v5 3/3] arm64: dts: qcom: monaco-evk-camera: Add DT overlay Vikram Sharma
@ 2025-11-14 22:19 ` Konrad Dybcio
2025-11-15 5:53 ` Nihal Kumar Gupta
0 siblings, 1 reply; 8+ messages in thread
From: Konrad Dybcio @ 2025-11-14 22:19 UTC (permalink / raw)
To: Vikram Sharma, bryan.odonoghue, mchehab, robh, krzk+dt, conor+dt,
andersson, konradybcio, hverkuil-cisco, cros-qcom-dts-watchers,
catalin.marinas, will
Cc: linux-arm-kernel, quic_svankada, linux-media, linux-arm-msm,
devicetree, linux-kernel, quic_nihalkum, Ravi Shankar,
Vishal Verma, Vladimir Zapolskiy
On 11/14/25 7:45 AM, Vikram Sharma wrote:
> From: Nihal Kumar Gupta <quic_nihalkum@quicinc.com>
>
> Monaco EVK board does not include a camera sensor in its default hardware
> configuration. Introducing a device tree overlay to support optional
> integration of the IMX577 sensor via CSIPHY1.
>
> Camera reset is handled through an I2C expander, and power is enabled
> via TLMM GPIO74.
[...]
> +&{/} {
> + vreg_cam1_2p8: vreg-cam1-2p8 {
Where does this regulator lie physically? Is its presence dependent
on the connection of the sensor, is it part of the EVK carrier board,
or perhaps something else?
> + compatible = "regulator-fixed";
> + regulator-name = "vreg_cam1_2p8";
> + startup-delay-us = <10000>;
> + enable-active-high;
> + gpio = <&tlmm 74 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&cam1_avdd_2v8_en_default>;
property-n
property-names
please
[...]
> +&tlmm {
> + /*
> + * gpio67, gpio68, gpio69 provide MCLK0, MCLK1, MCLK2 for
> + * CAM0, CAM1 and CAM2 respectively via the "cam_mclk" function.
> + * So, here it's MCLK1 pin for instance.
> + */
I don't really see the value in these comments..
Vladimir requested you to move the 'description' (meaning the node
describing the hardware, not a comment explaining the function of the
DT hunk in natural language) to monaco.dtsi too
Konrad
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH v5 3/3] arm64: dts: qcom: monaco-evk-camera: Add DT overlay
2025-11-14 22:19 ` Konrad Dybcio
@ 2025-11-15 5:53 ` Nihal Kumar Gupta
2025-11-17 12:37 ` Konrad Dybcio
0 siblings, 1 reply; 8+ messages in thread
From: Nihal Kumar Gupta @ 2025-11-15 5:53 UTC (permalink / raw)
To: Konrad Dybcio, Vikram Sharma, bryan.odonoghue, mchehab, robh,
krzk+dt, conor+dt, andersson, konradybcio, hverkuil-cisco,
cros-qcom-dts-watchers, catalin.marinas, will
Cc: linux-arm-kernel, quic_svankada, linux-media, linux-arm-msm,
devicetree, linux-kernel, Ravi Shankar, Vishal Verma,
Vladimir Zapolskiy
On 15-11-2025 03:49, Konrad Dybcio wrote:
>> +&{/} {
>> + vreg_cam1_2p8: vreg-cam1-2p8 {
> Where does this regulator lie physically? Is its presence dependent
> on the connection of the sensor, is it part of the EVK carrier board,
> or perhaps something else?
vreg_cam1_2p8 is a fixed 2.8 V regulator located on the EVK carrier board.
It supplies the camera sensor’s AVDD rail and is enabled via GPIO 74, which is controlled by the TLMM block.
>
>> + compatible = "regulator-fixed";
>> + regulator-name = "vreg_cam1_2p8";
>> + startup-delay-us = <10000>;
>> + enable-active-high;
>> + gpio = <&tlmm 74 GPIO_ACTIVE_HIGH>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&cam1_avdd_2v8_en_default>;
> property-n
> property-names
>
> please
>
ACK
> [...]
>
>> +&tlmm {
>> + /*
>> + * gpio67, gpio68, gpio69 provide MCLK0, MCLK1, MCLK2 for
>> + * CAM0, CAM1 and CAM2 respectively via the "cam_mclk" function.
>> + * So, here it's MCLK1 pin for instance.
>> + */
> I don't really see the value in these comments..
>
> Vladimir requested you to move the 'description' (meaning the node
> describing the hardware, not a comment explaining the function of the
> DT hunk in natural language) to monaco.dtsi too
I’ve added descriptions to indicate which pins enable which camera MCLK/Regulators. If these aren’t considered useful, I can remove them.
Should I need to add hardware descriptions for all GPIOs (gpio67–69 for MCLK and gpio73–75 for regulator enable), even if they are unused?
I have referenced qcs6490-rb3gen2-vision-mezzanine.dtso for the MCLK pin hardware description (cam1_default).
All TLMM GPIOs mentioned above are muxed pins. As Bryan suggested in v4, these should go into the mezzanine-specific dtso. Do I need to extend this in monaco.dtsi as well?
--
Regards,
Nihal Kumar Gupta
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH v5 3/3] arm64: dts: qcom: monaco-evk-camera: Add DT overlay
2025-11-15 5:53 ` Nihal Kumar Gupta
@ 2025-11-17 12:37 ` Konrad Dybcio
0 siblings, 0 replies; 8+ messages in thread
From: Konrad Dybcio @ 2025-11-17 12:37 UTC (permalink / raw)
To: Nihal Kumar Gupta, Vikram Sharma, bryan.odonoghue, mchehab, robh,
krzk+dt, conor+dt, andersson, konradybcio, hverkuil-cisco,
cros-qcom-dts-watchers, catalin.marinas, will
Cc: linux-arm-kernel, quic_svankada, linux-media, linux-arm-msm,
devicetree, linux-kernel, Ravi Shankar, Vishal Verma,
Vladimir Zapolskiy
On 11/15/25 6:53 AM, Nihal Kumar Gupta wrote:
>
>
> On 15-11-2025 03:49, Konrad Dybcio wrote:
>>> +&{/} {
>>> + vreg_cam1_2p8: vreg-cam1-2p8 {
>> Where does this regulator lie physically? Is its presence dependent
>> on the connection of the sensor, is it part of the EVK carrier board,
>> or perhaps something else?
> vreg_cam1_2p8 is a fixed 2.8 V regulator located on the EVK carrier board.
> It supplies the camera sensor’s AVDD rail and is enabled via GPIO 74, which is controlled by the TLMM block.
Please keep this definition in the EVK board then. It would let one
reuse it for another consumer
>
>>
>>> + compatible = "regulator-fixed";
>>> + regulator-name = "vreg_cam1_2p8";
>>> + startup-delay-us = <10000>;
>>> + enable-active-high;
>>> + gpio = <&tlmm 74 GPIO_ACTIVE_HIGH>;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&cam1_avdd_2v8_en_default>;
>> property-n
>> property-names
>>
>> please
>>
> ACK
>
>> [...]
>>
>>> +&tlmm {
>>> + /*
>>> + * gpio67, gpio68, gpio69 provide MCLK0, MCLK1, MCLK2 for
>>> + * CAM0, CAM1 and CAM2 respectively via the "cam_mclk" function.
>>> + * So, here it's MCLK1 pin for instance.
>>> + */
>> I don't really see the value in these comments..
>>
>> Vladimir requested you to move the 'description' (meaning the node
>> describing the hardware, not a comment explaining the function of the
>> DT hunk in natural language) to monaco.dtsi too
> I’ve added descriptions to indicate which pins enable which camera MCLK/Regulators. If these aren’t considered useful, I can remove them.
Please do
> Should I need to add hardware descriptions for all GPIOs (gpio67–69 for MCLK and gpio73–75 for regulator enable), even if they are unused?
You're going to need them when you add support for other sensors, so I see
no reason why you'd not want to do it right away
> I have referenced qcs6490-rb3gen2-vision-mezzanine.dtso for the MCLK pin hardware description (cam1_default).
> All TLMM GPIOs mentioned above are muxed pins. As Bryan suggested in v4, these should go into the mezzanine-specific dtso. Do I need to extend this in monaco.dtsi as well?
These mux settings apply to any and all users of the mclk function, there
is nothing specific to this single mezzanine about it
Konrad
^ permalink raw reply [flat|nested] 8+ messages in thread