From: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
To: linux-aspeed@lists.ozlabs.org
Subject: [PATCH v3 07/14] ARM: dts: aspeed: yosemite4: Add gpio pca9506
Date: Mon, 11 Dec 2023 13:47:22 +0800 [thread overview]
Message-ID: <20231211054730.208588-8-Delphine_CC_Chiu@wiwynn.com> (raw)
In-Reply-To: <20231211054730.208588-1-Delphine_CC_Chiu@wiwynn.com>
Add gpio pca9506 I/O expander for yv4 use
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 251 ++++++++++++++++++
1 file changed, 251 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 7f0134fcee57..da413325ce30 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -175,6 +175,34 @@ mctp at 10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio at 20 {
+ compatible = "nxp,pca9506";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor at 40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -193,6 +221,34 @@ mctp at 10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio at 20 {
+ compatible = "nxp,pca9506";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor at 40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -211,6 +267,34 @@ mctp at 10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio at 20 {
+ compatible = "nxp,pca9506";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor at 40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -229,6 +313,34 @@ mctp at 10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio at 20 {
+ compatible = "nxp,pca9506";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor at 40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -247,6 +359,34 @@ mctp at 10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio at 20 {
+ compatible = "nxp,pca9506";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor at 40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -265,6 +405,34 @@ mctp at 10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio at 20 {
+ compatible = "nxp,pca9506";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor at 40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -283,6 +451,34 @@ mctp at 10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio at 20 {
+ compatible = "nxp,pca9506";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor at 40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -301,6 +497,34 @@ mctp at 10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio at 20 {
+ compatible = "nxp,pca9506";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor at 40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -683,6 +907,33 @@ rtc at 6f {
&i2c13 {
status = "okay";
bus-frequency = <400000>;
+ gpio at 20 {
+ compatible = "nxp,pca9506";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
};
&i2c14 {
--
2.25.1
next prev parent reply other threads:[~2023-12-11 5:47 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-11 5:47 [PATCH v3 00/14] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
2023-12-11 5:47 ` [PATCH v3 01/14] ARM: dts: aspeed: yosemite4: Revise i2c-mux devices Delphine CC Chiu
2023-12-11 5:47 ` [PATCH v3 02/14] ARM: dts: aspeed: yosemite4: Enable adc15 Delphine CC Chiu
2023-12-11 5:47 ` [PATCH v3 03/14] ARM: dts: aspeed: yosemite4: Enable spi-gpio setting Delphine CC Chiu
2023-12-11 5:47 ` [PATCH v3 04/14] ARM: dts: aspeed: yosemite4: Enable watchdog2 Delphine CC Chiu
2023-12-11 5:47 ` [PATCH v3 05/14] ARM: dts: aspeed: yosemite4: Revise quad mode to dual mode Delphine CC Chiu
2023-12-11 5:47 ` [PATCH v3 06/14] ARM: dts: aspeed: yosemite4: Revise power sensor adm1281 for schematic change Delphine CC Chiu
2023-12-11 5:47 ` Delphine CC Chiu [this message]
2023-12-11 5:47 ` [PATCH v3 08/14] ARM: dts: aspeed: yosemite4: Revise i2c11 and i2c12 " Delphine CC Chiu
2023-12-13 7:20 ` Krzysztof Kozlowski
2023-12-11 5:47 ` [PATCH v3 09/14] ARM: dts: aspeed: yosemite4: Revise i2c14 and i2c15 " Delphine CC Chiu
2023-12-11 5:47 ` [PATCH v3 10/14] ARM: dts: aspeed: yosemite4: Initialize bmc gpio state Delphine CC Chiu
2023-12-11 5:47 ` [PATCH v3 11/14] ARM: dts: aspeed: yosemite4: Revise mx31790 fan tach config Delphine CC Chiu
2023-12-11 5:47 ` [PATCH v3 12/14] ARM: dts: aspeed: yosemite4: add mctp config for NIC Delphine CC Chiu
2023-12-11 5:47 ` [PATCH v3 13/14] ARM: dts: aspeed: yosemite4: support mux to cpld Delphine CC Chiu
2023-12-11 5:47 ` [PATCH v3 14/14] ARM: dts: aspeed: yosemite4: Revise gpio name Delphine CC Chiu
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