Linux clock framework development
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From: JeeHeng Sia <jeeheng.sia@starfivetech.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	"kernel@esmil.dk" <kernel@esmil.dk>,
	"conor@kernel.org" <conor@kernel.org>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"krzysztof.kozlowski+dt@linaro.org"
	<krzysztof.kozlowski+dt@linaro.org>,
	"paul.walmsley@sifive.com" <paul.walmsley@sifive.com>,
	"palmer@dabbelt.com" <palmer@dabbelt.com>,
	"aou@eecs.berkeley.edu" <aou@eecs.berkeley.edu>,
	"mturquette@baylibre.com" <mturquette@baylibre.com>,
	"sboyd@kernel.org" <sboyd@kernel.org>,
	"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
	"emil.renner.berthing@canonical.com"
	<emil.renner.berthing@canonical.com>,
	Hal Feng <hal.feng@starfivetech.com>,
	Xingyu Wu <xingyu.wu@starfivetech.com>
Cc: "linux-riscv@lists.infradead.org"
	<linux-riscv@lists.infradead.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
	Leyfoon Tan <leyfoon.tan@starfivetech.com>
Subject: RE: [PATCH v1 05/16] dt-bindings: clock: Add StarFive JH8100 System clock and reset generator
Date: Tue, 12 Dec 2023 02:47:23 +0000	[thread overview]
Message-ID: <090f2d44fc8b4113b5b5e002d15b0675@EXMBX066.cuchost.com> (raw)
In-Reply-To: <1ebb4733-0f1d-46ea-b399-34af7df088ac@linaro.org>



> -----Original Message-----
> From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Sent: Saturday, December 9, 2023 1:53 AM
> To: JeeHeng Sia <jeeheng.sia@starfivetech.com>; kernel@esmil.dk; conor@kernel.org; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; paul.walmsley@sifive.com; palmer@dabbelt.com; aou@eecs.berkeley.edu;
> mturquette@baylibre.com; sboyd@kernel.org; p.zabel@pengutronix.de; emil.renner.berthing@canonical.com; Hal Feng
> <hal.feng@starfivetech.com>; Xingyu Wu <xingyu.wu@starfivetech.com>
> Cc: linux-riscv@lists.infradead.org; devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-clk@vger.kernel.org; Leyfoon Tan
> <leyfoon.tan@starfivetech.com>
> Subject: Re: [PATCH v1 05/16] dt-bindings: clock: Add StarFive JH8100 System clock and reset generator
> 
> On 06/12/2023 12:49, Sia Jee Heng wrote:
> > Add bindings for the System clocks and reset generator
> > (SYSCRG) on JH8100 SoC.
> >
> > Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
> > Reviewed-by: Ley Foon Tan <leyfoon.tan@starfivetech.com>
> > ---
> 
> ...
> 
> > +  clocks:
> > +    items:
> > +      - description: Main Oscillator (24 MHz)
> > +      - description: External I2S Rx BCLK clock
> > +      - description: External I2S Rx LRCK clock
> > +      - description: External MCLK clock
> > +
> > +  clock-names:
> > +    items:
> > +      - const: clk_osc
> > +      - const: clk_i2srx_bclk_ext
> > +      - const: clk_i2srx_lrck_ext
> > +      - const: clk_mclk_ext
> 
> Drop clk_ prefixes everywhere.
Noted.
> 
> > +
> > +  '#clock-cells':
> > +    const: 1
> > +    description:
> > +      See <dt-bindings/clock/starfive,jh8100-crg.h> for valid indices.
> > +
> > +  '#reset-cells':
> > +    const: 1
> > +    description:
> > +      See <dt-bindings/reset/starfive-jh8100-crg.h> for valid indices.
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - clocks
> > +  - clock-names
> > +  - '#clock-cells'
> > +  - '#reset-cells'
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    #include <dt-bindings/clock/starfive,jh8100-crg.h>
> > +
> > +    clock-controller@126d0000 {
> > +            compatible = "starfive,jh8100-syscrg";
> 
> Use 4 spaces for example indentation.
Noted
> 
> > +            reg = <0x126d0000 0x10000>;
> > +            clocks = <&clk_osc>, <&clk_i2srx_bclk_ext>,
> > +                     <&clk_i2srx_lrck_ext>, <&clk_mclk_ext>;
> > +            clock-names = "clk_osc", "clk_i2srx_bclk_ext",
> > +                          "clk_i2srx_lrck_ext", "clk_mclk_ext";
> > +            #clock-cells = <1>;
> > +            #reset-cells = <1>;
> > +    };
> > diff --git a/include/dt-bindings/clock/starfive,jh8100-crg.h b/include/dt-bindings/clock/starfive,jh8100-crg.h
> > new file mode 100644
> > index 000000000000..e5bb588ce798
> > --- /dev/null
> > +++ b/include/dt-bindings/clock/starfive,jh8100-crg.h
> > @@ -0,0 +1,123 @@
> > +/* SPDX-License-Identifier: GPL-2.0 OR MIT */
> 
> How about keeping the same license as binding?
Shouldn't b a problem.
> 
> > +/*
> > + * Copyright (C) 2023 StarFive Technology Co., Ltd.
> > + * Sia Jee Heng <jeeheng.sia@starfivetech.com>
> > + *
> > + */
> > +
> 
> ...
> 
> > +#define SYSCRG_CLK_NNE_ICG_EN						108
> > +
> > +#define SYSCRG_CLK_END							109
> 
> Drop from binding header.
Do you mean don’t define the number of clk in the header? I'll have to define
It in the driver then..
> 
> > +#endif /* __DT_BINDINGS_CLOCK_STARFIVE_JH8100_H__ */
> 
> ...
> 
> > + */
> > +#define SYSCRG_RSTN_SYS_SYSCON					0
> > +#define SYSCRG_RSTN_CLK_MOD					1
> > +#define SYSCRG_RSTN_GPU						2
> > +#define SYSCRG_RSTN_GPU_SPU					3
> > +#define SYSCRG_RSTN_GPU_TVSENSOR				4
> > +#define SYSCRG_RSTN_PPU_OP_NORET_GPU_RESET			5
> > +#define SYSCRG_RSTN_NNE						6
> > +#define SYSCRG_RSTN_HD_AUDIO					7
> > +
> > +#define SYSCRG_RESET_NR_RESETS					8
> 
> Drop from binding header.
Do you mean don’t define the number of reset in the header? I'll have to define
It in the driver then..
> 
> > +
> > +#endif /* __DT_BINDINGS_RESET_STARFIVE_JH8100_H__ */
> 
> Best regards,
> Krzysztof


  reply	other threads:[~2023-12-12  2:47 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-06 11:49 [PATCH v1 00/16] Basic clock and reset support for StarFive JH8100 RISC-V SoC Sia Jee Heng
2023-12-06 11:49 ` [PATCH v1 01/16] reset: starfive: Rename file name "jh71x0" to "common" Sia Jee Heng
2023-12-08 13:12   ` Emil Renner Berthing
2023-12-06 11:49 ` [PATCH v1 02/16] reset: starfive: Convert the word "jh71x0" to "starfive" Sia Jee Heng
2023-12-08 13:15   ` Emil Renner Berthing
2023-12-06 11:49 ` [PATCH v1 03/16] clk: starfive: Rename file name "jh71x0" to "common" Sia Jee Heng
2023-12-08 13:16   ` Emil Renner Berthing
2023-12-06 11:49 ` [PATCH v1 04/16] clk: starfive: Convert the word "jh71x0" to "starfive" Sia Jee Heng
2023-12-08 13:24   ` Emil Renner Berthing
2023-12-06 11:49 ` [PATCH v1 05/16] dt-bindings: clock: Add StarFive JH8100 System clock and reset generator Sia Jee Heng
2023-12-08 17:52   ` Krzysztof Kozlowski
2023-12-12  2:47     ` JeeHeng Sia [this message]
2023-12-12  8:43       ` Krzysztof Kozlowski
2023-12-12 10:04         ` JeeHeng Sia
2023-12-06 11:49 ` [PATCH v1 06/16] clk: starfive: Add JH8100 System clock generator driver Sia Jee Heng
2023-12-08 16:25   ` Emil Renner Berthing
2023-12-12  0:46     ` JeeHeng Sia
2023-12-13 11:56       ` Emil Renner Berthing
2023-12-19  3:02         ` JeeHeng Sia
2023-12-19 17:39           ` Emil Renner Berthing
2023-12-20  1:35             ` JeeHeng Sia
2023-12-20  1:39         ` JeeHeng Sia
2023-12-20 13:07           ` Emil Renner Berthing
2023-12-21  0:45             ` JeeHeng Sia
2023-12-13  4:20     ` JeeHeng Sia
2023-12-13 12:05       ` Emil Renner Berthing
2023-12-20  1:34         ` JeeHeng Sia
2023-12-06 11:49 ` [PATCH v1 07/16] dt-bindings: clock: Add StarFive JH8100 System-North-West clock and reset generator Sia Jee Heng
2023-12-08 16:37   ` Emil Renner Berthing
2023-12-12  1:01     ` JeeHeng Sia
2023-12-13 12:00       ` Emil Renner Berthing
2023-12-08 17:53   ` Krzysztof Kozlowski
2023-12-12  2:48     ` JeeHeng Sia
2023-12-06 11:49 ` [PATCH v1 08/16] clk: starfive: Add JH8100 System-North-West clock generator driver Sia Jee Heng
2023-12-06 11:49 ` [PATCH v1 09/16] dt-bindings: clock: Add StarFive JH8100 System-North-East clock and reset generator Sia Jee Heng
2023-12-08 17:54   ` Krzysztof Kozlowski
2023-12-12  2:49     ` JeeHeng Sia
2023-12-06 11:49 ` [PATCH v1 10/16] clk: starfive: Add JH8100 System-North-East clock generator driver Sia Jee Heng
2023-12-06 11:49 ` [PATCH v1 11/16] dt-bindings: clock: Add StarFive JH8100 System-South-West clock and reset generator Sia Jee Heng
2023-12-08 17:54   ` Krzysztof Kozlowski
2023-12-12  2:49     ` JeeHeng Sia
2023-12-06 11:49 ` [PATCH v1 12/16] clk: starfive: Add JH8100 System-South-West clock generator driver Sia Jee Heng
2023-12-06 11:49 ` [PATCH v1 13/16] dt-bindings: clock: Add StarFive JH8100 Always-On clock and reset generator Sia Jee Heng
2023-12-08 17:55   ` Krzysztof Kozlowski
2023-12-12  2:49     ` JeeHeng Sia
2023-12-06 11:49 ` [PATCH v1 14/16] clk: starfive: Add JH8100 Always-On clock generator driver Sia Jee Heng
2023-12-06 11:49 ` [PATCH v1 15/16] reset: starfive: Add StarFive JH8100 reset driver Sia Jee Heng
2023-12-06 11:50 ` [PATCH v1 16/16] riscv: dts: starfive: jh8100: Add clocks and resets nodes Sia Jee Heng
2023-12-08 16:39   ` Emil Renner Berthing
2023-12-08 17:57     ` Krzysztof Kozlowski
2023-12-12  2:51       ` JeeHeng Sia
2023-12-12  1:07     ` JeeHeng Sia
2023-12-08 17:57   ` Krzysztof Kozlowski
2023-12-12  2:58     ` JeeHeng Sia
2023-12-12  8:43       ` Krzysztof Kozlowski
2023-12-12 10:03         ` JeeHeng Sia
2023-12-08 16:52 ` [PATCH v1 00/16] Basic clock and reset support for StarFive JH8100 RISC-V SoC Emil Renner Berthing
2023-12-12  1:09   ` JeeHeng Sia

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