Linux clock framework development
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From: JeeHeng Sia <jeeheng.sia@starfivetech.com>
To: Emil Renner Berthing <emil.renner.berthing@canonical.com>,
	"kernel@esmil.dk" <kernel@esmil.dk>,
	"conor@kernel.org" <conor@kernel.org>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"krzysztof.kozlowski+dt@linaro.org"
	<krzysztof.kozlowski+dt@linaro.org>,
	"paul.walmsley@sifive.com" <paul.walmsley@sifive.com>,
	"palmer@dabbelt.com" <palmer@dabbelt.com>,
	"aou@eecs.berkeley.edu" <aou@eecs.berkeley.edu>,
	"mturquette@baylibre.com" <mturquette@baylibre.com>,
	"sboyd@kernel.org" <sboyd@kernel.org>,
	"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
	"Hal Feng" <hal.feng@starfivetech.com>,
	Xingyu Wu <xingyu.wu@starfivetech.com>
Cc: "linux-riscv@lists.infradead.org"
	<linux-riscv@lists.infradead.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
	Leyfoon Tan <leyfoon.tan@starfivetech.com>
Subject: RE: [PATCH v1 00/16] Basic clock and reset support for StarFive JH8100 RISC-V SoC
Date: Tue, 12 Dec 2023 01:09:38 +0000	[thread overview]
Message-ID: <f1e151e14e0b4bcca1c9119f5d7e7559@EXMBX066.cuchost.com> (raw)
In-Reply-To: <CAJM55Z_nnrFcU6N8ZELUoGLe6Dp358aXH7VGf1i+USbZOsbpnQ@mail.gmail.com>



> -----Original Message-----
> From: Emil Renner Berthing <emil.renner.berthing@canonical.com>
> Sent: Saturday, December 9, 2023 12:53 AM
> To: JeeHeng Sia <jeeheng.sia@starfivetech.com>; kernel@esmil.dk; conor@kernel.org; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; paul.walmsley@sifive.com; palmer@dabbelt.com; aou@eecs.berkeley.edu;
> mturquette@baylibre.com; sboyd@kernel.org; p.zabel@pengutronix.de; emil.renner.berthing@canonical.com; Hal Feng
> <hal.feng@starfivetech.com>; Xingyu Wu <xingyu.wu@starfivetech.com>
> Cc: linux-riscv@lists.infradead.org; devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-clk@vger.kernel.org; Leyfoon Tan
> <leyfoon.tan@starfivetech.com>
> Subject: Re: [PATCH v1 00/16] Basic clock and reset support for StarFive JH8100 RISC-V SoC
> 
> Sia Jee Heng wrote:
> > This patch series enabled basic clock & reset support for StarFive
> > JH8100 SoC.
> >
> > This patch series depends on the Initial device tree support for
> > StarFive JH8100 SoC patch series which can be found at below link:
> > https://lore.kernel.org/lkml/20231201121410.95298-1-jeeheng.sia@starfivetech.com/
> >
> > StarFive JH8100 shares a similar clock and reset design with JH7110.
> > To facilitate the reuse of the file and its functionalities, files
> > containing the 'jh71x0' naming convention are renamed to use the
> > 'common' wording. Internal functions that contain the 'jh71x0'
> > naming convention are renamed to use 'starfive.' This is accomplished
> > through patches 1, 2, 3, and 4.
> 
> I'm a little sceptical all this renaming is worth it, but if think it's likely
> that future starfive SoCs can use the same clock drivers I'm ok with it. Just
> know that you'll look a bit silly if your "JH9100" can't use these drivers and
> you'll already need different starfive and starfive-gen2 drivers.
Thank you for your understanding.
> 
> /Emil
> >
> >
> > Patch 5 adds documentation to describe System (SYSCRG) Clock & Reset
> > binding.
> > Patch 6 adds SYSCRG clock driver.
> >
> > patch 7 adds documentation to describe System-North-West (SYSCRG-NW)
> > Clock & Reset binding.
> > Patch 8 adds SYSCRG-NW clock driver.
> >
> > patch 9 adds documentation to describe System-North-East (SYSCRG-NE)
> > Clock & Reset binding.
> > Patch 10 adds SYSCRG-NE clock driver.
> >
> > patch 11 adds documentation to describe System-South-West (SYSCRG-SW)
> > Clock & Reset binding.
> > Patch 12 adds SYSCRG-SW clock driver.
> >
> > patch 13 adds documentation to describe Always-On (AON)
> > Clock & Reset binding.
> > Patch 14 adds AON clock driver.
> >
> > Patch 15 adds support for the auxiliary reset driver.
> >
> > Patch 16 adds clocks and reset nodes to the JH8100 device tree.
> >
> > Sia Jee Heng (16):
> >   reset: starfive: Rename file name "jh71x0" to "common"
> >   reset: starfive: Convert the word "jh71x0" to "starfive"
> >   clk: starfive: Rename file name "jh71x0" to "common"
> >   clk: starfive: Convert the word "jh71x0" to "starfive"
> >   dt-bindings: clock: Add StarFive JH8100 System clock and reset
> >     generator
> >   clk: starfive: Add JH8100 System clock generator driver
> >   dt-bindings: clock: Add StarFive JH8100 System-North-West clock and
> >     reset generator
> >   clk: starfive: Add JH8100 System-North-West clock generator driver
> >   dt-bindings: clock: Add StarFive JH8100 System-North-East clock and
> >     reset generator
> >   clk: starfive: Add JH8100 System-North-East clock generator driver
> >   dt-bindings: clock: Add StarFive JH8100 System-South-West clock and
> >     reset generator
> >   clk: starfive: Add JH8100 System-South-West clock generator driver
> >   dt-bindings: clock: Add StarFive JH8100 Always-On clock and reset
> >     generator
> >   clk: starfive: Add JH8100 Always-On clock generator driver
> >   reset: starfive: Add StarFive JH8100 reset driver
> >   riscv: dts: starfive: jh8100: Add clocks and resets nodes
> >
> >  .../clock/starfive,jh8100-aoncrg.yaml         |  77 +++
> >  .../clock/starfive,jh8100-syscrg-ne.yaml      | 158 +++++
> >  .../clock/starfive,jh8100-syscrg-nw.yaml      | 119 ++++
> >  .../clock/starfive,jh8100-syscrg-sw.yaml      |  66 ++
> >  .../clock/starfive,jh8100-syscrg.yaml         |  66 ++
> >  MAINTAINERS                                   |  15 +
> >  arch/riscv/boot/dts/starfive/jh8100-clk.dtsi  | 180 ++++++
> >  arch/riscv/boot/dts/starfive/jh8100.dtsi      | 115 ++++
> >  drivers/clk/starfive/Kconfig                  |  49 +-
> >  drivers/clk/starfive/Makefile                 |   3 +-
> >  drivers/clk/starfive/clk-starfive-common.c    | 327 ++++++++++
> >  drivers/clk/starfive/clk-starfive-common.h    | 130 ++++
> >  .../clk/starfive/clk-starfive-jh7100-audio.c  | 127 ++--
> >  drivers/clk/starfive/clk-starfive-jh7100.c    | 503 ++++++++--------
> >  .../clk/starfive/clk-starfive-jh7110-aon.c    |  62 +-
> >  .../clk/starfive/clk-starfive-jh7110-isp.c    |  72 +--
> >  .../clk/starfive/clk-starfive-jh7110-stg.c    |  94 +--
> >  .../clk/starfive/clk-starfive-jh7110-sys.c    | 523 ++++++++--------
> >  .../clk/starfive/clk-starfive-jh7110-vout.c   |  74 +--
> >  drivers/clk/starfive/clk-starfive-jh7110.h    |   4 +-
> >  drivers/clk/starfive/clk-starfive-jh71x0.c    | 327 ----------
> >  drivers/clk/starfive/clk-starfive-jh71x0.h    | 123 ----
> >  drivers/clk/starfive/jh8100/Makefile          |   7 +
> >  drivers/clk/starfive/jh8100/clk-aon.c         | 275 +++++++++
> >  .../clk/starfive/jh8100/clk-starfive-jh8100.h |  11 +
> >  drivers/clk/starfive/jh8100/clk-sys-ne.c      | 566 ++++++++++++++++++
> >  drivers/clk/starfive/jh8100/clk-sys-nw.c      | 268 +++++++++
> >  drivers/clk/starfive/jh8100/clk-sys-sw.c      | 136 +++++
> >  drivers/clk/starfive/jh8100/clk-sys.c         | 455 ++++++++++++++
> >  drivers/reset/starfive/Kconfig                |  14 +-
> >  drivers/reset/starfive/Makefile               |   4 +-
> >  ...rfive-jh71x0.c => reset-starfive-common.c} |  68 +--
> >  .../reset/starfive/reset-starfive-common.h    |  14 +
> >  .../reset/starfive/reset-starfive-jh7100.c    |   4 +-
> >  .../reset/starfive/reset-starfive-jh7110.c    |   8 +-
> >  .../reset/starfive/reset-starfive-jh71x0.h    |  14 -
> >  .../reset/starfive/reset-starfive-jh8100.c    | 102 ++++
> >  .../dt-bindings/clock/starfive,jh8100-crg.h   | 430 +++++++++++++
> >  .../dt-bindings/reset/starfive,jh8100-crg.h   | 127 ++++
> >  ...rfive-jh71x0.h => reset-starfive-common.h} |  10 +-
> >  40 files changed, 4485 insertions(+), 1242 deletions(-)
> >  create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh8100-aoncrg.yaml
> >  create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh8100-syscrg-ne.yaml
> >  create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh8100-syscrg-nw.yaml
> >  create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh8100-syscrg-sw.yaml
> >  create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh8100-syscrg.yaml
> >  create mode 100644 arch/riscv/boot/dts/starfive/jh8100-clk.dtsi
> >  create mode 100644 drivers/clk/starfive/clk-starfive-common.c
> >  create mode 100644 drivers/clk/starfive/clk-starfive-common.h
> >  delete mode 100644 drivers/clk/starfive/clk-starfive-jh71x0.c
> >  delete mode 100644 drivers/clk/starfive/clk-starfive-jh71x0.h
> >  create mode 100644 drivers/clk/starfive/jh8100/Makefile
> >  create mode 100644 drivers/clk/starfive/jh8100/clk-aon.c
> >  create mode 100644 drivers/clk/starfive/jh8100/clk-starfive-jh8100.h
> >  create mode 100644 drivers/clk/starfive/jh8100/clk-sys-ne.c
> >  create mode 100644 drivers/clk/starfive/jh8100/clk-sys-nw.c
> >  create mode 100644 drivers/clk/starfive/jh8100/clk-sys-sw.c
> >  create mode 100644 drivers/clk/starfive/jh8100/clk-sys.c
> >  rename drivers/reset/starfive/{reset-starfive-jh71x0.c => reset-starfive-common.c} (55%)
> >  create mode 100644 drivers/reset/starfive/reset-starfive-common.h
> >  delete mode 100644 drivers/reset/starfive/reset-starfive-jh71x0.h
> >  create mode 100644 drivers/reset/starfive/reset-starfive-jh8100.c
> >  create mode 100644 include/dt-bindings/clock/starfive,jh8100-crg.h
> >  create mode 100644 include/dt-bindings/reset/starfive,jh8100-crg.h
> >  rename include/soc/starfive/{reset-starfive-jh71x0.h => reset-starfive-common.h} (50%)
> >
> > --
> > 2.34.1
> >

      reply	other threads:[~2023-12-12  1:09 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-06 11:49 [PATCH v1 00/16] Basic clock and reset support for StarFive JH8100 RISC-V SoC Sia Jee Heng
2023-12-06 11:49 ` [PATCH v1 01/16] reset: starfive: Rename file name "jh71x0" to "common" Sia Jee Heng
2023-12-08 13:12   ` Emil Renner Berthing
2023-12-06 11:49 ` [PATCH v1 02/16] reset: starfive: Convert the word "jh71x0" to "starfive" Sia Jee Heng
2023-12-08 13:15   ` Emil Renner Berthing
2023-12-06 11:49 ` [PATCH v1 03/16] clk: starfive: Rename file name "jh71x0" to "common" Sia Jee Heng
2023-12-08 13:16   ` Emil Renner Berthing
2023-12-06 11:49 ` [PATCH v1 04/16] clk: starfive: Convert the word "jh71x0" to "starfive" Sia Jee Heng
2023-12-08 13:24   ` Emil Renner Berthing
2023-12-06 11:49 ` [PATCH v1 05/16] dt-bindings: clock: Add StarFive JH8100 System clock and reset generator Sia Jee Heng
2023-12-08 17:52   ` Krzysztof Kozlowski
2023-12-12  2:47     ` JeeHeng Sia
2023-12-12  8:43       ` Krzysztof Kozlowski
2023-12-12 10:04         ` JeeHeng Sia
2023-12-06 11:49 ` [PATCH v1 06/16] clk: starfive: Add JH8100 System clock generator driver Sia Jee Heng
2023-12-08 16:25   ` Emil Renner Berthing
2023-12-12  0:46     ` JeeHeng Sia
2023-12-13 11:56       ` Emil Renner Berthing
2023-12-19  3:02         ` JeeHeng Sia
2023-12-19 17:39           ` Emil Renner Berthing
2023-12-20  1:35             ` JeeHeng Sia
2023-12-20  1:39         ` JeeHeng Sia
2023-12-20 13:07           ` Emil Renner Berthing
2023-12-21  0:45             ` JeeHeng Sia
2023-12-13  4:20     ` JeeHeng Sia
2023-12-13 12:05       ` Emil Renner Berthing
2023-12-20  1:34         ` JeeHeng Sia
2023-12-06 11:49 ` [PATCH v1 07/16] dt-bindings: clock: Add StarFive JH8100 System-North-West clock and reset generator Sia Jee Heng
2023-12-08 16:37   ` Emil Renner Berthing
2023-12-12  1:01     ` JeeHeng Sia
2023-12-13 12:00       ` Emil Renner Berthing
2023-12-08 17:53   ` Krzysztof Kozlowski
2023-12-12  2:48     ` JeeHeng Sia
2023-12-06 11:49 ` [PATCH v1 08/16] clk: starfive: Add JH8100 System-North-West clock generator driver Sia Jee Heng
2023-12-06 11:49 ` [PATCH v1 09/16] dt-bindings: clock: Add StarFive JH8100 System-North-East clock and reset generator Sia Jee Heng
2023-12-08 17:54   ` Krzysztof Kozlowski
2023-12-12  2:49     ` JeeHeng Sia
2023-12-06 11:49 ` [PATCH v1 10/16] clk: starfive: Add JH8100 System-North-East clock generator driver Sia Jee Heng
2023-12-06 11:49 ` [PATCH v1 11/16] dt-bindings: clock: Add StarFive JH8100 System-South-West clock and reset generator Sia Jee Heng
2023-12-08 17:54   ` Krzysztof Kozlowski
2023-12-12  2:49     ` JeeHeng Sia
2023-12-06 11:49 ` [PATCH v1 12/16] clk: starfive: Add JH8100 System-South-West clock generator driver Sia Jee Heng
2023-12-06 11:49 ` [PATCH v1 13/16] dt-bindings: clock: Add StarFive JH8100 Always-On clock and reset generator Sia Jee Heng
2023-12-08 17:55   ` Krzysztof Kozlowski
2023-12-12  2:49     ` JeeHeng Sia
2023-12-06 11:49 ` [PATCH v1 14/16] clk: starfive: Add JH8100 Always-On clock generator driver Sia Jee Heng
2023-12-06 11:49 ` [PATCH v1 15/16] reset: starfive: Add StarFive JH8100 reset driver Sia Jee Heng
2023-12-06 11:50 ` [PATCH v1 16/16] riscv: dts: starfive: jh8100: Add clocks and resets nodes Sia Jee Heng
2023-12-08 16:39   ` Emil Renner Berthing
2023-12-08 17:57     ` Krzysztof Kozlowski
2023-12-12  2:51       ` JeeHeng Sia
2023-12-12  1:07     ` JeeHeng Sia
2023-12-08 17:57   ` Krzysztof Kozlowski
2023-12-12  2:58     ` JeeHeng Sia
2023-12-12  8:43       ` Krzysztof Kozlowski
2023-12-12 10:03         ` JeeHeng Sia
2023-12-08 16:52 ` [PATCH v1 00/16] Basic clock and reset support for StarFive JH8100 RISC-V SoC Emil Renner Berthing
2023-12-12  1:09   ` JeeHeng Sia [this message]

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