Linux clock framework development
 help / color / mirror / Atom feed
From: Jagadeesh Kona <quic_jkona@quicinc.com>
To: Bjorn Andersson <andersson@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	"Vladimir Zapolskiy" <vladimir.zapolskiy@linaro.org>,
	Dmitry Baryshkov <lumag@kernel.org>
Cc: Ajit Pandey <quic_ajipan@quicinc.com>,
	Imran Shaik <quic_imrashai@quicinc.com>,
	Taniya Das <quic_tdas@quicinc.com>,
	"Satya Priya Kakitapalli" <quic_skakitap@quicinc.com>,
	<linux-arm-msm@vger.kernel.org>, <linux-clk@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	Bryan O'Donoghue <bryan.odonoghue@linaro.org>,
	Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,
	Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Subject: Re: (subset) [PATCH v5 00/18] clk: qcom: Add support to attach multiple power domains in cc probe
Date: Thu, 12 Jun 2025 15:33:36 +0530	[thread overview]
Message-ID: <65828662-5352-449b-a892-7c09d488a1f4@quicinc.com> (raw)
In-Reply-To: <174970084192.547582.612305407582982706.b4-ty@kernel.org>



On 6/12/2025 9:30 AM, Bjorn Andersson wrote:
> 
> On Fri, 30 May 2025 18:50:45 +0530, Jagadeesh Kona wrote:
>> In recent QCOM chipsets, PLLs require more than one power domain to be
>> kept ON to configure the PLL. But the current code doesn't enable all
>> the required power domains while configuring the PLLs, this leads to
>> functional issues due to suboptimal settings of PLLs.
>>
>> To address this, add support for handling runtime power management,
>> configuring plls and enabling critical clocks from qcom_cc_really_probe.
>> The clock controller can specify PLLs, critical clocks, and runtime PM
>> requirements using the descriptor data. The code in qcom_cc_really_probe()
>> ensures all necessary power domains are enabled before configuring PLLs
>> or critical clocks.
>>
>> [...]
> 
> Applied, thanks!
> 
> [01/18] dt-bindings: clock: qcom,sm8450-videocc: Add MXC power domain
>         commit: 1a42f4d4bb92ea961c58599bac837fb8b377a296
> [02/18] dt-bindings: clock: qcom,sm8450-camcc: Allow to specify two power domains
>         commit: a02a8f8cb7f6f54b077a6f9eb74ccd840b472416
> [03/18] dt-bindings: clock: qcom,sm8450-camcc: Move sc8280xp camcc to sa8775p camcc
>         commit: 842fa748291553d2f56410034991d0eb36b70900
> [04/18] clk: qcom: clk-alpha-pll: Add support for common PLL configuration function
>         commit: 0f698c16358ef300ed28a608368b89a4f6a8623a
> [05/18] clk: qcom: common: Handle runtime power management in qcom_cc_really_probe
>         commit: c0b6627369bcfec151ccbd091f9ff1cadb1d40c1
> [06/18] clk: qcom: common: Add support to configure clk regs in qcom_cc_really_probe
>         commit: 452ae64997dd1db1fe9bec2e7bd65b33338e7a6b
> [07/18] clk: qcom: videocc-sm8450: Move PLL & clk configuration to really probe
>         commit: 512af5bf312efe09698de0870e99c0cec4d13e21
> [08/18] clk: qcom: videocc-sm8550: Move PLL & clk configuration to really probe
>         commit: a9dc2cc7279a1967f37192a2f954e7111bfa61b7
> [09/18] clk: qcom: camcc-sm8450: Move PLL & clk configuration to really probe
>         commit: eb65d754eb5eaeab7db87ce7e64dab27b7d156d8
> [10/18] clk: qcom: camcc-sm8550: Move PLL & clk configuration to really probe
>         commit: adb50c762f3a513a363d91722dbd8d1b4afc5f10
> [11/18] clk: qcom: camcc-sm8650: Move PLL & clk configuration to really probe
>         commit: 3f8dd231e60b706fc9395edbf0186b7a0756f45d
> [12/18] clk: qcom: camcc-x1e80100: Move PLL & clk configuration to really probe
>         commit: d7eddaf0ed07e79ffdfd20acb2f6f2ca53e7851b
> 
> Best regards,


Hi Bjorn,

Thanks for picking these patches. However, the dt-bindings patches are closely linked with
the DT patches in this series and needs to be picked together. The dt-bindings changes adds
multiple power domains support for clock controllers, and without the corresponding DT
patches, dtbs_check will give warnings.

Can you please help to pick DT patches as well?

Thanks,
Jagadeesh

 

  reply	other threads:[~2025-06-12 10:03 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-30 13:20 [PATCH v5 00/18] clk: qcom: Add support to attach multiple power domains in cc probe Jagadeesh Kona
2025-05-30 13:20 ` [PATCH v5 01/18] dt-bindings: clock: qcom,sm8450-videocc: Add MXC power domain Jagadeesh Kona
2025-05-30 13:20 ` [PATCH v5 02/18] dt-bindings: clock: qcom,sm8450-camcc: Allow to specify two power domains Jagadeesh Kona
2025-05-30 13:20 ` [PATCH v5 03/18] dt-bindings: clock: qcom,sm8450-camcc: Move sc8280xp camcc to sa8775p camcc Jagadeesh Kona
2025-06-03  7:04   ` Krzysztof Kozlowski
2025-05-30 13:20 ` [PATCH v5 04/18] clk: qcom: clk-alpha-pll: Add support for common PLL configuration function Jagadeesh Kona
2025-05-30 13:20 ` [PATCH v5 05/18] clk: qcom: common: Handle runtime power management in qcom_cc_really_probe Jagadeesh Kona
2025-05-30 13:20 ` [PATCH v5 06/18] clk: qcom: common: Add support to configure clk regs " Jagadeesh Kona
2025-05-30 23:00   ` Konrad Dybcio
2025-05-30 13:20 ` [PATCH v5 07/18] clk: qcom: videocc-sm8450: Move PLL & clk configuration to really probe Jagadeesh Kona
2025-05-30 13:20 ` [PATCH v5 08/18] clk: qcom: videocc-sm8550: " Jagadeesh Kona
2025-05-30 22:57   ` Konrad Dybcio
2025-06-03  8:02   ` Bryan O'Donoghue
2025-05-30 13:20 ` [PATCH v5 09/18] clk: qcom: camcc-sm8450: " Jagadeesh Kona
2025-06-03  8:05   ` Bryan O'Donoghue
2025-05-30 13:20 ` [PATCH v5 10/18] clk: qcom: camcc-sm8550: " Jagadeesh Kona
2025-06-03  8:06   ` Bryan O'Donoghue
2025-05-30 13:20 ` [PATCH v5 11/18] clk: qcom: camcc-sm8650: " Jagadeesh Kona
2025-06-03  8:07   ` Bryan O'Donoghue
2025-05-30 13:20 ` [PATCH v5 12/18] clk: qcom: camcc-x1e80100: " Jagadeesh Kona
2025-05-30 13:20 ` [PATCH v5 13/18] arm64: dts: qcom: sm8450: Additionally manage MXC power domain in videocc Jagadeesh Kona
2025-05-30 13:20 ` [PATCH v5 14/18] arm64: dts: qcom: sm8550: " Jagadeesh Kona
2025-05-30 13:21 ` [PATCH v5 15/18] arm64: dts: qcom: sm8650: " Jagadeesh Kona
2025-05-30 13:21 ` [PATCH v5 16/18] arm64: dts: qcom: sm8450: Additionally manage MXC power domain in camcc Jagadeesh Kona
2025-06-03  8:08   ` Bryan O'Donoghue
2025-05-30 13:21 ` [PATCH v5 17/18] arm64: dts: qcom: sm8550: " Jagadeesh Kona
2025-06-03  8:09   ` Bryan O'Donoghue
2025-05-30 13:21 ` [PATCH v5 18/18] arm64: dts: qcom: sm8650: " Jagadeesh Kona
2025-06-03  8:09   ` Bryan O'Donoghue
2025-06-03  8:09 ` [PATCH v5 00/18] clk: qcom: Add support to attach multiple power domains in cc probe Bryan O'Donoghue
2025-06-12  4:00 ` (subset) " Bjorn Andersson
2025-06-12 10:03   ` Jagadeesh Kona [this message]
2025-06-12 10:52     ` Krzysztof Kozlowski
2025-06-16  7:25       ` Jagadeesh Kona
2025-06-17 13:27         ` Bjorn Andersson
2025-06-17 19:16           ` Jagadeesh Kona
2025-07-29 14:49 ` neil.armstrong
2025-07-30  9:50   ` Jagadeesh Kona

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=65828662-5352-449b-a892-7c09d488a1f4@quicinc.com \
    --to=quic_jkona@quicinc.com \
    --cc=andersson@kernel.org \
    --cc=bryan.odonoghue@linaro.org \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=dmitry.baryshkov@oss.qualcomm.com \
    --cc=konrad.dybcio@oss.qualcomm.com \
    --cc=konradybcio@kernel.org \
    --cc=krzk+dt@kernel.org \
    --cc=krzysztof.kozlowski@linaro.org \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=lumag@kernel.org \
    --cc=mturquette@baylibre.com \
    --cc=quic_ajipan@quicinc.com \
    --cc=quic_imrashai@quicinc.com \
    --cc=quic_skakitap@quicinc.com \
    --cc=quic_tdas@quicinc.com \
    --cc=robh@kernel.org \
    --cc=sboyd@kernel.org \
    --cc=vladimir.zapolskiy@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox