[PATCH 0/2] Use APIs in gdsc genpd to switch gdsc mode for venus v4 core

[PATCH 0/2] Use APIs in gdsc genpd to switch gdsc mode for venus v4 core

[Renjiang Han]

The Venus driver requires vcodec GDSC to be ON in SW mode for clock
operations and move it back to HW mode to gain power benefits. Earlier,
as there is no interface to switch the GDSC mode from GenPD framework,
the GDSC is moved to HW control mode as part of GDSC enable callback and
venus driver is writing to its POWER_CONTROL register to keep the GDSC ON
from SW whereever required. But the POWER_CONTROL register addresses are
not constant and can vary across the variants.

Also as per the HW recommendation, the GDSC mode switching needs to be
controlled from respective GDSC register and this is a uniform approach
across all the targets. Hence use dev_pm_genpd_set_hwmode() API which
controls GDSC mode switching using its respective GDSC register.

Signed-off-by: Renjiang Han <quic_renjiang@quicinc.com>
---
Renjiang Han (1):
      venus: pm_helpers: Use dev_pm_genpd_set_hwmode to switch GDSC mode on V4

Taniya Das (1):
      clk: qcom: videocc: Use HW_CTRL_TRIGGER flag for video GDSC's

 drivers/clk/qcom/videocc-sc7180.c              |  2 +-
 drivers/clk/qcom/videocc-sdm845.c              |  4 ++--
 drivers/media/platform/qcom/venus/pm_helpers.c | 10 +++++-----
 3 files changed, 8 insertions(+), 8 deletions(-)
---
base-commit: 63b3ff03d91ae8f875fe8747c781a521f78cde17
change-id: 20241122-switch_gdsc_mode-b658ea233c2a

Best regards,
-- 
Renjiang Han <quic_renjiang@quicinc.com>

[PATCH 1/2] clk: qcom: videocc: Use HW_CTRL_TRIGGER flag for video GDSC's

[Renjiang Han]

From: Taniya Das <quic_tdas@quicinc.com>

The video driver will be using the newly introduced
dev_pm_genpd_set_hwmode() API to switch the video GDSC to HW and SW
control modes at runtime.
Hence use HW_CTRL_TRIGGER flag instead of HW_CTRL for video GDSC's for
Qualcomm SoC SC7180 and SDM845.

Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Renjiang Han <quic_renjiang@quicinc.com>
---
 drivers/clk/qcom/videocc-sc7180.c | 2 +-
 drivers/clk/qcom/videocc-sdm845.c | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/qcom/videocc-sc7180.c b/drivers/clk/qcom/videocc-sc7180.c
index d7f84548039699ce6fdd7c0f6675c168d5eaf4c1..dd2441d6aa83bd7cff17deeb42f5d011c1e9b134 100644
--- a/drivers/clk/qcom/videocc-sc7180.c
+++ b/drivers/clk/qcom/videocc-sc7180.c
@@ -166,7 +166,7 @@ static struct gdsc vcodec0_gdsc = {
 	.pd = {
 		.name = "vcodec0_gdsc",
 	},
-	.flags = HW_CTRL,
+	.flags = HW_CTRL_TRIGGER,
 	.pwrsts = PWRSTS_OFF_ON,
 };
 
diff --git a/drivers/clk/qcom/videocc-sdm845.c b/drivers/clk/qcom/videocc-sdm845.c
index f77a0777947773dc8902c92098acff71b9b8f10f..6dedc80a8b3e18eca82c08a5bcd7e1fdc374d4b5 100644
--- a/drivers/clk/qcom/videocc-sdm845.c
+++ b/drivers/clk/qcom/videocc-sdm845.c
@@ -260,7 +260,7 @@ static struct gdsc vcodec0_gdsc = {
 	},
 	.cxcs = (unsigned int []){ 0x890, 0x930 },
 	.cxc_count = 2,
-	.flags = HW_CTRL | POLL_CFG_GDSCR,
+	.flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR,
 	.pwrsts = PWRSTS_OFF_ON,
 };
 
@@ -271,7 +271,7 @@ static struct gdsc vcodec1_gdsc = {
 	},
 	.cxcs = (unsigned int []){ 0x8d0, 0x950 },
 	.cxc_count = 2,
-	.flags = HW_CTRL | POLL_CFG_GDSCR,
+	.flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR,
 	.pwrsts = PWRSTS_OFF_ON,
 };
 

-- 
2.34.1

Re: [PATCH 1/2] clk: qcom: videocc: Use HW_CTRL_TRIGGER flag for video GDSC's

[Dmitry Baryshkov]

On Fri, Nov 22, 2024 at 04:01:45PM +0530, Renjiang Han wrote:
> From: Taniya Das <quic_tdas@quicinc.com>
> 
> The video driver will be using the newly introduced

'will be' or 'is using'? Or will be using it for these platforms? Is
there any kind of dependency between two patches in the series?

> dev_pm_genpd_set_hwmode() API to switch the video GDSC to HW and SW
> control modes at runtime.
> Hence use HW_CTRL_TRIGGER flag instead of HW_CTRL for video GDSC's for
> Qualcomm SoC SC7180 and SDM845.

Is it applicable to any other platforms? Why did you select just these
two?

> 
> Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
> Signed-off-by: Renjiang Han <quic_renjiang@quicinc.com>
> ---
>  drivers/clk/qcom/videocc-sc7180.c | 2 +-
>  drivers/clk/qcom/videocc-sdm845.c | 4 ++--
>  2 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/clk/qcom/videocc-sc7180.c b/drivers/clk/qcom/videocc-sc7180.c
> index d7f84548039699ce6fdd7c0f6675c168d5eaf4c1..dd2441d6aa83bd7cff17deeb42f5d011c1e9b134 100644
> --- a/drivers/clk/qcom/videocc-sc7180.c
> +++ b/drivers/clk/qcom/videocc-sc7180.c
> @@ -166,7 +166,7 @@ static struct gdsc vcodec0_gdsc = {
>  	.pd = {
>  		.name = "vcodec0_gdsc",
>  	},
> -	.flags = HW_CTRL,
> +	.flags = HW_CTRL_TRIGGER,
>  	.pwrsts = PWRSTS_OFF_ON,
>  };
>  
> diff --git a/drivers/clk/qcom/videocc-sdm845.c b/drivers/clk/qcom/videocc-sdm845.c
> index f77a0777947773dc8902c92098acff71b9b8f10f..6dedc80a8b3e18eca82c08a5bcd7e1fdc374d4b5 100644
> --- a/drivers/clk/qcom/videocc-sdm845.c
> +++ b/drivers/clk/qcom/videocc-sdm845.c
> @@ -260,7 +260,7 @@ static struct gdsc vcodec0_gdsc = {
>  	},
>  	.cxcs = (unsigned int []){ 0x890, 0x930 },
>  	.cxc_count = 2,
> -	.flags = HW_CTRL | POLL_CFG_GDSCR,
> +	.flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR,
>  	.pwrsts = PWRSTS_OFF_ON,
>  };
>  
> @@ -271,7 +271,7 @@ static struct gdsc vcodec1_gdsc = {
>  	},
>  	.cxcs = (unsigned int []){ 0x8d0, 0x950 },
>  	.cxc_count = 2,
> -	.flags = HW_CTRL | POLL_CFG_GDSCR,
> +	.flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR,
>  	.pwrsts = PWRSTS_OFF_ON,
>  };
>  
> 
> -- 
> 2.34.1
> 

-- 
With best wishes
Dmitry

Re: [PATCH 1/2] clk: qcom: videocc: Use HW_CTRL_TRIGGER flag for video GDSC's

[Taniya Das]

On 11/22/2024 4:29 PM, Dmitry Baryshkov wrote:
> On Fri, Nov 22, 2024 at 04:01:45PM +0530, Renjiang Han wrote:
>> From: Taniya Das <quic_tdas@quicinc.com>
>>
>> The video driver will be using the newly introduced
> 
> 'will be' or 'is using'? Or will be using it for these platforms? Is
> there any kind of dependency between two patches in the series?
> 
The video driver will not be able to work without the clock side changes.

>> dev_pm_genpd_set_hwmode() API to switch the video GDSC to HW and SW
>> control modes at runtime.
>> Hence use HW_CTRL_TRIGGER flag instead of HW_CTRL for video GDSC's for
>> Qualcomm SoC SC7180 and SDM845.
> 
> Is it applicable to any other platforms? Why did you select just these
> two?
> 

The V6 version of Video driver is already using them, now the video 
driver wants to migrate to v4 version of the HW to use the new flag.

>>
>> Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
>> Signed-off-by: Renjiang Han <quic_renjiang@quicinc.com>
>> ---
>>   drivers/clk/qcom/videocc-sc7180.c | 2 +-
>>   drivers/clk/qcom/videocc-sdm845.c | 4 ++--
>>   2 files changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/clk/qcom/videocc-sc7180.c b/drivers/clk/qcom/videocc-sc7180.c
>> index d7f84548039699ce6fdd7c0f6675c168d5eaf4c1..dd2441d6aa83bd7cff17deeb42f5d011c1e9b134 100644
>> --- a/drivers/clk/qcom/videocc-sc7180.c
>> +++ b/drivers/clk/qcom/videocc-sc7180.c
>> @@ -166,7 +166,7 @@ static struct gdsc vcodec0_gdsc = {
>>   	.pd = {
>>   		.name = "vcodec0_gdsc",
>>   	},
>> -	.flags = HW_CTRL,
>> +	.flags = HW_CTRL_TRIGGER,
>>   	.pwrsts = PWRSTS_OFF_ON,
>>   };
>>   
>> diff --git a/drivers/clk/qcom/videocc-sdm845.c b/drivers/clk/qcom/videocc-sdm845.c
>> index f77a0777947773dc8902c92098acff71b9b8f10f..6dedc80a8b3e18eca82c08a5bcd7e1fdc374d4b5 100644
>> --- a/drivers/clk/qcom/videocc-sdm845.c
>> +++ b/drivers/clk/qcom/videocc-sdm845.c
>> @@ -260,7 +260,7 @@ static struct gdsc vcodec0_gdsc = {
>>   	},
>>   	.cxcs = (unsigned int []){ 0x890, 0x930 },
>>   	.cxc_count = 2,
>> -	.flags = HW_CTRL | POLL_CFG_GDSCR,
>> +	.flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR,
>>   	.pwrsts = PWRSTS_OFF_ON,
>>   };
>>   
>> @@ -271,7 +271,7 @@ static struct gdsc vcodec1_gdsc = {
>>   	},
>>   	.cxcs = (unsigned int []){ 0x8d0, 0x950 },
>>   	.cxc_count = 2,
>> -	.flags = HW_CTRL | POLL_CFG_GDSCR,
>> +	.flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR,
>>   	.pwrsts = PWRSTS_OFF_ON,
>>   };
>>   
>>
>> -- 
>> 2.34.1
>>
> 

-- 
Thanks & Regards,
Taniya Das.

Re: [PATCH 1/2] clk: qcom: videocc: Use HW_CTRL_TRIGGER flag for video GDSC's

[Dmitry Baryshkov]

On Fri, Nov 22, 2024 at 10:25:44PM +0530, Taniya Das wrote:
> 
> 
> On 11/22/2024 4:29 PM, Dmitry Baryshkov wrote:
> > On Fri, Nov 22, 2024 at 04:01:45PM +0530, Renjiang Han wrote:
> > > From: Taniya Das <quic_tdas@quicinc.com>
> > > 
> > > The video driver will be using the newly introduced
> > 
> > 'will be' or 'is using'? Or will be using it for these platforms? Is
> > there any kind of dependency between two patches in the series?
> > 
> The video driver will not be able to work without the clock side changes.

Will enabling this flag break the video driver until it is updated?

> 
> > > dev_pm_genpd_set_hwmode() API to switch the video GDSC to HW and SW
> > > control modes at runtime.
> > > Hence use HW_CTRL_TRIGGER flag instead of HW_CTRL for video GDSC's for
> > > Qualcomm SoC SC7180 and SDM845.
> > 
> > Is it applicable to any other platforms? Why did you select just these
> > two?
> > 
> 
> The V6 version of Video driver is already using them, now the video driver
> wants to migrate to v4 version of the HW to use the new flag.

I mean slightly different issue. We have following drivers:

videocc-sa8775p.c - already uses HW_CTRL_TRIGGER
videocc-sc7180.c - being converted now
videocc-sc7280.c - already uses HW_CTRL_TRIGGER
videocc-sdm845.c - being converted now
videocc-sm7150.c
videocc-sm8150.c
videocc-sm8250.c - already uses HW_CTRL_TRIGGER
videocc-sm8350.c - already uses HW_CTRL_TRIGGER
videocc-sm8450.c
videocc-sm8550.c - already uses HW_CTRL_TRIGGER

This leaves sm7150, sm8150 and sm8450 untouched. Don't they also need to
use HW_CTRL_TRIGGER?

> 
> > > 
> > > Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
> > > Signed-off-by: Renjiang Han <quic_renjiang@quicinc.com>
> > > ---
> > >   drivers/clk/qcom/videocc-sc7180.c | 2 +-
> > >   drivers/clk/qcom/videocc-sdm845.c | 4 ++--
> > >   2 files changed, 3 insertions(+), 3 deletions(-)
> > > 
> > > diff --git a/drivers/clk/qcom/videocc-sc7180.c b/drivers/clk/qcom/videocc-sc7180.c
> > > index d7f84548039699ce6fdd7c0f6675c168d5eaf4c1..dd2441d6aa83bd7cff17deeb42f5d011c1e9b134 100644
> > > --- a/drivers/clk/qcom/videocc-sc7180.c
> > > +++ b/drivers/clk/qcom/videocc-sc7180.c
> > > @@ -166,7 +166,7 @@ static struct gdsc vcodec0_gdsc = {
> > >   	.pd = {
> > >   		.name = "vcodec0_gdsc",
> > >   	},
> > > -	.flags = HW_CTRL,
> > > +	.flags = HW_CTRL_TRIGGER,
> > >   	.pwrsts = PWRSTS_OFF_ON,
> > >   };
> > > diff --git a/drivers/clk/qcom/videocc-sdm845.c b/drivers/clk/qcom/videocc-sdm845.c
> > > index f77a0777947773dc8902c92098acff71b9b8f10f..6dedc80a8b3e18eca82c08a5bcd7e1fdc374d4b5 100644
> > > --- a/drivers/clk/qcom/videocc-sdm845.c
> > > +++ b/drivers/clk/qcom/videocc-sdm845.c
> > > @@ -260,7 +260,7 @@ static struct gdsc vcodec0_gdsc = {
> > >   	},
> > >   	.cxcs = (unsigned int []){ 0x890, 0x930 },
> > >   	.cxc_count = 2,
> > > -	.flags = HW_CTRL | POLL_CFG_GDSCR,
> > > +	.flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR,
> > >   	.pwrsts = PWRSTS_OFF_ON,
> > >   };
> > > @@ -271,7 +271,7 @@ static struct gdsc vcodec1_gdsc = {
> > >   	},
> > >   	.cxcs = (unsigned int []){ 0x8d0, 0x950 },
> > >   	.cxc_count = 2,
> > > -	.flags = HW_CTRL | POLL_CFG_GDSCR,
> > > +	.flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR,
> > >   	.pwrsts = PWRSTS_OFF_ON,
> > >   };
> > > 
> > > -- 
> > > 2.34.1
> > > 
> > 
> 
> -- 
> Thanks & Regards,
> Taniya Das.

-- 
With best wishes
Dmitry

Re: [PATCH 1/2] clk: qcom: videocc: Use HW_CTRL_TRIGGER flag for video GDSC's

[Bryan O'Donoghue]

On 23/11/2024 00:05, Dmitry Baryshkov wrote:
> This leaves sm7150, sm8150 and sm8450 untouched. Don't they also need to
> use HW_CTRL_TRIGGER?

I believe the correct list here is anything that is HFI_VERSION_4XX in

You can't apply the second patch in this series without ensuring the 
clock controllers for sdm845 and sm7180

grep HFI_VERSION_4XX drivers/media/platform/qcom/venus/core.c

drivers/clk/qcom/videocc-sdm845.c
drivers/clk/qcom/videocc-sc7180.c

Hmm.. that's what this patch does, to be fair my other email was flippant.

This is fine in general, once we can get some Tested-by: for it.

That's my question - what platforms has this change been tested on ?

I can do sdm845 but, we'll need to find someone with 7180 to verify IMO.

---
bod

RE: [PATCH 1/2] clk: qcom: videocc: Use HW_CTRL_TRIGGER flag for video GDSC's

[Renjiang Han (QUIC)]

On Saturday, November 23, 2024 8:17 AM, Bryan O'Donoghue wrote:
> On 23/11/2024 00:05, Dmitry Baryshkov wrote:
> > This leaves sm7150, sm8150 and sm8450 untouched. Don't they also need 
> > to use HW_CTRL_TRIGGER?

> I believe the correct list here is anything that is HFI_VERSION_4XX in

> You can't apply the second patch in this series without ensuring the clock controllers for sdm845 and sm7180

> grep HFI_VERSION_4XX drivers/media/platform/qcom/venus/core.c

> drivers/clk/qcom/videocc-sdm845.c
> drivers/clk/qcom/videocc-sc7180.c

> Hmm.. that's what this patch does, to be fair my other email was flippant.

> This is fine in general, once we can get some Tested-by: for it.

> That's my question - what platforms has this change been tested on ?

> I can do sdm845 but, we'll need to find someone with 7180 to verify IMO.

Thanks for your comment. We have run video case with these two patches on sc7180. The result is fine.

> ---
> bod

Re: [PATCH 1/2] clk: qcom: videocc: Use HW_CTRL_TRIGGER flag for video GDSC's

[Dmitry Baryshkov]

On Mon, 25 Nov 2024 at 07:31, Renjiang Han (QUIC)
<quic_renjiang@quicinc.com> wrote:
> On Saturday, November 23, 2024 8:17 AM, Bryan O'Donoghue wrote:
> > On 23/11/2024 00:05, Dmitry Baryshkov wrote:
> > > This leaves sm7150, sm8150 and sm8450 untouched. Don't they also need
> > > to use HW_CTRL_TRIGGER?
>
> > I believe the correct list here is anything that is HFI_VERSION_4XX in
>
> > You can't apply the second patch in this series without ensuring the clock controllers for sdm845 and sm7180
>
> > grep HFI_VERSION_4XX drivers/media/platform/qcom/venus/core.c
>
> > drivers/clk/qcom/videocc-sdm845.c
> > drivers/clk/qcom/videocc-sc7180.c
>
> > Hmm.. that's what this patch does, to be fair my other email was flippant.
>
> > This is fine in general, once we can get some Tested-by: for it.
>
> > That's my question - what platforms has this change been tested on ?
>
> > I can do sdm845 but, we'll need to find someone with 7180 to verify IMO.
>
> Thanks for your comment. We have run video case with these two patches on sc7180. The result is fine.

A single case, a thorough tests, a mixture of suspend&resume while
playing video cases?

Also, can I please reiterate my question: sm7150, sm8150 and sm8450 ?
Should they also be changed to use HW_CTRL_TRIGGER?
Next question, sdm660, msm8996, msm8998: do they support HW_CTRL_TRIGGER?

-- 
With best wishes
Dmitry

RE: [PATCH 1/2] clk: qcom: videocc: Use HW_CTRL_TRIGGER flag for video GDSC's

[Renjiang Han (QUIC)]

On Monday, November 25, 2024 9:55 PM, Dmitry Baryshkov wrote:
> On Mon, 25 Nov 2024 at 07:31, Renjiang Han (QUIC) <quic_renjiang@quicinc.com> wrote:
> > On Saturday, November 23, 2024 8:17 AM, Bryan O'Donoghue wrote:
> > > On 23/11/2024 00:05, Dmitry Baryshkov wrote:
> > > > This leaves sm7150, sm8150 and sm8450 untouched. Don't they also 
> > > > need to use HW_CTRL_TRIGGER?
> >
> > > I believe the correct list here is anything that is HFI_VERSION_4XX 
> > > in
> >
> > > You can't apply the second patch in this series without ensuring the 
> > > clock controllers for sdm845 and sm7180
> >
> > > grep HFI_VERSION_4XX drivers/media/platform/qcom/venus/core.c
> >
> > > drivers/clk/qcom/videocc-sdm845.c
> > > drivers/clk/qcom/videocc-sc7180.c
> >
> > > Hmm.. that's what this patch does, to be fair my other email was flippant.
> >
> > > This is fine in general, once we can get some Tested-by: for it.
> >
> > > That's my question - what platforms has this change been tested on ?
> >
> > > I can do sdm845 but, we'll need to find someone with 7180 to verify IMO.
> >
> > Thanks for your comment. We have run video case with these two patches on sc7180. The result is fine.

> A single case, a thorough tests, a mixture of suspend&resume while playing video cases?

> Also, can I please reiterate my question: sm7150, sm8150 and sm8450 ?
> Should they also be changed to use HW_CTRL_TRIGGER?
> Next question, sdm660, msm8996, msm8998: do they support HW_CTRL_TRIGGER?

Thanks for your review. The video playback and recording cases include video
pause and resume, and full video playback. The results are fine.
Also, this change is only for v4 core (HFI_VERSION_4XX ). Therefore, we have only tested it
on platforms using v4 core. We have not tried other platforms.
sm7150, sm8150 and sm8450 should not use venus v4 core. So they needn't to use HW_CTRL_TRIGGER.

Best Regards,
Renjiang

Re: [PATCH 1/2] clk: qcom: videocc: Use HW_CTRL_TRIGGER flag for video GDSC's

[Dmitry Baryshkov]

On Mon, Nov 25, 2024 at 03:14:27PM +0000, Renjiang Han (QUIC) wrote:
> On Monday, November 25, 2024 9:55 PM, Dmitry Baryshkov wrote:
> > On Mon, 25 Nov 2024 at 07:31, Renjiang Han (QUIC) <quic_renjiang@quicinc.com> wrote:
> > > On Saturday, November 23, 2024 8:17 AM, Bryan O'Donoghue wrote:
> > > > On 23/11/2024 00:05, Dmitry Baryshkov wrote:
> > > > > This leaves sm7150, sm8150 and sm8450 untouched. Don't they also 
> > > > > need to use HW_CTRL_TRIGGER?
> > >
> > > > I believe the correct list here is anything that is HFI_VERSION_4XX 
> > > > in
> > >
> > > > You can't apply the second patch in this series without ensuring the 
> > > > clock controllers for sdm845 and sm7180
> > >
> > > > grep HFI_VERSION_4XX drivers/media/platform/qcom/venus/core.c
> > >
> > > > drivers/clk/qcom/videocc-sdm845.c
> > > > drivers/clk/qcom/videocc-sc7180.c
> > >
> > > > Hmm.. that's what this patch does, to be fair my other email was flippant.
> > >
> > > > This is fine in general, once we can get some Tested-by: for it.
> > >
> > > > That's my question - what platforms has this change been tested on ?
> > >
> > > > I can do sdm845 but, we'll need to find someone with 7180 to verify IMO.
> > >
> > > Thanks for your comment. We have run video case with these two patches on sc7180. The result is fine.
> 
> > A single case, a thorough tests, a mixture of suspend&resume while playing video cases?
> 
> > Also, can I please reiterate my question: sm7150, sm8150 and sm8450 ?
> > Should they also be changed to use HW_CTRL_TRIGGER?
> > Next question, sdm660, msm8996, msm8998: do they support HW_CTRL_TRIGGER?
> 
> Thanks for your review. The video playback and recording cases include video
> pause and resume, and full video playback. The results are fine.
> Also, this change is only for v4 core (HFI_VERSION_4XX ). Therefore, we have only tested it
> on platforms using v4 core. We have not tried other platforms.
> sm7150, sm8150 and sm8450 should not use venus v4 core. So they needn't to use HW_CTRL_TRIGGER.

We don't have venus / iris support for those platforms at all.
This patch is not about venus, it is about the clock drivers. So
mentioning venus is quite useless here.
If these platforms will benefit from HW_CTRL_TRIGGER, then we should
change them at the same time, before somebody even gets venus/iris on
them.

-- 
With best wishes
Dmitry

Re: [PATCH 1/2] clk: qcom: videocc: Use HW_CTRL_TRIGGER flag for video GDSC's

[Renjiang Han]

On 11/26/2024 12:27 AM, Dmitry Baryshkov wrote:
> On Mon, Nov 25, 2024 at 03:14:27PM +0000, Renjiang Han (QUIC) wrote:
>> On Monday, November 25, 2024 9:55 PM, Dmitry Baryshkov wrote:
>>> On Mon, 25 Nov 2024 at 07:31, Renjiang Han (QUIC) <quic_renjiang@quicinc.com> wrote:
>>>> On Saturday, November 23, 2024 8:17 AM, Bryan O'Donoghue wrote:
>>>>> On 23/11/2024 00:05, Dmitry Baryshkov wrote:
>>>>>> This leaves sm7150, sm8150 and sm8450 untouched. Don't they also
>>>>>> need to use HW_CTRL_TRIGGER?
>>>>> I believe the correct list here is anything that is HFI_VERSION_4XX
>>>>> in
>>>>> You can't apply the second patch in this series without ensuring the
>>>>> clock controllers for sdm845 and sm7180
>>>>> grep HFI_VERSION_4XX drivers/media/platform/qcom/venus/core.c
>>>>> drivers/clk/qcom/videocc-sdm845.c
>>>>> drivers/clk/qcom/videocc-sc7180.c
>>>>> Hmm.. that's what this patch does, to be fair my other email was flippant.
>>>>> This is fine in general, once we can get some Tested-by: for it.
>>>>> That's my question - what platforms has this change been tested on ?
>>>>> I can do sdm845 but, we'll need to find someone with 7180 to verify IMO.
>>>> Thanks for your comment. We have run video case with these two patches on sc7180. The result is fine.
>>> A single case, a thorough tests, a mixture of suspend&resume while playing video cases?
>>> Also, can I please reiterate my question: sm7150, sm8150 and sm8450 ?
>>> Should they also be changed to use HW_CTRL_TRIGGER?
>>> Next question, sdm660, msm8996, msm8998: do they support HW_CTRL_TRIGGER?
>> Thanks for your review. The video playback and recording cases include video
>> pause and resume, and full video playback. The results are fine.
>> Also, this change is only for v4 core (HFI_VERSION_4XX ). Therefore, we have only tested it
>> on platforms using v4 core. We have not tried other platforms.
>> sm7150, sm8150 and sm8450 should not use venus v4 core. So they needn't to use HW_CTRL_TRIGGER.
> We don't have venus / iris support for those platforms at all.
> This patch is not about venus, it is about the clock drivers. So
> mentioning venus is quite useless here.
> If these platforms will benefit from HW_CTRL_TRIGGER, then we should
> change them at the same time, before somebody even gets venus/iris on
> them.
  Thanks for pointing it out. HW_CTRL_TRIGGER can be used for sm7150,
  sm8150 and sm8450. But this flag can't be used for sdm660, msm8996
  and msm8998. Because venus doesn't support it on these three
  platforms.

-- 
Best Regards,
Renjiang

Re: [PATCH 1/2] clk: qcom: videocc: Use HW_CTRL_TRIGGER flag for video GDSC's

[Taniya Das]

On 11/23/2024 5:35 AM, Dmitry Baryshkov wrote:
> On Fri, Nov 22, 2024 at 10:25:44PM +0530, Taniya Das wrote:
>>
>>
>> On 11/22/2024 4:29 PM, Dmitry Baryshkov wrote:
>>> On Fri, Nov 22, 2024 at 04:01:45PM +0530, Renjiang Han wrote:
>>>> From: Taniya Das <quic_tdas@quicinc.com>
>>>>
>>>> The video driver will be using the newly introduced
>>>
>>> 'will be' or 'is using'? Or will be using it for these platforms? Is
>>> there any kind of dependency between two patches in the series?
>>>
>> The video driver will not be able to work without the clock side changes.
> 
> Will enabling this flag break the video driver until it is updated?
> 

Yes, my understanding is yes it will break. When we first introduced the 
flag we had got the driver and the clock changes together.

>>
>>>> dev_pm_genpd_set_hwmode() API to switch the video GDSC to HW and SW
>>>> control modes at runtime.
>>>> Hence use HW_CTRL_TRIGGER flag instead of HW_CTRL for video GDSC's for
>>>> Qualcomm SoC SC7180 and SDM845.
>>>
>>> Is it applicable to any other platforms? Why did you select just these
>>> two?
>>>
>>
>> The V6 version of Video driver is already using them, now the video driver
>> wants to migrate to v4 version of the HW to use the new flag.
> 
> I mean slightly different issue. We have following drivers:
> 
> videocc-sa8775p.c - already uses HW_CTRL_TRIGGER
> videocc-sc7180.c - being converted now
> videocc-sc7280.c - already uses HW_CTRL_TRIGGER
> videocc-sdm845.c - being converted now
> videocc-sm7150.c
> videocc-sm8150.c
> videocc-sm8250.c - already uses HW_CTRL_TRIGGER
> videocc-sm8350.c - already uses HW_CTRL_TRIGGER
> videocc-sm8450.c
> videocc-sm8550.c - already uses HW_CTRL_TRIGGER
> 
> This leaves sm7150, sm8150 and sm8450 untouched. Don't they also need to
> use HW_CTRL_TRIGGER?
> 

Yes, I am okay to add the flag, but looking for the Video SW team to 
confirm they are well tested on the rest of the platforms.

>>
>>>>
>>>> Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
>>>> Signed-off-by: Renjiang Han <quic_renjiang@quicinc.com>
>>>> ---
>>>>    drivers/clk/qcom/videocc-sc7180.c | 2 +-
>>>>    drivers/clk/qcom/videocc-sdm845.c | 4 ++--
>>>>    2 files changed, 3 insertions(+), 3 deletions(-)
>>>>
>>>> diff --git a/drivers/clk/qcom/videocc-sc7180.c b/drivers/clk/qcom/videocc-sc7180.c
>>>> index d7f84548039699ce6fdd7c0f6675c168d5eaf4c1..dd2441d6aa83bd7cff17deeb42f5d011c1e9b134 100644
>>>> --- a/drivers/clk/qcom/videocc-sc7180.c
>>>> +++ b/drivers/clk/qcom/videocc-sc7180.c
>>>> @@ -166,7 +166,7 @@ static struct gdsc vcodec0_gdsc = {
>>>>    	.pd = {
>>>>    		.name = "vcodec0_gdsc",
>>>>    	},
>>>> -	.flags = HW_CTRL,
>>>> +	.flags = HW_CTRL_TRIGGER,
>>>>    	.pwrsts = PWRSTS_OFF_ON,
>>>>    };
>>>> diff --git a/drivers/clk/qcom/videocc-sdm845.c b/drivers/clk/qcom/videocc-sdm845.c
>>>> index f77a0777947773dc8902c92098acff71b9b8f10f..6dedc80a8b3e18eca82c08a5bcd7e1fdc374d4b5 100644
>>>> --- a/drivers/clk/qcom/videocc-sdm845.c
>>>> +++ b/drivers/clk/qcom/videocc-sdm845.c
>>>> @@ -260,7 +260,7 @@ static struct gdsc vcodec0_gdsc = {
>>>>    	},
>>>>    	.cxcs = (unsigned int []){ 0x890, 0x930 },
>>>>    	.cxc_count = 2,
>>>> -	.flags = HW_CTRL | POLL_CFG_GDSCR,
>>>> +	.flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR,
>>>>    	.pwrsts = PWRSTS_OFF_ON,
>>>>    };
>>>> @@ -271,7 +271,7 @@ static struct gdsc vcodec1_gdsc = {
>>>>    	},
>>>>    	.cxcs = (unsigned int []){ 0x8d0, 0x950 },
>>>>    	.cxc_count = 2,
>>>> -	.flags = HW_CTRL | POLL_CFG_GDSCR,
>>>> +	.flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR,
>>>>    	.pwrsts = PWRSTS_OFF_ON,
>>>>    };
>>>>
>>>> -- 
>>>> 2.34.1
>>>>
>>>
>>
>> -- 
>> Thanks & Regards,
>> Taniya Das.
> 

-- 
Thanks & Regards,
Taniya Das.

Re: [PATCH 1/2] clk: qcom: videocc: Use HW_CTRL_TRIGGER flag for video GDSC's

[Dmitry Baryshkov]

On 26 November 2024 06:04:12 EET, Taniya Das <quic_tdas@quicinc.com> wrote:
>
>
>On 11/23/2024 5:35 AM, Dmitry Baryshkov wrote:
>> On Fri, Nov 22, 2024 at 10:25:44PM +0530, Taniya Das wrote:
>>> 
>>> 
>>> On 11/22/2024 4:29 PM, Dmitry Baryshkov wrote:
>>>> On Fri, Nov 22, 2024 at 04:01:45PM +0530, Renjiang Han wrote:
>>>>> From: Taniya Das <quic_tdas@quicinc.com>
>>>>> 
>>>>> The video driver will be using the newly introduced
>>>> 
>>>> 'will be' or 'is using'? Or will be using it for these platforms? Is
>>>> there any kind of dependency between two patches in the series?
>>>> 
>>> The video driver will not be able to work without the clock side changes.
>> 
>> Will enabling this flag break the video driver until it is updated?
>> 
>
>Yes, my understanding is yes it will break. When we first introduced the flag we had got the driver and the clock changes together.

Please clearly document this in the cover letter. Can venus changes go in first? Or they will also break without the flag? The kernel should not break between commits.

>
>>> 
>>>>> dev_pm_genpd_set_hwmode() API to switch the video GDSC to HW and SW
>>>>> control modes at runtime.
>>>>> Hence use HW_CTRL_TRIGGER flag instead of HW_CTRL for video GDSC's for
>>>>> Qualcomm SoC SC7180 and SDM845.
>>>> 
>>>> Is it applicable to any other platforms? Why did you select just these
>>>> two?
>>>> 
>>> 
>>> The V6 version of Video driver is already using them, now the video driver
>>> wants to migrate to v4 version of the HW to use the new flag.
>> 
>> I mean slightly different issue. We have following drivers:
>> 
>> videocc-sa8775p.c - already uses HW_CTRL_TRIGGER
>> videocc-sc7180.c - being converted now
>> videocc-sc7280.c - already uses HW_CTRL_TRIGGER
>> videocc-sdm845.c - being converted now
>> videocc-sm7150.c
>> videocc-sm8150.c
>> videocc-sm8250.c - already uses HW_CTRL_TRIGGER
>> videocc-sm8350.c - already uses HW_CTRL_TRIGGER
>> videocc-sm8450.c
>> videocc-sm8550.c - already uses HW_CTRL_TRIGGER
>> 
>> This leaves sm7150, sm8150 and sm8450 untouched. Don't they also need to
>> use HW_CTRL_TRIGGER?
>> 
>
>Yes, I am okay to add the flag, but looking for the Video SW team to confirm they are well tested on the rest of the platforms.

Thank you! Let's get confirmation from Vikash or Dikshita.

>
>>> 
>>>>> 
>>>>> Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
>>>>> Signed-off-by: Renjiang Han <quic_renjiang@quicinc.com>
>>>>> ---
>>>>>    drivers/clk/qcom/videocc-sc7180.c | 2 +-
>>>>>    drivers/clk/qcom/videocc-sdm845.c | 4 ++--
>>>>>    2 files changed, 3 insertions(+), 3 deletions(-)
>>>>> 
>>>>> diff --git a/drivers/clk/qcom/videocc-sc7180.c b/drivers/clk/qcom/videocc-sc7180.c
>>>>> index d7f84548039699ce6fdd7c0f6675c168d5eaf4c1..dd2441d6aa83bd7cff17deeb42f5d011c1e9b134 100644
>>>>> --- a/drivers/clk/qcom/videocc-sc7180.c
>>>>> +++ b/drivers/clk/qcom/videocc-sc7180.c
>>>>> @@ -166,7 +166,7 @@ static struct gdsc vcodec0_gdsc = {
>>>>>    	.pd = {
>>>>>    		.name = "vcodec0_gdsc",
>>>>>    	},
>>>>> -	.flags = HW_CTRL,
>>>>> +	.flags = HW_CTRL_TRIGGER,
>>>>>    	.pwrsts = PWRSTS_OFF_ON,
>>>>>    };
>>>>> diff --git a/drivers/clk/qcom/videocc-sdm845.c b/drivers/clk/qcom/videocc-sdm845.c
>>>>> index f77a0777947773dc8902c92098acff71b9b8f10f..6dedc80a8b3e18eca82c08a5bcd7e1fdc374d4b5 100644
>>>>> --- a/drivers/clk/qcom/videocc-sdm845.c
>>>>> +++ b/drivers/clk/qcom/videocc-sdm845.c
>>>>> @@ -260,7 +260,7 @@ static struct gdsc vcodec0_gdsc = {
>>>>>    	},
>>>>>    	.cxcs = (unsigned int []){ 0x890, 0x930 },
>>>>>    	.cxc_count = 2,
>>>>> -	.flags = HW_CTRL | POLL_CFG_GDSCR,
>>>>> +	.flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR,
>>>>>    	.pwrsts = PWRSTS_OFF_ON,
>>>>>    };
>>>>> @@ -271,7 +271,7 @@ static struct gdsc vcodec1_gdsc = {
>>>>>    	},
>>>>>    	.cxcs = (unsigned int []){ 0x8d0, 0x950 },
>>>>>    	.cxc_count = 2,
>>>>> -	.flags = HW_CTRL | POLL_CFG_GDSCR,
>>>>> +	.flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR,
>>>>>    	.pwrsts = PWRSTS_OFF_ON,
>>>>>    };
>>>>> 
>>>>> -- 
>>>>> 2.34.1
>>>>> 
>>>> 
>>> 
>>> -- 
>>> Thanks & Regards,
>>> Taniya Das.
>> 
>

[PATCH 2/2] venus: pm_helpers: Use dev_pm_genpd_set_hwmode to switch GDSC mode on V4

[Renjiang Han]

The POWER_CONTROL register addresses are not constant and can vary across
the variants. Also as per the HW recommendation, the GDSC mode switching
needs to be controlled from respective GDSC register and this is a uniform
approach across all the targets. Hence use dev_pm_genpd_set_hwmode() API
which controls GDSC mode switching using its respective GDSC register.

In venus v4 variants, the vcodec gdsc gets enabled in SW mode by default
with new HW_CTRL_TRIGGER flag and there is no need to switch it to SW mode
again after enable, hence add check to avoid switching gdsc to SW mode
again after gdsc enable. Similarly add check to avoid switching GDSC to HW
mode before disabling the GDSC, so GDSC gets enabled in SW mode in the
next enable.

Signed-off-by: Renjiang Han <quic_renjiang@quicinc.com>
---
 drivers/media/platform/qcom/venus/pm_helpers.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/media/platform/qcom/venus/pm_helpers.c b/drivers/media/platform/qcom/venus/pm_helpers.c
index 33a5a659c0ada0ca97eebb5522c5f349f95c49c7..a2062b366d4aedba3eb5e4be456a005847eaec0b 100644
--- a/drivers/media/platform/qcom/venus/pm_helpers.c
+++ b/drivers/media/platform/qcom/venus/pm_helpers.c
@@ -412,7 +412,7 @@ static int vcodec_control_v4(struct venus_core *core, u32 coreid, bool enable)
 	u32 val;
 	int ret;
 
-	if (IS_V6(core))
+	if (IS_V6(core) || IS_V4(core))
 		return dev_pm_genpd_set_hwmode(core->pmdomains->pd_devs[coreid], !enable);
 	else if (coreid == VIDC_CORE_ID_1) {
 		ctrl = core->wrapper_base + WRAPPER_VCODEC0_MMCC_POWER_CONTROL;
@@ -450,7 +450,7 @@ static int poweroff_coreid(struct venus_core *core, unsigned int coreid_mask)
 
 		vcodec_clks_disable(core, core->vcodec0_clks);
 
-		if (!IS_V6(core)) {
+		if (!IS_V6(core) && !IS_V4(core)) {
 			ret = vcodec_control_v4(core, VIDC_CORE_ID_1, false);
 			if (ret)
 				return ret;
@@ -468,7 +468,7 @@ static int poweroff_coreid(struct venus_core *core, unsigned int coreid_mask)
 
 		vcodec_clks_disable(core, core->vcodec1_clks);
 
-		if (!IS_V6(core)) {
+		if (!IS_V6(core) && !IS_V4(core)) {
 			ret = vcodec_control_v4(core, VIDC_CORE_ID_2, false);
 			if (ret)
 				return ret;
@@ -491,7 +491,7 @@ static int poweron_coreid(struct venus_core *core, unsigned int coreid_mask)
 		if (ret < 0)
 			return ret;
 
-		if (!IS_V6(core)) {
+		if (!IS_V6(core) && !IS_V4(core)) {
 			ret = vcodec_control_v4(core, VIDC_CORE_ID_1, true);
 			if (ret)
 				return ret;
@@ -511,7 +511,7 @@ static int poweron_coreid(struct venus_core *core, unsigned int coreid_mask)
 		if (ret < 0)
 			return ret;
 
-		if (!IS_V6(core)) {
+		if (!IS_V6(core) && !IS_V4(core)) {
 			ret = vcodec_control_v4(core, VIDC_CORE_ID_2, true);
 			if (ret)
 				return ret;

-- 
2.34.1

Re: [PATCH 2/2] venus: pm_helpers: Use dev_pm_genpd_set_hwmode to switch GDSC mode on V4

[Bryan O'Donoghue]

On 22/11/2024 10:31, Renjiang Han wrote:
> -	if (IS_V6(core))
> +	if (IS_V6(core) || IS_V4(core))

sdm845 IS_V4()

The GDSCs for the clock OTOH are


static struct gdsc vcodec0_gdsc = {
         .gdscr = 0x874,
         .pd = {
                 .name = "vcodec0_gdsc",
         },
         .cxcs = (unsigned int []){ 0x890, 0x930 },
         .cxc_count = 2,
         .flags = HW_CTRL | POLL_CFG_GDSCR,
         .pwrsts = PWRSTS_OFF_ON,
};

static struct gdsc vcodec1_gdsc = {
         .gdscr = 0x8b4,
         .pd = {
                 .name = "vcodec1_gdsc",
         },
         .cxcs = (unsigned int []){ 0x8d0, 0x950 },
         .cxc_count = 2,
         .flags = HW_CTRL | POLL_CFG_GDSCR,
         .pwrsts = PWRSTS_OFF_ON,
};

I can't see how this series will work on 845.

---
bod

RE: [PATCH 2/2] venus: pm_helpers: Use dev_pm_genpd_set_hwmode to switch GDSC mode on V4

[Renjiang Han (QUIC)]

On Friday, November 22, 2024 8:51 PM, Bryan O'Donoghue wrote:
> On 22/11/2024 10:31, Renjiang Han wrote:
> > -	if (IS_V6(core))
> > +	if (IS_V6(core) || IS_V4(core))

> sdm845 IS_V4()

> The GDSCs for the clock OTOH are


> static struct gdsc vcodec0_gdsc = {
>          .gdscr = 0x874,
 >         .pd = {
 >                .name = "vcodec0_gdsc",
 >          },
 >         .cxcs = (unsigned int []){ 0x890, 0x930 },
 >         .cxc_count = 2,
 >         .flags = HW_CTRL | POLL_CFG_GDSCR,
 >         .pwrsts = PWRSTS_OFF_ON,
 > };

 > static struct gdsc vcodec1_gdsc = {
 >         .gdscr = 0x8b4,
  >        .pd = {
  >               .name = "vcodec1_gdsc",
  >        },
  >       .cxcs = (unsigned int []){ 0x8d0, 0x950 },
  >       .cxc_count = 2,
  >       .flags = HW_CTRL | POLL_CFG_GDSCR,
  >        .pwrsts = PWRSTS_OFF_ON,
  >  };

 > I can't see how this series will work on 845.
Thanks for your review. In [PATCH 1/2] clk: qcom: videocc: Use HW_CTRL_TRIGGER flag for video GDSC's, the gdsc flag will be changed to HW_CTRL_TRIGGER, so the v4 core also needs to use the method of switching GDSC mode like v6.


> ---
> bod

Best Regards,
Renjiang

Re: [PATCH 0/2] Use APIs in gdsc genpd to switch gdsc mode for venus v4 core

[Bryan O'Donoghue]

On 22/11/2024 10:31, Renjiang Han wrote:
> The Venus driver requires vcodec GDSC to be ON in SW mode for clock
> operations and move it back to HW mode to gain power benefits. Earlier,
> as there is no interface to switch the GDSC mode from GenPD framework,
> the GDSC is moved to HW control mode as part of GDSC enable callback and
> venus driver is writing to its POWER_CONTROL register to keep the GDSC ON
> from SW whereever required. But the POWER_CONTROL register addresses are
> not constant and can vary across the variants.
> 
> Also as per the HW recommendation, the GDSC mode switching needs to be
> controlled from respective GDSC register and this is a uniform approach
> across all the targets. Hence use dev_pm_genpd_set_hwmode() API which
> controls GDSC mode switching using its respective GDSC register.
> 
> Signed-off-by: Renjiang Han <quic_renjiang@quicinc.com>
> ---
> Renjiang Han (1):
>        venus: pm_helpers: Use dev_pm_genpd_set_hwmode to switch GDSC mode on V4
> 
> Taniya Das (1):
>        clk: qcom: videocc: Use HW_CTRL_TRIGGER flag for video GDSC's
> 
>   drivers/clk/qcom/videocc-sc7180.c              |  2 +-
>   drivers/clk/qcom/videocc-sdm845.c              |  4 ++--
>   drivers/media/platform/qcom/venus/pm_helpers.c | 10 +++++-----
>   3 files changed, 8 insertions(+), 8 deletions(-)
> ---
> base-commit: 63b3ff03d91ae8f875fe8747c781a521f78cde17
> change-id: 20241122-switch_gdsc_mode-b658ea233c2a
> 
> Best regards,

What's your test strategy here ? What platforms have you tested this on ?

What help do you need ?

---
bod

RE: [PATCH 0/2] Use APIs in gdsc genpd to switch gdsc mode for venus v4 core

[Renjiang Han (QUIC)]

On Saturday, November 23, 2024 8:19 AM, Bryan O'Donoghue wrote:
> On 22/11/2024 10:31, Renjiang Han wrote:
> > The Venus driver requires vcodec GDSC to be ON in SW mode for clock 
> > operations and move it back to HW mode to gain power benefits. 
> > Earlier, as there is no interface to switch the GDSC mode from GenPD 
> > framework, the GDSC is moved to HW control mode as part of GDSC enable 
> > callback and venus driver is writing to its POWER_CONTROL register to 
> > keep the GDSC ON from SW whereever required. But the POWER_CONTROL 
> > register addresses are not constant and can vary across the variants.
> > 
> > Also as per the HW recommendation, the GDSC mode switching needs to be 
> > controlled from respective GDSC register and this is a uniform 
> > approach across all the targets. Hence use dev_pm_genpd_set_hwmode() 
> > API which controls GDSC mode switching using its respective GDSC register.
> > 
> > Signed-off-by: Renjiang Han <quic_renjiang@quicinc.com> >
> > ---
> > Renjiang Han (1):
> >        venus: pm_helpers: Use dev_pm_genpd_set_hwmode to switch GDSC 
> > mode on V4
> > 
> > Taniya Das (1):
> >        clk: qcom: videocc: Use HW_CTRL_TRIGGER flag for video GDSC's
> > 
> >   drivers/clk/qcom/videocc-sc7180.c              |  2 +-
> >   drivers/clk/qcom/videocc-sdm845.c              |  4 ++--
> >   drivers/media/platform/qcom/venus/pm_helpers.c | 10 +++++-----
> >   3 files changed, 8 insertions(+), 8 deletions(-)
> > ---
> > base-commit: 63b3ff03d91ae8f875fe8747c781a521f78cde17
> > change-id: 20241122-switch_gdsc_mode-b658ea233c2a
> > 
> > Best regards,

> What's your test strategy here ? What platforms have you tested this on ?

> What help do you need ?
Since the GDSC flag has been changed to HW_CTRL_TRIGGER, the v4 core needs to use
dev_pm_genpd_set_hwmode to switch the GDSC mode like v6. The video codec has
been verified on SC7180 and the result is OK. The same verification has been done on
the latest QCS615 and the result is also OK.
In addition, since the videocc of QCS615 uses the HW_CTRL_TRIGGER flag, QCS615 and
SC7180 both use the v4 core in venus. So the v4 core needs to use
dev_pm_genpd_set_hwmode to switch the GDSC mode like v6.

> ---
> bod

Re: [PATCH 0/2] Use APIs in gdsc genpd to switch gdsc mode for venus v4 core

[Bryan O'Donoghue]

On 25/11/2024 03:49, Renjiang Han (QUIC) wrote:
>> What help do you need ?
> Since the GDSC flag has been changed to HW_CTRL_TRIGGER, the v4 core needs to use
> dev_pm_genpd_set_hwmode to switch the GDSC mode like v6. The video codec has
> been verified on SC7180 and the result is OK. The same verification has been done on
> the latest QCS615 and the result is also OK.
> In addition, since the videocc of QCS615 uses the HW_CTRL_TRIGGER flag, QCS615 and
> SC7180 both use the v4 core in venus. So the v4 core needs to use
> dev_pm_genpd_set_hwmode to switch the GDSC mode like v6.

I think you need this tested on sdm845.

I can do that for you.

---
bod

RE: [PATCH 0/2] Use APIs in gdsc genpd to switch gdsc mode for venus v4 core

[Renjiang Han (QUIC)]

On Monday, November 25, 2024 5:36 PM, Bryan O'Donoghue wrote:
> On 25/11/2024 03:49, Renjiang Han (QUIC) wrote:
> > > > What help do you need ?
> > Since the GDSC flag has been changed to HW_CTRL_TRIGGER, the v4 core 
> > needs to use dev_pm_genpd_set_hwmode to switch the GDSC mode like v6. 
> > The video codec has been verified on SC7180 and the result is OK. The 
> > same verification has been done on the latest QCS615 and the result is also OK.
> > In addition, since the videocc of QCS615 uses the HW_CTRL_TRIGGER 
> > flag, QCS615 and
> > SC7180 both use the v4 core in venus. So the v4 core needs to use 
> > dev_pm_genpd_set_hwmode to switch the GDSC mode like v6.

> I think you need this tested on sdm845.

> I can do that for you.
Thanks for your reply. Yes, we need to test on sdm845. Please help run these two changes on sdm845. Thanks for your help again.
> ---
> bod