From: Dave Jiang <dave.jiang@intel.com>
To: Robert Richter <rrichter@amd.com>
Cc: Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>,
Davidlohr Bueso <dave@stgolabs.net>,
linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org,
Gregory Price <gourry@gourry.net>,
"Fabio M. De Francesco" <fabio.m.de.francesco@linux.intel.com>,
Terry Bowman <terry.bowman@amd.com>,
Joshua Hahn <joshua.hahnjy@gmail.com>
Subject: Re: [PATCH v3 02/11] cxl/region: Store HPA range in struct cxl_region
Date: Mon, 15 Sep 2025 09:24:09 -0700 [thread overview]
Message-ID: <090fd415-42e4-481f-8c77-0b3f2e9f3f63@intel.com> (raw)
In-Reply-To: <aMe96yaXueRvTARq@rric.localdomain>
On 9/15/25 12:19 AM, Robert Richter wrote:
> On 12.09.25 10:17:14, Dave Jiang wrote:
>>
>>
>> On 9/12/25 7:45 AM, Robert Richter wrote:
>>> Each region has a known host physical address (HPA) range it is
>>> assigned to. Endpoint decoders assigned to a region share the same HPA
>>> range. The region's address range is the system's physical address
>>> (SPA) range.
>>>
>>> Endpoint decoders in systems that need address translation use HPAs
>>> which are not SPAs. To make the SPA range accessible to the endpoint
>>> decoders, store and track the region's SPA range in struct cxl_region.
>>> Introduce the @hpa_range member to the struct. Now, the SPA range of
>>> an endpoint decoder can be determined based on its assigned region.
>>>
>>> Patch is a prerequisite to implement address translation which uses
>>> struct cxl_region to store all relevant region and interleaving
>>> parameters.
>>>
>>> Signed-off-by: Robert Richter <rrichter@amd.com>
>>
>> Just a nit below. Otherwise looks ok
>>
>> Reviewed-by: Dave Jiang <dave.jiang@intel.com>
>>
>>> ---
>>> drivers/cxl/core/region.c | 17 +++++++++++++++++
>>> drivers/cxl/cxl.h | 2 ++
>>> 2 files changed, 19 insertions(+)
>>>
>>> diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
>>> index 2c37c060d983..777d04870180 100644
>>> --- a/drivers/cxl/core/region.c
>>> +++ b/drivers/cxl/core/region.c
>>> @@ -664,6 +664,11 @@ static int alloc_hpa(struct cxl_region *cxlr, resource_size_t size)
>>> return PTR_ERR(res);
>>> }
>>>
>>> + cxlr->hpa_range = (struct range) {
>>> + .start = res->start,
>>> + .end = res->end,
>>> + };
>>> +
>>> p->res = res;
>>> p->state = CXL_CONFIG_INTERLEAVE_ACTIVE;
>>>
>>> @@ -700,8 +705,14 @@ static int free_hpa(struct cxl_region *cxlr)
>>> if (p->state >= CXL_CONFIG_ACTIVE)
>>> return -EBUSY;
>>>
>>> + cxlr->hpa_range = (struct range) {
>>> + .start = 0,
>>> + .end = -1,
>>> + };
>>> +
>>> cxl_region_iomem_release(cxlr);
>>> p->state = CXL_CONFIG_IDLE;
>>> +
>>
>> stray blank line
>>> return 0;
>>> }
>
> This small cleanup was intended and separates the return from other
> statements to better group the code in (sort of) blocks. It is not
> worth separate patch and it is common practice to have small cleanups
> in the area of code that is changed. That allows small style fixes to
> the code while reworking it, but avoids separate code cleanups causing
> extra efforts, conflicts and the risk of changing stable code.
>
> Anyway, let me know if you want me remove the change.
Yeah please just drop the change. While it's nice to have, it may potentially cause backport issues generally speaking.
>
> Thanks,
>
> -Robert
next prev parent reply other threads:[~2025-09-15 16:24 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-12 14:45 [PATCH v3 00/11] cxl: ACPI PRM Address Translation Support and AMD Zen5 enablement Robert Richter
2025-09-12 14:45 ` [PATCH v3 01/11] cxl/region: Store root decoder in struct cxl_region Robert Richter
2025-09-12 15:52 ` Dave Jiang
2025-09-15 10:14 ` Jonathan Cameron
2025-09-17 19:56 ` Gregory Price
2025-09-23 21:40 ` Alison Schofield
2025-09-26 17:52 ` Robert Richter
2025-09-12 14:45 ` [PATCH v3 02/11] cxl/region: Store HPA range " Robert Richter
2025-09-12 17:17 ` Dave Jiang
2025-09-15 7:19 ` Robert Richter
2025-09-15 16:24 ` Dave Jiang [this message]
2025-09-15 10:23 ` Jonathan Cameron
2025-09-17 8:15 ` Robert Richter
2025-09-17 19:58 ` Gregory Price
2025-09-12 14:45 ` [PATCH v3 03/11] cxl/region: Rename misleading variable name @hpa to @range Robert Richter
2025-09-12 17:33 ` Dave Jiang
2025-09-15 7:27 ` Robert Richter
2025-09-15 10:25 ` Jonathan Cameron
2025-09-17 8:10 ` Robert Richter
2025-09-17 20:01 ` Gregory Price
2025-09-12 14:45 ` [PATCH v3 04/11] cxl/region: Add @range argument to function cxl_find_root_decoder() Robert Richter
2025-09-17 20:05 ` Gregory Price
2025-09-12 14:45 ` [PATCH v3 05/11] cxl/region: Add @range argument to function cxl_calc_interleave_pos() Robert Richter
2025-09-17 20:09 ` Gregory Price
2025-09-23 21:52 ` Alison Schofield
2025-09-26 18:22 ` Robert Richter
2025-09-12 14:45 ` [PATCH v3 06/11] cxl/region: Separate region parameter setup and region construction Robert Richter
2025-09-12 21:10 ` Dave Jiang
2025-09-15 7:31 ` Robert Richter
2025-09-15 16:26 ` Dave Jiang
2025-09-17 20:15 ` Gregory Price
2025-09-12 14:45 ` [PATCH v3 07/11] cxl: Introduce callback to translate a decoder's HPA to the next parent port Robert Richter
2025-09-12 21:21 ` Dave Jiang
2025-09-15 7:55 ` Robert Richter
2025-09-15 16:32 ` Dave Jiang
2025-09-15 20:22 ` Dave Jiang
2025-09-17 8:20 ` Robert Richter
2025-09-12 14:45 ` [PATCH v3 08/11] cxl/region: Implement endpoint decoder address translation Robert Richter
2025-09-15 10:46 ` Jonathan Cameron
2025-09-15 16:35 ` Dave Jiang
2025-09-17 9:04 ` Robert Richter
2025-09-17 20:51 ` Gregory Price
2025-09-17 20:57 ` Dave Jiang
2025-09-18 13:59 ` Gregory Price
2025-09-12 14:45 ` [PATCH v3 09/11] cxl/region: Lock decoders that need " Robert Richter
2025-09-17 20:52 ` Gregory Price
2025-09-12 14:45 ` [PATCH v3 10/11] cxl/acpi: Prepare use of EFI runtime services Robert Richter
2025-09-17 20:54 ` Gregory Price
2025-09-12 14:45 ` [PATCH v3 11/11] cxl: Enable AMD Zen5 address translation using ACPI PRMT Robert Richter
2025-09-12 23:46 ` Dave Jiang
2025-09-15 8:34 ` Robert Richter
2025-09-15 10:59 ` Jonathan Cameron
2025-09-17 9:43 ` Robert Richter
2025-09-17 13:50 ` Jonathan Cameron
2025-09-17 21:01 ` Dave Jiang
2025-09-24 17:09 ` Gregory Price
2025-09-26 16:59 ` Robert Richter
2025-09-27 1:44 ` Gregory Price
2025-09-29 12:39 ` Robert Richter
2025-09-12 15:45 ` [PATCH v3 00/11] cxl: ACPI PRM Address Translation Support and AMD Zen5 enablement Dave Jiang
2025-09-15 8:42 ` Robert Richter
2025-09-23 3:26 ` Gregory Price
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