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From: Gregory Price <gourry@gourry.net>
To: Robert Richter <rrichter@amd.com>
Cc: Alison Schofield <alison.schofield@intel.com>,
	Vishal Verma <vishal.l.verma@intel.com>,
	Ira Weiny <ira.weiny@intel.com>,
	Dan Williams <dan.j.williams@intel.com>,
	Jonathan Cameron <Jonathan.Cameron@huawei.com>,
	Dave Jiang <dave.jiang@intel.com>,
	Davidlohr Bueso <dave@stgolabs.net>,
	linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org,
	"Fabio M. De Francesco" <fabio.m.de.francesco@linux.intel.com>,
	Terry Bowman <terry.bowman@amd.com>,
	Joshua Hahn <joshua.hahnjy@gmail.com>
Subject: Re: [PATCH v3 11/11] cxl: Enable AMD Zen5 address translation using ACPI PRMT
Date: Fri, 26 Sep 2025 21:44:43 -0400	[thread overview]
Message-ID: <aNdBixt1AzIxdCpX@gourry-fedora-PF4VCD3F> (raw)
In-Reply-To: <aNbGfOxB4LXaFL0Z@rric.localdomain>

On Fri, Sep 26, 2025 at 06:59:40PM +0200, Robert Richter wrote:
> On 24.09.25 13:09:46, Gregory Price wrote:
> > On Fri, Sep 12, 2025 at 04:45:13PM +0200, Robert Richter wrote:
> > > +static void cxl_prm_init(struct cxl_port *port)
> > > +{
> > > +	u64 spa;
> > > +	struct prm_cxl_dpa_spa_data data = { .out = &spa, };
> > > +	int rc;
> > > +
> > > +	if (!check_prm_address_translation(port))
> > > +		return;
> > > +
> > > +	/* Check kernel (-EOPNOTSUPP) and firmware support (-ENODEV) */
> > > +	rc = acpi_call_prm_handler(prm_cxl_dpa_spa_guid, &data);
> > > +	if (rc == -EOPNOTSUPP || rc == -ENODEV)
> > > +		return;
> > > +
> > > +	port->to_hpa = cxl_prm_to_hpa;
> > > +
> > > +	dev_dbg(port->host_bridge, "PRM address translation enabled for %s.\n",
> > > +		dev_name(&port->dev));
> > > +}
> > 
> > Is it possible that the PRMT function is present but uninitialize?
> > For example if expanders are not in a normalized address mode.
> > 
> > This code would likely still add the to_hpa() function reference even
> > if the underlying PRMT function hasn't been set up for translation.
> 
> At this point during init, it is not yet possible to determine
> normalized address mode. Endpoint and hdm decoders are still unknown.
> Thus, PRM is enabled for the port. Later, during region setup, there is
> a check for that while determining the region's HPA range. Addresses
> are translated and ranges adjusted only if needed. Once the ranges are
> set up, no further PRM handler calls are executed.
>

Right, but that errors out if address translation fails (below).

Is this code missing a check for the endpoint_decoder.start==0?

static int setup_address_translation(struct cxl_endpoint_decoder *cxled,
                                     struct cxl_region_context *ctx)
{
...
        /* Translate HPA range to SPA. */
        range.start = port->to_hpa(cxld, range.start);
        range.end = port->to_hpa(cxld, range.end);

        if (range.start == ULLONG_MAX || range.end == ULLONG_MAX) {
                dev_warn(&port->dev,
                        "CXL address translation: Failed to translate HPA range: %#llx-%#llx:%#llx-%#llx(%s)\n",
                        range.start, range.end, ctx->hpa_range.start,
                        ctx->hpa_range.end, dev_name(&cxld->dev));
                return -ENXIO;
        }
...
}


static int setup_region_params(struct cxl_endpoint_decoder *cxled,
                               struct cxl_region_context *ctx)
{          
...
        rc = setup_address_translation(cxled, ctx);
...
}


int cxl_add_to_region(struct cxl_endpoint_decoder *cxled)
{
...
        rc = setup_region_params(cxled, &ctx);
        if (rc)
                return rc;
}

  reply	other threads:[~2025-09-27  1:44 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-12 14:45 [PATCH v3 00/11] cxl: ACPI PRM Address Translation Support and AMD Zen5 enablement Robert Richter
2025-09-12 14:45 ` [PATCH v3 01/11] cxl/region: Store root decoder in struct cxl_region Robert Richter
2025-09-12 15:52   ` Dave Jiang
2025-09-15 10:14     ` Jonathan Cameron
2025-09-17 19:56   ` Gregory Price
2025-09-23 21:40   ` Alison Schofield
2025-09-26 17:52     ` Robert Richter
2025-09-12 14:45 ` [PATCH v3 02/11] cxl/region: Store HPA range " Robert Richter
2025-09-12 17:17   ` Dave Jiang
2025-09-15  7:19     ` Robert Richter
2025-09-15 16:24       ` Dave Jiang
2025-09-15 10:23   ` Jonathan Cameron
2025-09-17  8:15     ` Robert Richter
2025-09-17 19:58   ` Gregory Price
2025-09-12 14:45 ` [PATCH v3 03/11] cxl/region: Rename misleading variable name @hpa to @range Robert Richter
2025-09-12 17:33   ` Dave Jiang
2025-09-15  7:27     ` Robert Richter
2025-09-15 10:25       ` Jonathan Cameron
2025-09-17  8:10         ` Robert Richter
2025-09-17 20:01   ` Gregory Price
2025-09-12 14:45 ` [PATCH v3 04/11] cxl/region: Add @range argument to function cxl_find_root_decoder() Robert Richter
2025-09-17 20:05   ` Gregory Price
2025-09-12 14:45 ` [PATCH v3 05/11] cxl/region: Add @range argument to function cxl_calc_interleave_pos() Robert Richter
2025-09-17 20:09   ` Gregory Price
2025-09-23 21:52   ` Alison Schofield
2025-09-26 18:22     ` Robert Richter
2025-09-12 14:45 ` [PATCH v3 06/11] cxl/region: Separate region parameter setup and region construction Robert Richter
2025-09-12 21:10   ` Dave Jiang
2025-09-15  7:31     ` Robert Richter
2025-09-15 16:26       ` Dave Jiang
2025-09-17 20:15   ` Gregory Price
2025-09-12 14:45 ` [PATCH v3 07/11] cxl: Introduce callback to translate a decoder's HPA to the next parent port Robert Richter
2025-09-12 21:21   ` Dave Jiang
2025-09-15  7:55     ` Robert Richter
2025-09-15 16:32       ` Dave Jiang
2025-09-15 20:22   ` Dave Jiang
2025-09-17  8:20     ` Robert Richter
2025-09-12 14:45 ` [PATCH v3 08/11] cxl/region: Implement endpoint decoder address translation Robert Richter
2025-09-15 10:46   ` Jonathan Cameron
2025-09-15 16:35     ` Dave Jiang
2025-09-17  9:04     ` Robert Richter
2025-09-17 20:51     ` Gregory Price
2025-09-17 20:57       ` Dave Jiang
2025-09-18 13:59       ` Gregory Price
2025-09-12 14:45 ` [PATCH v3 09/11] cxl/region: Lock decoders that need " Robert Richter
2025-09-17 20:52   ` Gregory Price
2025-09-12 14:45 ` [PATCH v3 10/11] cxl/acpi: Prepare use of EFI runtime services Robert Richter
2025-09-17 20:54   ` Gregory Price
2025-09-12 14:45 ` [PATCH v3 11/11] cxl: Enable AMD Zen5 address translation using ACPI PRMT Robert Richter
2025-09-12 23:46   ` Dave Jiang
2025-09-15  8:34     ` Robert Richter
2025-09-15 10:59   ` Jonathan Cameron
2025-09-17  9:43     ` Robert Richter
2025-09-17 13:50       ` Jonathan Cameron
2025-09-17 21:01   ` Dave Jiang
2025-09-24 17:09   ` Gregory Price
2025-09-26 16:59     ` Robert Richter
2025-09-27  1:44       ` Gregory Price [this message]
2025-09-29 12:39         ` Robert Richter
2025-09-12 15:45 ` [PATCH v3 00/11] cxl: ACPI PRM Address Translation Support and AMD Zen5 enablement Dave Jiang
2025-09-15  8:42   ` Robert Richter
2025-09-23  3:26 ` Gregory Price

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