[PATCH v3 07/11] cxl: Introduce callback to translate a decoder's HPA to the next parent port

[Robert Richter <rrichter@amd.com>]

To enable address translation, the endpoint decoder's HPA range must
be translated when crossing memory domains to the next parent port's
address ranges up to the root port. The root port's HPA range is
equivalent to the system's SPA range.

Introduce a callback to translate an address of the decoder's HPA
range to the address range of the parent port. The callback can be set
for ports that need to handle address translation.

Reviewed-by: Gregory Price <gourry@gourry.net>
Signed-off-by: Robert Richter <rrichter@amd.com>
---
 drivers/cxl/cxl.h | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
index f182982f1c14..eb837867d932 100644
--- a/drivers/cxl/cxl.h
+++ b/drivers/cxl/cxl.h
@@ -429,6 +429,17 @@ struct cxl_rd_ops {
 	u64 (*spa_to_hpa)(struct cxl_root_decoder *cxlrd, u64 spa);
 };
 
+/**
+ * cxl_to_hpa_fn - type of a callback function to translate an HPA
+ * @cxld: cxl_decoder to translate from
+ * @hpa: HPA of the @cxld decoder's address range
+ *
+ * The callback translates a decoder's HPA to the address range of the
+ * decoder's parent port. The return value is the translated HPA on
+ * success or ULLONG_MAX otherwise.
+ */
+typedef u64 (*cxl_to_hpa_fn)(struct cxl_decoder *cxld, u64 hpa);
+
 /**
  * struct cxl_root_decoder - Static platform CXL address decoder
  * @res: host / parent resource for region allocations
@@ -599,6 +610,7 @@ struct cxl_dax_region {
  * @parent_dport: dport that points to this port in the parent
  * @decoder_ida: allocator for decoder ids
  * @reg_map: component and ras register mapping parameters
+ * @to_hpa: Callback to translate a child port's decoder address to the port's HPA address range
  * @nr_dports: number of entries in @dports
  * @hdm_end: track last allocated HDM decoder instance for allocation ordering
  * @commit_end: cursor to track highest committed decoder for commit ordering
@@ -619,6 +631,7 @@ struct cxl_port {
 	struct cxl_dport *parent_dport;
 	struct ida decoder_ida;
 	struct cxl_register_map reg_map;
+	cxl_to_hpa_fn to_hpa;
 	int nr_dports;
 	int hdm_end;
 	int commit_end;
-- 
2.39.5