From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: <linux-cxl@vger.kernel.org>, <linuxarm@huawei.com>,
<vishal.l.verma@intel.com>, <ira.weiny@intel.com>,
Ben Widawsky <bwidawsk@kernel.org>
Subject: Re: [PATCH 2/2] cxl/pmem: Fix failure to account for 8 byte header for writes to the device LSA.
Date: Wed, 17 Aug 2022 12:29:30 +0100 [thread overview]
Message-ID: <20220817122930.00004f27@huawei.com> (raw)
In-Reply-To: <62fac0de2685b_dfbc1294d2@dwillia2-xfh.jf.intel.com.notmuch>
On Mon, 15 Aug 2022 14:55:42 -0700
Dan Williams <dan.j.williams@intel.com> wrote:
> [ apologies if this is a duplicate response ]
>
> Jonathan Cameron wrote:
> > Writes to the device must include an offset and size as defined in
> > CXL 2.0 8.2.9.5.2.4 Set LSA (Opcode 4103h)
> >
> > Fixes tag is non obvious as this code has been through several
> > reworks and variable names + wasn't in use until the addition
> > of the region code.
>
> Looks like:
>
> Fixes: 60b8f17215de ("cxl/pmem: Translate NVDIMM label commands to CXL label commands")
>
> ...to me since any transfer that got within 8 bytes of the payload_size
> would fail.
Makes sense - go with that one.
>
> I notice that cxl_test worked around this bug simply because the mocking
> does not attempt to emulate the actual mailbox transfer, just the
> logical data transfer. I apprecitate having QEMU to back up the unit
> testing.
>
next prev parent reply other threads:[~2022-08-17 11:29 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-15 15:40 [PATCH 0/2] cxl: Fix oversized LSA write payload due to header Jonathan Cameron
2022-08-15 15:40 ` [PATCH 1/2] cxl/mbox: Add a check on input payload size Jonathan Cameron
2022-08-15 15:40 ` [PATCH 2/2] cxl/pmem: Fix failure to account for 8 byte header for writes to the device LSA Jonathan Cameron
2022-08-15 21:55 ` Dan Williams
2022-08-17 11:29 ` Jonathan Cameron [this message]
2022-10-10 15:31 ` Jonathan Cameron
2022-10-21 23:31 ` Dan Williams
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