From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: <linux-cxl@vger.kernel.org>, <ira.weiny@intel.com>,
<navneet.singh@intel.com>
Subject: Re: [PATCH 06/19] cxl/hdm: Default CXL_DEVTYPE_DEVMEM decoders to CXL_DECODER_DEVMEM
Date: Wed, 14 Jun 2023 10:15:07 +0100 [thread overview]
Message-ID: <20230614101507.00006f03@Huawei.com> (raw)
In-Reply-To: <6488ee96ed0c_e067a2948a@dwillia2-xfh.jf.intel.com.notmuch>
On Tue, 13 Jun 2023 15:32:54 -0700
Dan Williams <dan.j.williams@intel.com> wrote:
> Jonathan Cameron wrote:
> > On Sun, 04 Jun 2023 16:32:10 -0700
> > Dan Williams <dan.j.williams@intel.com> wrote:
> >
> > > In preparation for device-memory region creation, arrange for decoders
> > > of CXL_DEVTYPE_DEVMEM memdevs to default to CXL_DECODER_DEVMEM for their
> > > target type.
> >
> > Why? CXL_DEVTYPE_DEVMEM might just be a non CLASS code compliant HDM-H
> > only device. I'd want those drivers to always set this explicitly.
> >
> >
> > >
> > > Signed-off-by: Dan Williams <dan.j.williams@intel.com>
> > > ---
> > > drivers/cxl/core/hdm.c | 14 ++++++++++++--
> > > 1 file changed, 12 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c
> > > index de8a3fb28331..ca3b99c6eacf 100644
> > > --- a/drivers/cxl/core/hdm.c
> > > +++ b/drivers/cxl/core/hdm.c
> > > @@ -856,12 +856,22 @@ static int init_hdm_decoder(struct cxl_port *port, struct cxl_decoder *cxld,
> > > }
> > > port->commit_end = cxld->id;
> > > } else {
> > > - /* unless / until type-2 drivers arrive, assume type-3 */
> > > if (FIELD_GET(CXL_HDM_DECODER0_CTRL_TYPE, ctrl) == 0) {
> > > ctrl |= CXL_HDM_DECODER0_CTRL_TYPE;
> > > writel(ctrl, hdm + CXL_HDM_DECODER0_CTRL_OFFSET(which));
> >
> > This is setting it to be HOSTMEM if it was previously DEVMEM and that
> > makes it inconsistent with the state cached below.
> >
> > Not sure why it was conditional in the first place - writing to existing value
> > should have been safe and would be less code...
>
> folded in the following...
LGTM
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
>
> -- >8 --
> diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c
> index 8deb362a7e44..715c1f103739 100644
> --- a/drivers/cxl/core/hdm.c
> +++ b/drivers/cxl/core/hdm.c
> @@ -572,7 +572,7 @@ static void cxld_set_type(struct cxl_decoder *cxld, u32 *ctrl)
> {
> u32p_replace_bits(ctrl,
> !!(cxld->target_type == CXL_DECODER_HOSTONLYMEM),
> - CXL_HDM_DECODER0_CTRL_TYPE);
> + CXL_HDM_DECODER0_CTRL_HOSTONLY);
> }
>
> static int cxlsd_set_targets(struct cxl_switch_decoder *cxlsd, u64 *tgt)
> @@ -840,7 +840,7 @@ static int init_hdm_decoder(struct cxl_port *port, struct cxl_decoder *cxld,
> cxld->flags |= CXL_DECODER_F_ENABLE;
> if (ctrl & CXL_HDM_DECODER0_CTRL_LOCK)
> cxld->flags |= CXL_DECODER_F_LOCK;
> - if (FIELD_GET(CXL_HDM_DECODER0_CTRL_TYPE, ctrl))
> + if (FIELD_GET(CXL_HDM_DECODER0_CTRL_HOSTONLY, ctrl))
> cxld->target_type = CXL_DECODER_HOSTONLYMEM;
> else
> cxld->target_type = CXL_DECODER_DEVMEM;
> @@ -859,14 +859,14 @@ static int init_hdm_decoder(struct cxl_port *port, struct cxl_decoder *cxld,
> }
> port->commit_end = cxld->id;
> } else {
> - if (FIELD_GET(CXL_HDM_DECODER0_CTRL_TYPE, ctrl) == 0) {
> - ctrl |= CXL_HDM_DECODER0_CTRL_TYPE;
> - writel(ctrl, hdm + CXL_HDM_DECODER0_CTRL_OFFSET(which));
> - }
> if (cxled) {
> struct cxl_memdev *cxlmd = cxled_to_memdev(cxled);
> struct cxl_dev_state *cxlds = cxlmd->cxlds;
>
> + /*
> + * Default by devtype until a device arrives that needs
> + * more precision.
> + */
> if (cxlds->type == CXL_DEVTYPE_CLASSMEM)
> cxld->target_type = CXL_DECODER_HOSTONLYMEM;
> else
> @@ -875,6 +875,12 @@ static int init_hdm_decoder(struct cxl_port *port, struct cxl_decoder *cxld,
> /* To be overridden by region type at commit time */
> cxld->target_type = CXL_DECODER_HOSTONLYMEM;
> }
> +
> + if (!FIELD_GET(CXL_HDM_DECODER0_CTRL_HOSTONLY, ctrl) &&
> + cxld->target_type == CXL_DECODER_HOSTONLYMEM) {
> + ctrl |= CXL_HDM_DECODER0_CTRL_HOSTONLY;
> + writel(ctrl, hdm + CXL_HDM_DECODER0_CTRL_OFFSET(which));
> + }
> }
> rc = eiw_to_ways(FIELD_GET(CXL_HDM_DECODER0_CTRL_IW_MASK, ctrl),
> &cxld->interleave_ways);
> diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
> index ae0965ac8c5a..f309b1387858 100644
> --- a/drivers/cxl/cxl.h
> +++ b/drivers/cxl/cxl.h
> @@ -56,7 +56,7 @@
> #define CXL_HDM_DECODER0_CTRL_COMMIT BIT(9)
> #define CXL_HDM_DECODER0_CTRL_COMMITTED BIT(10)
> #define CXL_HDM_DECODER0_CTRL_COMMIT_ERROR BIT(11)
> -#define CXL_HDM_DECODER0_CTRL_TYPE BIT(12)
> +#define CXL_HDM_DECODER0_CTRL_HOSTONLY BIT(12)
> #define CXL_HDM_DECODER0_TL_LOW(i) (0x20 * (i) + 0x24)
> #define CXL_HDM_DECODER0_TL_HIGH(i) (0x20 * (i) + 0x28)
> #define CXL_HDM_DECODER0_SKIP_LOW(i) CXL_HDM_DECODER0_TL_LOW(i)
next prev parent reply other threads:[~2023-06-14 9:15 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-04 23:31 [PATCH 00/19] cxl: Device memory setup Dan Williams
2023-06-04 23:31 ` [PATCH 01/19] cxl/regs: Clarify when a 'struct cxl_register_map' is input vs output Dan Williams
2023-06-05 8:46 ` Jonathan Cameron
2023-06-13 22:03 ` Dave Jiang
2023-06-04 23:31 ` [PATCH 02/19] tools/testing/cxl: Remove unused @cxlds argument Dan Williams
2023-06-06 10:53 ` Jonathan Cameron
2023-06-13 22:08 ` Dave Jiang
2023-06-04 23:31 ` [PATCH 03/19] cxl/mbox: Move mailbox related driver state to its own data structure Dan Williams
2023-06-06 11:10 ` Jonathan Cameron
2023-06-14 0:45 ` Dan Williams
2023-06-13 22:15 ` Dave Jiang
2023-06-04 23:31 ` [PATCH 04/19] cxl/memdev: Make mailbox functionality optional Dan Williams
2023-06-06 11:15 ` Jonathan Cameron
2023-06-13 20:53 ` Dan Williams
2023-06-04 23:32 ` [PATCH 05/19] cxl/port: Rename CXL_DECODER_{EXPANDER, ACCELERATOR} => {HOSTMEM, DEVMEM} Dan Williams
2023-06-06 11:21 ` Jonathan Cameron
2023-06-13 21:03 ` Dan Williams
2023-06-04 23:32 ` [PATCH 06/19] cxl/hdm: Default CXL_DEVTYPE_DEVMEM decoders to CXL_DECODER_DEVMEM Dan Williams
2023-06-06 11:27 ` Jonathan Cameron
2023-06-13 21:23 ` Dan Williams
2023-06-13 22:32 ` Dan Williams
2023-06-14 9:15 ` Jonathan Cameron [this message]
2023-06-04 23:32 ` [PATCH 07/19] cxl/region: Manage decoder target_type at decoder-attach time Dan Williams
2023-06-06 12:36 ` Jonathan Cameron
2023-06-13 22:42 ` Dave Jiang
2023-06-04 23:32 ` [PATCH 08/19] cxl/port: Enumerate flit mode capability Dan Williams
2023-06-06 13:04 ` Jonathan Cameron
2023-06-14 1:06 ` Dan Williams
2023-06-04 23:32 ` [PATCH 09/19] cxl/memdev: Formalize endpoint port linkage Dan Williams
2023-06-06 13:26 ` Jonathan Cameron
2023-06-07 16:47 ` Fan Ni
2023-06-13 22:59 ` Dave Jiang
2023-06-04 23:32 ` [PATCH 10/19] cxl/memdev: Indicate probe deferral Dan Williams
2023-06-06 13:54 ` Jonathan Cameron
2023-06-04 23:32 ` [PATCH 11/19] cxl/region: Factor out construct_region_{begin, end} and drop_region() for reuse Dan Williams
2023-06-06 14:29 ` Jonathan Cameron
2023-06-13 23:29 ` Dave Jiang
2023-06-04 23:32 ` [PATCH 12/19] cxl/region: Factor out interleave ways setup Dan Williams
2023-06-06 14:31 ` Jonathan Cameron
2023-06-13 23:30 ` Dave Jiang
2023-06-04 23:32 ` [PATCH 13/19] cxl/region: Factor out interleave granularity setup Dan Williams
2023-06-06 14:33 ` Jonathan Cameron
2023-06-13 23:42 ` Dave Jiang
2023-06-04 23:32 ` [PATCH 14/19] cxl/region: Clarify locking requirements of cxl_region_attach() Dan Williams
2023-06-06 14:35 ` Jonathan Cameron
2023-06-13 23:45 ` Dave Jiang
2023-06-04 23:33 ` [PATCH 15/19] cxl/region: Specify host-only vs device memory at region creation time Dan Williams
2023-06-06 14:42 ` Jonathan Cameron
2023-06-04 23:33 ` [PATCH 16/19] cxl/hdm: Define a driver interface for DPA allocation Dan Williams
2023-06-06 14:58 ` Jonathan Cameron
2023-06-13 23:53 ` Dave Jiang
2023-06-04 23:33 ` [PATCH 17/19] cxl/region: Define a driver interface for HPA free space enumeration Dan Williams
2023-06-06 15:23 ` Jonathan Cameron
2023-06-14 0:15 ` Dave Jiang
2023-06-04 23:33 ` [PATCH 18/19] cxl/region: Define a driver interface for region creation Dan Williams
2023-06-06 15:31 ` Jonathan Cameron
2023-06-04 23:33 ` [PATCH 19/19] tools/testing/cxl: Emulate a CXL accelerator with local memory Dan Williams
2023-06-06 15:34 ` Jonathan Cameron
2023-06-07 21:09 ` Vikram Sethi
2023-06-08 10:47 ` Jonathan Cameron
2023-06-08 14:34 ` Vikram Sethi
2023-06-08 15:22 ` Jonathan Cameron
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