From: Yanfei Xu <yanfei.xu@intel.com>
To: linux-cxl@vger.kernel.org
Cc: dave@stgolabs.net, jonathan.cameron@huawei.com,
dave.jiang@intel.com, alison.schofield@intel.com,
vishal.l.verma@intel.com, ira.weiny@intel.com,
dan.j.williams@intel.com, ming4.li@intel.com,
yanfei.xu@intel.com
Subject: [v2 1/4] cxl/pci: Fix to record only non-zero ranges
Date: Fri, 9 Aug 2024 17:34:39 +0800 [thread overview]
Message-ID: <20240809093442.646545-2-yanfei.xu@intel.com> (raw)
In-Reply-To: <20240809093442.646545-1-yanfei.xu@intel.com>
The function cxl_dvsec_rr_decode() retrieves and records DVSEC
ranges into info->dvsec_range[], regardless of whether it is
non-zero range, and the variable info->ranges indicates the number
of non-zero ranges. However, in cxl_hdm_decode_init(), the validation
for info->dvsec_range[] occurs in a for loop that iterates based
on info->ranges. It may result in zero range to be validated but
non-zero range not be validated, in turn, the number of allowed
ranges is to be 0. Address it by only record non-zero ranges.
Fixes: 560f78559006 ("cxl/pci: Retrieve CXL DVSEC memory info")
Signed-off-by: Yanfei Xu <yanfei.xu@intel.com>
---
drivers/cxl/core/pci.c | 8 +-------
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c
index a663e7566c48..2d69340134da 100644
--- a/drivers/cxl/core/pci.c
+++ b/drivers/cxl/core/pci.c
@@ -390,10 +390,6 @@ int cxl_dvsec_rr_decode(struct device *dev, int d,
size |= temp & CXL_DVSEC_MEM_SIZE_LOW_MASK;
if (!size) {
- info->dvsec_range[i] = (struct range) {
- .start = 0,
- .end = CXL_RESOURCE_NONE,
- };
continue;
}
@@ -411,12 +407,10 @@ int cxl_dvsec_rr_decode(struct device *dev, int d,
base |= temp & CXL_DVSEC_MEM_BASE_LOW_MASK;
- info->dvsec_range[i] = (struct range) {
+ info->dvsec_range[ranges++] = (struct range) {
.start = base,
.end = base + size - 1
};
-
- ranges++;
}
info->ranges = ranges;
--
2.39.2
next prev parent reply other threads:[~2024-08-09 9:42 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-09 9:34 [v2 0/4] Fixes for hdm docoder initialization from DVSEC ranges Yanfei Xu
2024-08-09 9:34 ` Yanfei Xu [this message]
2024-08-09 18:55 ` [v2 1/4] cxl/pci: Fix to record only non-zero ranges Dan Williams
2024-08-10 8:10 ` Yanfei Xu
2024-08-09 9:34 ` [v2 2/4] cxl/pci: Don't set up decoders for disallowed DVSEC ranges Yanfei Xu
2024-08-09 19:02 ` Dan Williams
2024-08-10 11:36 ` Yanfei Xu
2024-08-09 9:34 ` [v2 3/4] cxl/pci: Check Mem_info_valid bit for each applicable DVSEC range Yanfei Xu
2024-08-09 19:13 ` Dan Williams
2024-08-10 11:50 ` Yanfei Xu
2024-08-09 9:34 ` [v2 4/4] cxl/pci: Simplify the code logic of cxl_hdm_decode_init Yanfei Xu
2024-08-09 19:15 ` Dan Williams
2024-08-10 12:11 ` Yanfei Xu
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