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From: sashiko-bot@kernel.org
To: "Anisa Su" <anisa.su887@gmail.com>
Cc: linux-cxl@vger.kernel.org
Subject: Re: [PATCH v14 2/8] cxl/mem: Read dynamic capacity configuration from the device
Date: Fri, 18 Sep 2026 20:44:28 +0000	[thread overview]
Message-ID: <20260918204428.E2C4D1F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260918203049.7273-3-anisa.su@samsung.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] cxl/mem: cxl_configure_dcd() incorrectly treats Total Capacity as static capacity boundary
--

commit 72ce11842054ad85a9e98674e8c97e80cf0a2d21
Author: Ira Weiny <iweiny@kernel.org>

cxl/mem: Read dynamic capacity configuration from the device

This commit implements the Dynamic Capacity (DC) mailbox commands to read 
and store CXL DCD configuration information. It validates the first 
partition and ensures there are no gaps or overlaps before configuring it.

> diff --git a/drivers/cxl/core/memdev.c b/drivers/cxl/core/memdev.c
> index b3419df586b9c..15df8db314d90 100644
> --- a/drivers/cxl/core/memdev.c
> +++ b/drivers/cxl/core/memdev.c
> @@ -643,6 +643,54 @@ int cxl_mem_dpa_fetch(struct cxl_memdev_state *mds, struct cxl_dpa_info *info)

[ ... ]

> +int cxl_configure_dcd(struct cxl_memdev_state *mds, struct cxl_dpa_info *info)
> +{
> +	struct cxl_dc_partition_info dc_info = { };
> +	struct device *dev = mds->cxlds.dev;
> +	u64 total;
> +	int rc;
> +
> +	if (!mds->cxlds.media_ready)
> +		return 0;
> +
> +	rc = cxl_dev_dc_identify(&mds->cxlds.cxl_mbox, &dc_info);
> +	if (rc) {
> +		dev_warn(dev,
> +			 "Failed to read Dynamic Capacity config: %d\n", rc);
> +		return rc;
> +	}
> +
> +	if (dc_info.start < info->size) {
> +		dev_err(dev,
> +			"DC partition 0 base %#llx overlaps static capacity ending at %#llx\n",
> +			dc_info.start, info->size);
> +		return -EINVAL;
> +	}

[Severity: High]
Does info->size here represent the total capacity (volatile + persistent +
dynamic) rather than just the static capacity?

Since cxl_mem_dpa_fetch() initializes info->size to mds->total_bytes 
(which is the total capacity), comparing the dynamic partition's base 
against this will evaluate to true for spec-compliant devices, 
unconditionally rejecting them as overlaps.

> +
> +	/* A gap between static capacity and the DC partition is not supported */
> +	if (dc_info.start > info->size) {
> +		dev_warn(dev,
> +			 "DC partition 0 base %#llx leaves a gap from static capacity ending at %#llx\n",
> +			 dc_info.start, info->size);
> +		return -EOPNOTSUPP;
> +	}

[Severity: High]
If info->size includes dynamic capacity, would enforcing that the DCD 
partition starts exactly at info->size be physically impossible without 
overlapping the unprovisioned space at the end of the DPA?

> +
> +	if (check_add_overflow(info->size, dc_info.size, &total)) {
> +		dev_err(dev,
> +			"DC partition 0 size %#llx overflows DPA space ending at %#llx\n",
> +			dc_info.size, info->size);
> +		return -EINVAL;
> +	}
> +
> +	info->size = total;

[Severity: High]
Could this lead to double-counting the dynamic capacity?

Since info->size already includes the dynamic capacity per the CXL spec, 
adding dc_info.size here would inflate the value. 

If a non-compliant device bypassed the overlap checks, this inflated size 
could also cause the strict contiguity check in cxl_dpa_setup() to fail 
later during device probe:

drivers/cxl/core/hdm.c:cxl_dpa_setup() {
    ...
    /* Require ordered + contiguous partitions */
    if (i) {
        const struct cxl_dpa_part_info *prev = &info->part[i - 1];

        if (prev->range.end + 1 != part->range.start)
            return -EINVAL;
    }
    ...
}

> +	dev_dbg(dev, "Adding dynamic ram partition 1; %#llx size %#llx\n",
> +		dc_info.start, dc_info.size);
> +	add_part(info, dc_info.start, dc_info.size, CXL_PARTMODE_DYNAMIC_RAM_1);
> +
> +	return 0;
> +}

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260918203049.7273-1-anisa.su@samsung.com?part=2

  reply	other threads:[~2026-09-18 20:44 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-18 20:30 [PATCH v14 0/8] DCD Prep Series Anisa Su
2026-09-18 20:30 ` [PATCH v14 1/8] cxl/mbox: Flag support for Dynamic Capacity Devices (DCD) Anisa Su
2026-09-18 20:30 ` [PATCH v14 2/8] cxl/mem: Read dynamic capacity configuration from the device Anisa Su
2026-09-18 20:44   ` sashiko-bot [this message]
2026-09-18 22:59     ` Anisa Su
2026-09-21 21:50   ` Dave Jiang
2026-09-21 23:19   ` Jonathan Cameron
2026-09-22  3:44   ` Richard Cheng
2026-09-24  0:55     ` Jonathan Cameron
2026-09-24  7:01       ` Anisa Su
2026-09-18 20:30 ` [PATCH v14 3/8] cxl/cdat: Gather DSMAS data for DCD partitions Anisa Su
2026-09-21 21:55   ` Dave Jiang
2026-09-24  5:12     ` Anisa Su
2026-09-21 23:27   ` Jonathan Cameron
2026-09-24  5:01     ` Anisa Su
2026-09-22  3:53   ` Richard Cheng
2026-09-22 17:08     ` Dave Jiang
2026-09-22 21:15       ` Anisa Su
2026-09-22 23:05         ` Dave Jiang
2026-09-23  0:05           ` Anisa Su
2026-09-23 15:35             ` Dave Jiang
2026-09-24  4:58               ` Anisa Su
2026-09-18 20:30 ` [PATCH v14 4/8] cxl/events: Split event msgnum configuration from irq setup Anisa Su
2026-09-22  5:35   ` Richard Cheng
2026-09-18 20:30 ` [PATCH v14 5/8] cxl/pci: Factor out interrupt policy check Anisa Su
2026-09-22  5:37   ` Richard Cheng
2026-09-18 20:30 ` [PATCH v14 6/8] cxl/mem: Configure dynamic capacity interrupts Anisa Su
2026-09-18 20:43   ` sashiko-bot
2026-09-18 23:38     ` Anisa Su
2026-09-21 22:00   ` Dave Jiang
2026-09-21 23:42     ` Jonathan Cameron
2026-09-22  0:45       ` Dave Jiang
2026-09-22 21:22         ` Anisa Su
2026-09-24  0:58           ` Jonathan Cameron
2026-09-22  5:48   ` Richard Cheng
2026-09-22  9:15     ` Richard Cheng
2026-09-18 20:30 ` [PATCH v14 7/8] cxl/core: Enforce partition order/simplify partition calls Anisa Su
2026-09-18 20:30 ` [PATCH v14 8/8] Documentation/cxl: Document DPA partition layout and ordering rules Anisa Su
2026-09-21 22:02   ` Dave Jiang
2026-09-28 21:53     ` Anisa Su
2026-09-28 22:36       ` Dave Jiang

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