From: Anisa Su <anisa.su887@gmail.com>
To: Dave Jiang <dave.jiang@intel.com>
Cc: Jonathan Cameron <jic23@kernel.org>,
Anisa Su <anisa.su887@gmail.com>,
linux-cxl@vger.kernel.org,
Alison Schofield <alison.schofield@intel.com>,
Davidlohr Bueso <dave@stgolabs.net>,
Li Ming <ming.li@zohomail.com>, Gregory Price <gourry@gourry.net>,
Richard Cheng <icheng@nvidia.com>,
Ben Cheatham <benjamin.cheatham@amd.com>,
Ira Weiny <iweiny@kernel.org>, Wonjae Lee <wj28.lee@samsung.com>,
Junhee Park <jh9934.park@samsung.com>,
Heesoo Kim <habil.kim@samsung.com>
Subject: Re: [PATCH v14 6/8] cxl/mem: Configure dynamic capacity interrupts
Date: Tue, 22 Sep 2026 14:22:47 -0700 [thread overview]
Message-ID: <arLxp9mx-IPNCPQq@4470NRD-ASU.ssi.samsung.com> (raw)
In-Reply-To: <a26d002f-1dcf-4bf4-bfd5-dd587c559029@intel.com>
On Mon, Sep 21, 2026 at 05:45:56PM -0700, Dave Jiang wrote:
>
>
> On 9/21/26 4:42 PM, Jonathan Cameron wrote:
> >
> >>> diff --git a/tools/testing/cxl/test/mem.c b/tools/testing/cxl/test/mem.c
> >>> index 7b756000a1a6..6ef47265da10 100644
> >>> --- a/tools/testing/cxl/test/mem.c
> >>> +++ b/tools/testing/cxl/test/mem.c
> >>> @@ -1818,7 +1818,10 @@ static int cxl_mock_mem_probe(struct platform_device *pdev)
> >>> if (rc)
> >>> dev_dbg(dev, "No CXL FWCTL setup\n");
> >>>
> >>> - cxl_mem_get_event_records(mds, CXLDEV_EVENT_STATUS_ALL);
> >>> + cxl_mem_get_event_records(mds, CXLDEV_EVENT_STATUS_INFO |
> >>> + CXLDEV_EVENT_STATUS_WARN |
> >>> + CXLDEV_EVENT_STATUS_FAIL |
> >>> + CXLDEV_EVENT_STATUS_FATAL);
> >>
> >> Second time I'm seeing this constructed mask being used in this commit. Maybe create a define for it?
> >>
> >> s/CXLDEV_EVENT_STATUS_ALL/CXLDEV_EVENT_STATUS_BASE/ perhaps?
> >
> > That was Anisa acting on my feedbakc on previous.
> > I don't like _ALL because we already have an example of the spec
> > expanding and the definition becoming messy. But mainly I was
> > pushing back against _ALL + masking with one element we didn't
> > want as fragile. So I'm not against _ALL if it is made up of
> > another define + DCD (for now) and that other define can be
> > used in places like this.
> >
> > Bikeshed time... BASE is usually a define for a reg address and it is
> > is hard to come up with a name for that when it is a mixture of
> > RAS stuff and INFO which can be a wide range of random nasty
> > and nice things.
> >
> > So with the right name seems fine to have what Dave suggests.
> > I'm just not sure what that name is! Hence I'd just stick
> > to the long hand option.
>
> Yeah if we can't come up with anything good then leave it as is.
>
CXLDEV_EVENT_STATUS_STANDARD_LOGS...? And just add a comment kind of explaining
what "standard" means:
/* Logs whose ownership follows native_cxl_error; the DCD log is always OS owned */
#define CXLDEV_EVENT_STATUS_STANDARD_LOGS (CXLDEV_EVENT_STATUS_INFO | \
CXLDEV_EVENT_STATUS_WARN | \
CXLDEV_EVENT_STATUS_FAIL | \
CXLDEV_EVENT_STATUS_FATAL)
That's all I can come up with.
- Anisa
> >
> > Jonathan
> >
> >>
> >>> cxl_mock_test_feat_init(mdata);
> >>>
> >>> return 0;
> >>
> >>
> >
>
next prev parent reply other threads:[~2026-09-22 21:22 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-18 20:30 [PATCH v14 0/8] DCD Prep Series Anisa Su
2026-09-18 20:30 ` [PATCH v14 1/8] cxl/mbox: Flag support for Dynamic Capacity Devices (DCD) Anisa Su
2026-09-18 20:30 ` [PATCH v14 2/8] cxl/mem: Read dynamic capacity configuration from the device Anisa Su
2026-09-18 20:44 ` sashiko-bot
2026-09-18 22:59 ` Anisa Su
2026-09-21 21:50 ` Dave Jiang
2026-09-21 23:19 ` Jonathan Cameron
2026-09-22 3:44 ` Richard Cheng
2026-09-24 0:55 ` Jonathan Cameron
2026-09-24 7:01 ` Anisa Su
2026-09-18 20:30 ` [PATCH v14 3/8] cxl/cdat: Gather DSMAS data for DCD partitions Anisa Su
2026-09-21 21:55 ` Dave Jiang
2026-09-24 5:12 ` Anisa Su
2026-09-21 23:27 ` Jonathan Cameron
2026-09-24 5:01 ` Anisa Su
2026-09-22 3:53 ` Richard Cheng
2026-09-22 17:08 ` Dave Jiang
2026-09-22 21:15 ` Anisa Su
2026-09-22 23:05 ` Dave Jiang
2026-09-23 0:05 ` Anisa Su
2026-09-23 15:35 ` Dave Jiang
2026-09-24 4:58 ` Anisa Su
2026-09-18 20:30 ` [PATCH v14 4/8] cxl/events: Split event msgnum configuration from irq setup Anisa Su
2026-09-22 5:35 ` Richard Cheng
2026-09-18 20:30 ` [PATCH v14 5/8] cxl/pci: Factor out interrupt policy check Anisa Su
2026-09-22 5:37 ` Richard Cheng
2026-09-18 20:30 ` [PATCH v14 6/8] cxl/mem: Configure dynamic capacity interrupts Anisa Su
2026-09-18 20:43 ` sashiko-bot
2026-09-18 23:38 ` Anisa Su
2026-09-21 22:00 ` Dave Jiang
2026-09-21 23:42 ` Jonathan Cameron
2026-09-22 0:45 ` Dave Jiang
2026-09-22 21:22 ` Anisa Su [this message]
2026-09-24 0:58 ` Jonathan Cameron
2026-09-22 5:48 ` Richard Cheng
2026-09-22 9:15 ` Richard Cheng
2026-09-18 20:30 ` [PATCH v14 7/8] cxl/core: Enforce partition order/simplify partition calls Anisa Su
2026-09-18 20:30 ` [PATCH v14 8/8] Documentation/cxl: Document DPA partition layout and ordering rules Anisa Su
2026-09-21 22:02 ` Dave Jiang
2026-09-28 21:53 ` Anisa Su
2026-09-28 22:36 ` Dave Jiang
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