From: "Maulik Shah (mkshah)" <maulik.shah@oss.qualcomm.com>
To: Val Packett <val@packett.cool>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Thomas Gleixner <tglx@kernel.org>,
Linus Walleij <linusw@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-gpio@vger.kernel.org,
Sneh Mankad <sneh.mankad@oss.qualcomm.com>
Subject: Re: [PATCH v3 3/8] irqchip/qcom-pdc: Remove pdc_enable_intr() wrapper
Date: Tue, 30 Jun 2026 09:22:38 +0530 [thread overview]
Message-ID: <03b6afe0-937b-42ac-80f5-a1cbce0ed341@oss.qualcomm.com> (raw)
In-Reply-To: <5e59c3a3-b492-40f0-9db1-5ef9f95d77b6@packett.cool>
On 6/28/2026 11:24 PM, Val Packett wrote:
>
> On 6/16/26 6:25 AM, Maulik Shah wrote:
[...]
> whoops..
>
> [ 0.197090] BUG: spinlock bad magic on CPU#7, swapper/0/1
> [ 0.197104] lock: 0xffff0001022e37b0, .magic: 00000000, .owner: <none>/-1, .owner_cpu: 0
> [ 0.197122] CPU: 7 UID: 0 PID: 1 Comm: swapper/0 Not tainted 7.1.0-next-20260626-uwu+ #128 PREEMPT(full)
> [ 0.197129] Hardware name: motorola Motorola Edge 30 (Tianma)/Motorola Edge 30 (Tianma), BIOS 2026.07-rc2-g432bcf301c03-dirty 07/01/2026
> [ 0.197133] Call trace:
> [ 0.197135] show_stack+0x24/0x38 (C)
> [ 0.197148] __dump_stack+0x28/0x38
> [ 0.197156] dump_stack_lvl+0x7c/0xa8
> [ 0.197165] dump_stack+0x18/0x30
> [ 0.197172] spin_dump+0x7c/0x98
> [ 0.197179] do_raw_spin_lock+0xa4/0x140
> [ 0.197189] _raw_spin_lock+0x2c/0x40
> [ 0.197195] pdc_enable_intr_bank+0x40/0x128
> [ 0.197201] qcom_pdc_probe+0x3bc/0x520
>
> Gotta also move the spinlock init to before the call to pdc_setup_pin_mapping..
Yes, Moving spinlock will be added in v4 of series.
Thanks,
Maulik
next prev parent reply other threads:[~2026-06-30 3:52 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-16 9:25 [PATCH v3 0/8] x1e80100: Enable PDC wake GPIOs and deepest idle state Maulik Shah
2026-06-16 9:25 ` [PATCH v3 1/8] irqchip/qcom-pdc: restructure version support Maulik Shah
2026-06-17 13:12 ` Konrad Dybcio
2026-06-25 9:19 ` Maulik Shah (mkshah)
2026-06-30 14:38 ` Thomas Gleixner
2026-07-03 8:18 ` Maulik Shah (mkshah)
2026-06-16 9:25 ` [PATCH v3 2/8] irqchip/qcom-pdc: Move all statics to struct pdc_desc Maulik Shah
2026-06-17 13:26 ` Konrad Dybcio
2026-06-25 9:19 ` Maulik Shah (mkshah)
2026-06-29 9:56 ` Konrad Dybcio
2026-06-30 14:46 ` Thomas Gleixner
2026-07-03 8:46 ` Maulik Shah (mkshah)
2026-06-16 9:25 ` [PATCH v3 3/8] irqchip/qcom-pdc: Remove pdc_enable_intr() wrapper Maulik Shah
2026-06-16 9:36 ` sashiko-bot
2026-06-28 17:54 ` Val Packett
2026-06-30 3:52 ` Maulik Shah (mkshah) [this message]
2026-06-16 9:25 ` [PATCH v3 4/8] irqchip/qcom-pdc: Differentiate between direct SPI and GPIO as SPI Maulik Shah
2026-06-18 8:02 ` Konrad Dybcio
2026-06-25 9:20 ` Maulik Shah (mkshah)
2026-06-30 14:57 ` Thomas Gleixner
2026-07-03 8:17 ` Maulik Shah (mkshah)
2026-06-16 9:25 ` [PATCH v3 5/8] irqchip/qcom-pdc: Configure PDC to pass through mode Maulik Shah
2026-06-16 9:43 ` sashiko-bot
2026-06-18 8:18 ` Konrad Dybcio
2026-06-25 9:24 ` Maulik Shah (mkshah)
2026-06-18 8:19 ` Konrad Dybcio
2026-06-25 9:25 ` Maulik Shah (mkshah)
2026-06-30 15:07 ` Thomas Gleixner
2026-06-30 15:09 ` Thomas Gleixner
2026-07-03 9:20 ` Maulik Shah (mkshah)
2026-06-16 9:25 ` [PATCH v3 6/8] pinctrl: qcom: Acknowledge IRQs for PDC interrupt controller Maulik Shah
2026-06-16 9:45 ` sashiko-bot
2026-06-16 9:25 ` [PATCH v3 7/8] Revert "pinctrl: qcom: x1e80100: Bypass PDC wakeup parent for now" Maulik Shah
2026-06-16 9:25 ` [PATCH v3 8/8] arm64: dts: qcom: x1e80100: Add deepest idle state Maulik Shah
2026-06-18 8:25 ` Konrad Dybcio
2026-07-07 6:45 ` Maulik Shah (mkshah)
2026-06-28 18:39 ` [PATCH v3 0/8] x1e80100: Enable PDC wake GPIOs and " Val Packett
2026-06-29 9:54 ` Konrad Dybcio
2026-07-03 9:30 ` Maulik Shah (mkshah)
2026-06-30 11:42 ` Linus Walleij
2026-06-30 14:34 ` Thomas Gleixner
2026-07-01 7:35 ` Bartosz Golaszewski
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