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From: Conor Dooley <conor@kernel.org>
To: dongxuyang@eswincomputing.com
Cc: ukleinek@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
	conor+dt@kernel.org, ben-linux@fluff.org,
	ben.dooks@codethink.co.uk, p.zabel@pengutronix.de,
	linux-pwm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, ningyu@eswincomputing.com,
	linmin@eswincomputing.com, xuxiang@eswincomputing.com,
	wangguosheng@eswincomputing.com, pinkesh.vaghela@einfochips.com
Subject: Re: [PATCH v6 1/2] dt-bindings: pwm: dwc: add optional reset
Date: Fri, 24 Apr 2026 18:03:19 +0100	[thread overview]
Message-ID: <20260424-these-ozone-687a8ddfb009@spud> (raw)
In-Reply-To: <20260424095435.1721-1-dongxuyang@eswincomputing.com>

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On Fri, Apr 24, 2026 at 05:54:35PM +0800, dongxuyang@eswincomputing.com wrote:
> From: Xuyang Dong <dongxuyang@eswincomputing.com>
> 
> The DesignWare PWM includes separate reset signals dedicated to each clock
> domain:
> The presetn signal resets logic in pclk domain.
> The timer_N_resetn signal resets logic in the timer_N_clk domain.
> The resets are active-low.
> 
> EIC7700 use DesignWare IP for PWM controllers. Add ESWIN EIC7700 support
>  in snps,dw-apb-timers-pwm2.yaml
> 
> Signed-off-by: Xuyang Dong <dongxuyang@eswincomputing.com>

Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable

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  reply	other threads:[~2026-04-24 17:03 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-24  9:45 [PATCH v6 0/2] Update designware pwm driver dongxuyang
2026-04-24  9:54 ` [PATCH v6 1/2] dt-bindings: pwm: dwc: add optional reset dongxuyang
2026-04-24 17:03   ` Conor Dooley [this message]
2026-04-24  9:57 ` [PATCH v6 2/2] pwm: dwc: add of/platform support dongxuyang

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