[PATCH 0/2] arm64: qcom: add Ayaneo Pocket DS gaming console

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* [PATCH 0/2] arm64: qcom: add Ayaneo Pocket DS gaming console
@ 2026-05-10 16:05 Alexandre Hamamdjian via B4 Relay
  2026-05-10 16:05 ` [PATCH 1/2] dt-bindings: arm: qcom: document the Ayaneo Pocket DS Alexandre Hamamdjian via B4 Relay
  2026-05-10 16:05 ` [PATCH 2/2] arm64: dts: qcom: add basic devicetree for Ayaneo Pocket DS gaming console Alexandre Hamamdjian via B4 Relay
  0 siblings, 2 replies; 8+ messages in thread
From: Alexandre Hamamdjian via B4 Relay @ 2026-05-10 16:05 UTC (permalink / raw)
  To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
	Conor Dooley
  Cc: linux-arm-msm, devicetree, linux-kernel, Alexandre Hamamdjian,
	Teguh Sobirin

This series adds initial support for the Ayaneo Pocket DS, a handheld
gaming console built around the Qualcomm QCS8550 SoC.

This introduces the device tree itself, split into:
- qcs8550-ayaneo-pocket-common.dtsi: shared QCS8550 board base
  intended to be reused by future siblings in the same family.
- qcs8550-ayaneo-pocketds.dts: This device's DTS

Only the basics are wired up at this stage (boot to console, core
peripherals enabled in the common dtsi); additional functionality
will follow in later submissions.

Signed-off-by: Alexandre Hamamdjian <azkali.limited@gmail.com>
---
Teguh Sobirin (2):
      dt-bindings: arm: qcom: document the Ayaneo Pocket DS
      arm64: dts: qcom: add basic devicetree for Ayaneo Pocket DS gaming console

 Documentation/devicetree/bindings/arm/qcom.yaml    |    6 +
 arch/arm64/boot/dts/qcom/Makefile                  |    1 +
 .../dts/qcom/qcs8550-ayaneo-pocket-common.dtsi     | 1596 ++++++++++++++++++++
 .../boot/dts/qcom/qcs8550-ayaneo-pocketds.dts      |  170 +++
 4 files changed, 1773 insertions(+)
---
base-commit: e98d21c170b01ddef366f023bbfcf6b31509fa83
change-id: 20260510-pocketds-e0e7b99cf369

Best regards,
--  
Alexandre Hamamdjian <azkali.limited@gmail.com>



^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH 1/2] dt-bindings: arm: qcom: document the Ayaneo Pocket DS
  2026-05-10 16:05 [PATCH 0/2] arm64: qcom: add Ayaneo Pocket DS gaming console Alexandre Hamamdjian via B4 Relay
@ 2026-05-10 16:05 ` Alexandre Hamamdjian via B4 Relay
  2026-05-11 21:26   ` sashiko-bot
  2026-05-10 16:05 ` [PATCH 2/2] arm64: dts: qcom: add basic devicetree for Ayaneo Pocket DS gaming console Alexandre Hamamdjian via B4 Relay
  1 sibling, 1 reply; 8+ messages in thread
From: Alexandre Hamamdjian via B4 Relay @ 2026-05-10 16:05 UTC (permalink / raw)
  To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
	Conor Dooley
  Cc: linux-arm-msm, devicetree, linux-kernel, Alexandre Hamamdjian,
	Teguh Sobirin

From: Teguh Sobirin <teguh@sobir.in>

Document the Qualcomm QCS8550 based Ayaneo Pocket DS gaming console.

Co-developed-by: Alexandre Hamamdjian <azkali.limited@gmail.com>
Signed-off-by: Alexandre Hamamdjian <azkali.limited@gmail.com>
Signed-off-by: Teguh Sobirin <teguh@sobir.in>
---
 Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
index 2741c07e9f41..f130a6b092b9 100644
--- a/Documentation/devicetree/bindings/arm/qcom.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom.yaml
@@ -1107,6 +1107,12 @@ properties:
           - const: qcom,qcs8550
           - const: qcom,sm8550
 
+      - items:
+          - enum:
+              - ayaneo,pocketds
+          - const: qcom,qcs8550
+          - const: qcom,sm8550
+
       - items:
           - enum:
               - ayaneo,pocket-s2

-- 
2.54.0



^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [PATCH 2/2] arm64: dts: qcom: add basic devicetree for Ayaneo Pocket DS gaming console
  2026-05-10 16:05 [PATCH 0/2] arm64: qcom: add Ayaneo Pocket DS gaming console Alexandre Hamamdjian via B4 Relay
  2026-05-10 16:05 ` [PATCH 1/2] dt-bindings: arm: qcom: document the Ayaneo Pocket DS Alexandre Hamamdjian via B4 Relay
@ 2026-05-10 16:05 ` Alexandre Hamamdjian via B4 Relay
  2026-05-11  8:19   ` Neil Armstrong
                     ` (2 more replies)
  1 sibling, 3 replies; 8+ messages in thread
From: Alexandre Hamamdjian via B4 Relay @ 2026-05-10 16:05 UTC (permalink / raw)
  To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
	Conor Dooley
  Cc: linux-arm-msm, devicetree, linux-kernel, Alexandre Hamamdjian,
	Teguh Sobirin

From: Teguh Sobirin <teguh@sobir.in>

Add initial device tree support for the Ayaneo Pocket DS gaming
console based on the Qualcomm QCS8550 platform.

The board file is split into qcs8550-ayaneo-pocket-common.dtsi and
qcs8550-ayaneo-pocketds.dts in anticipation of additional boards in
the same family that share the QCS8550 base. Only the Pocket DS has
been verified on hardware so far; the shared dtsi is intended to pick
up sibling boards as they are submitted.

Co-developed-by: Alexandre Hamamdjian <azkali.limited@gmail.com>
Signed-off-by: Alexandre Hamamdjian <azkali.limited@gmail.com>
Signed-off-by: Teguh Sobirin <teguh@sobir.in>
---
 arch/arm64/boot/dts/qcom/Makefile                  |    1 +
 .../dts/qcom/qcs8550-ayaneo-pocket-common.dtsi     | 1596 ++++++++++++++++++++
 .../boot/dts/qcom/qcs8550-ayaneo-pocketds.dts      |  170 +++
 3 files changed, 1767 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index cc42829f92eb..45859e977bc9 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -185,6 +185,7 @@ qcs8300-ride-el2-dtbs := qcs8300-ride.dtb monaco-el2.dtbo
 
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs8300-ride-el2.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs8550-aim300-aiot.dtb
+dtb-$(CONFIG_ARCH_QCOM)	+= qcs8550-ayaneo-pocketds.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs9100-ride.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs9100-ride-r3.dtb
 
diff --git a/arch/arm64/boot/dts/qcom/qcs8550-ayaneo-pocket-common.dtsi b/arch/arm64/boot/dts/qcom/qcs8550-ayaneo-pocket-common.dtsi
new file mode 100644
index 000000000000..8d215a9d31d5
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/qcs8550-ayaneo-pocket-common.dtsi
@@ -0,0 +1,1596 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2025, Teguh Sobirin.
+ */
+
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
+#include "qcs8550.dtsi"
+#include "pm8550.dtsi"
+#include "pm8550b.dtsi"
+#define PMK8550VE_SID 5
+#include "pm8550ve.dtsi"
+#include "pm8550vs.dtsi"
+#include "pmk8550.dtsi"
+
+/delete-node/ &aop_image_mem;
+/delete-node/ &aop_config_mem;
+/delete-node/ &camera_mem;
+/delete-node/ &ipa_fw_mem;
+/delete-node/ &ipa_gsi_mem;
+/delete-node/ &mpss_dsm_mem;
+/delete-node/ &mpss_mem;
+/delete-node/ &q6_mpss_dtb_mem;
+/delete-node/ &cdsp_mem;
+/delete-node/ &q6_cdsp_dtb_mem;
+
+/delete-node/ &remoteproc_mpss;
+/delete-node/ &remoteproc_cdsp;
+
+/ {
+	chassis-type = "handset";
+
+	aliases {
+		serial0 = &uart7;
+		serial1 = &uart14;
+		hsuart0 = &uart11;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+
+		pinctrl-0 = <&volume_up_n>;
+		pinctrl-names = "default";
+
+		key-volume-up {
+			label = "Volume Up";
+			debounce-interval = <15>;
+			gpios = <&pm8550_gpios 6 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_VOLUMEUP>;
+			linux,can-disable;
+			wakeup-source;
+		};
+	};
+
+	pmic-glink {
+		compatible = "qcom,sm8550-pmic-glink", "qcom,pmic-glink";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		orientation-gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
+
+		connector@0 {
+			compatible = "usb-c-connector";
+			reg = <0>;
+			power-role = "dual";
+			data-role = "dual";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+
+					pmic_glink_hs_in: endpoint {
+						remote-endpoint = <&usb_1_dwc3_hs>;
+					};
+				};
+
+				port@1 {
+					reg = <1>;
+
+					pmic_glink_ss_in: endpoint {
+						remote-endpoint = <&redriver_ss_out>;
+					};
+				};
+			};
+		};
+	};
+
+	reserved-memory {
+		hyp_mem: hyp-region@80000000 {
+			reg = <0 0x80000000 0 0xa00000>;
+			no-map;
+		};
+
+		cpusys_vm_mem: cpusys-vm-region@80a00000 {
+			reg = <0 0x80a00000 0 0x400000>;
+			no-map;
+		};
+
+		hyp_tags_mem: hyp-tags-region@80e00000 {
+			reg = <0 0x80e00000 0 0x3d0000>;
+			no-map;
+		};
+
+		xbl_sc_mem: xbl-sc-region@d8100000 {
+			reg = <0 0xd8100000 0 0x40000>;
+			no-map;
+		};
+
+		hyp_tags_reserved_mem: hyp-tags-reserved-region@811d0000 {
+			reg = <0 0x811d0000 0 0x30000>;
+			no-map;
+		};
+
+		xbl_dt_log_merged_mem: xbl-dt-log-merged-region@81a00000 {
+			reg = <0 0x81a00000 0 0x260000>;
+			no-map;
+		};
+
+		aop_config_merged_mem: aop-config-merged-region@81c80000 {
+			reg = <0 0x81c80000 0 0x74000>;
+			no-map;
+		};
+
+		chipinfo_mem: chipinfo-region@81cf4000 {
+			reg = <0 0x81cf4000 0 0x1000>;
+			no-map;
+		};
+
+		global_sync_mem: global-sync-region@82600000 {
+			reg = <0 0x82600000 0 0x100000>;
+			no-map;
+		};
+
+		tz_stat_mem: tz-stat-region@82700000 {
+			reg = <0 0x82700000 0 0x100000>;
+			no-map;
+		};
+
+		cpucp_fw_mem: cpucp-fw-region@d8140000 {
+			reg = <0 0xd8140000 0 0x1c0000>;
+			no-map;
+		};
+
+		qtee_mem: qtee-region@d8300000 {
+			reg = <0 0xd8300000 0 0x500000>;
+			no-map;
+		};
+
+		hwfence_shbuf: hwfence-shbuf-region@e6440000 {
+			reg = <0 0xe6440000 0 0x2dd000>;
+			no-map;
+		};
+
+		hyp_ext_reserved_mem: hyp-ext-reserved-region@ff700000 {
+			reg = <0 0xff700000 0 0x100000>;
+			no-map;
+		};
+
+		llcc_lpi_mem: llcc_lpi_region@ff800000 {
+			reg = <0 0xff800000 0 0x600000>;
+			no-map;
+		};
+
+		hyp_ext_tags_mem: hyp-ext-tags-region@fce00000 {
+			reg = <0 0xfce00000 0 0x2900000>;
+			no-map;
+		};
+
+		splash_region: splash_region@b8000000 {
+			reg = <0x0 0xb8000000 0x0 0x2b00000>;
+			label = "cont_splash_region";
+			no-map;
+		};
+	};
+
+	sound {
+		status = "okay";
+		compatible = "qcom,sm8550-sndcard", "qcom,sm8450-sndcard";
+		model = "SM8550-APS";
+		audio-routing = "SpkrLeft IN", "WSA_SPK1 OUT",
+				"SpkrRight IN", "WSA_SPK2 OUT",
+				"VA DMIC0", "vdd-micb",
+				"VA DMIC1", "vdd-micb";
+
+		wsa-dai-link {
+			link-name = "WSA Playback";
+
+			cpu {
+				sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>;
+			};
+
+			codec {
+				sound-dai = <&spk_amp_l>,
+					<&spk_amp_r>,
+					<&swr0 0>,
+					<&lpass_wsamacro 0>;
+			};
+
+			platform {
+				sound-dai = <&q6apm>;
+			};
+		};
+
+		va-dai-link {
+			link-name = "VA Capture";
+
+			cpu {
+				sound-dai = <&q6apmbedai VA_CODEC_DMA_TX_0>;
+			};
+
+			codec {
+				sound-dai = <&lpass_vamacro 0>;
+			};
+
+			platform {
+				sound-dai = <&q6apm>;
+			};
+		};
+	};
+
+	thermal-zones {
+		cpuss0-thermal {
+			polling-delay = <200>;
+			trips {
+				cpuss0_fan0: trip-point2 {
+					temperature = <40000>;
+					hysteresis = <3000>;
+					type = "passive";
+					};
+				cpuss0_fan1: trip-point3 {
+					temperature = <50000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				cpuss0_fan2: trip-point4 {
+					temperature = <60000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				cpuss0_fan3: trip-point5 {
+					temperature = <65000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				cpuss0_fan4: trip-point6 {
+					temperature = <70000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				cpuss0_fan5: trip-point7 {
+					temperature = <75000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				cpuss0_fan6: trip-point8 {
+					temperature = <80000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+			};
+
+		};
+		cpuss1-thermal {
+			polling-delay = <200>;
+			trips {
+				cpuss1_fan0: trip-point2 {
+					temperature = <40000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				cpuss1_fan1: trip-point3 {
+					temperature = <50000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				cpuss1_fan2: trip-point4 {
+					temperature = <60000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				cpuss1_fan3: trip-point5 {
+					temperature = <65000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				cpuss1_fan4: trip-point6 {
+					temperature = <70000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				cpuss1_fan5: trip-point7 {
+					temperature = <75000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				cpuss1_fan6: trip-point8 {
+					temperature = <80000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+			};
+
+		};
+		cpuss2-thermal {
+			polling-delay = <200>;
+			trips {
+				cpuss2_fan0: trip-point2 {
+					temperature = <40000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				cpuss2_fan1: trip-point3 {
+					temperature = <50000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				cpuss2_fan2: trip-point4 {
+					temperature = <60000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				cpuss2_fan3: trip-point5 {
+					temperature = <65000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				cpuss2_fan4: trip-point6 {
+					temperature = <70000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				cpuss2_fan5: trip-point7 {
+					temperature = <75000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				cpuss2_fan6: trip-point8 {
+					temperature = <80000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+			};
+
+		};
+		cpuss3-thermal {
+			polling-delay = <200>;
+			trips {
+				cpuss3_fan0: trip-point2 {
+					temperature = <40000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				cpuss3_fan1: trip-point3 {
+					temperature = <50000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				cpuss3_fan2: trip-point4 {
+					temperature = <60000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				cpuss3_fan3: trip-point5 {
+					temperature = <65000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				cpuss3_fan4: trip-point6 {
+					temperature = <70000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				cpuss3_fan5: trip-point7 {
+					temperature = <75000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				cpuss3_fan6: trip-point8 {
+					temperature = <80000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+			};
+
+		};
+		cpu7-top-thermal {
+			polling-delay = <200>;
+			trips {
+				cpu7_top_fan0: trip-point2 {
+					temperature = <70000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				cpu7_top_fan1: trip-point3 {
+					temperature = <75000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				cpu7_top_fan2: trip-point4 {
+					temperature = <80000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+			};
+
+		};
+		gpuss-0-thermal {
+			polling-delay = <200>;
+			trips {
+				gpuss0_fan0: trip-point3 {
+					temperature = <70000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				gpuss0_fan1: trip-point4 {
+					temperature = <75000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				gpuss0_fan2: trip-point5 {
+					temperature = <80000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+			};
+
+		};
+		gpuss-1-thermal {
+			polling-delay = <200>;
+			trips {
+				gpuss1_fan0: trip-point3 {
+					temperature = <70000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				gpuss1_fan1: trip-point4 {
+					temperature = <75000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				gpuss1_fan2: trip-point5 {
+					temperature = <80000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+			};
+
+		};
+		gpuss-2-thermal {
+			polling-delay = <200>;
+			trips {
+				gpuss2_fan0: trip-point3 {
+					temperature = <70000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				gpuss2_fan1: trip-point4 {
+					temperature = <75000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				gpuss2_fan2: trip-point5 {
+					temperature = <80000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+			};
+
+		};
+		gpuss-3-thermal {
+			polling-delay = <200>;
+			trips {
+				gpuss3_fan0: trip-point3 {
+					temperature = <70000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				gpuss3_fan1: trip-point4 {
+					temperature = <75000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				gpuss3_fan2: trip-point5 {
+					temperature = <80000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+			};
+
+		};
+		gpuss-4-thermal {
+			polling-delay = <200>;
+			trips {
+				gpuss4_fan0: trip-point3 {
+					temperature = <70000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				gpuss4_fan1: trip-point4 {
+					temperature = <75000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				gpuss4_fan2: trip-point5 {
+					temperature = <80000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+			};
+
+		};
+		gpuss-5-thermal {
+			polling-delay = <200>;
+			trips {
+				gpuss5_fan0: trip-point3 {
+					temperature = <70000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				gpuss5_fan1: trip-point4 {
+					temperature = <75000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				gpuss5_fan2: trip-point5 {
+					temperature = <80000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+			};
+
+		};
+		gpuss-6-thermal {
+			polling-delay = <200>;
+			trips {
+				gpuss6_fan0: trip-point3 {
+					temperature = <70000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				gpuss6_fan1: trip-point4 {
+					temperature = <75000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				gpuss6_fan2: trip-point5 {
+					temperature = <80000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+			};
+
+		};
+		gpuss-7-thermal {
+			polling-delay = <200>;
+			trips {
+				gpuss7_fan0: trip-point3 {
+					temperature = <70000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				gpuss7_fan1: trip-point4 {
+					temperature = <75000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+				gpuss7_fan2: trip-point5 {
+					temperature = <80000>;
+					hysteresis = <3000>;
+					type = "passive";
+				};
+			};
+
+		};
+	};
+
+	vdd_fan_5v0: vdd-fan-5v0-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd_fan_5v0";
+
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+
+		gpio = <&tlmm 31 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&fan_pwr_active>;
+
+		regulator-state-mem {
+			regulator-off-in-suspend;
+		};
+	};
+
+	vph_pwr: regulator-vph-pwr {
+		compatible = "regulator-fixed";
+		regulator-name = "  vph_pwr";
+		regulator-min-microvolt = <3700000>;
+		regulator-max-microvolt = <3700000>;
+
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
+	pwm_fan: pwm-fan {
+		compatible = "pwm-fan";
+
+		pinctrl-names = "default", "sleep";
+		pinctrl-0 = <&fan_pwm_active>, <&fan_int>;
+
+		fan-supply = <&vdd_fan_5v0>;
+		pwms = <&pm8550_pwm 3 40000>;
+		interrupt-parent = <&tlmm>;
+		interrupts = <64 IRQ_TYPE_EDGE_FALLING>;
+
+		#cooling-cells = <2>;
+		cooling-levels = <0 30 45 60 70 90 120 150>;
+	};
+
+	wcn7850-pmu {
+		compatible = "qcom,wcn7850-pmu";
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&wlan_en>, <&bt_default>, <&pmk8550_sleep_clk>;
+
+		wlan-enable-gpios = <&tlmm 80 GPIO_ACTIVE_HIGH>;
+		bt-enable-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>;
+
+		vdd-supply = <&vreg_s5g_0p85>;
+		vddio-supply = <&vreg_l15b_1p8>;
+		vddaon-supply = <&vreg_s2g_0p85>;
+		vdddig-supply = <&vreg_s4e_0p95>;
+		vddrfa1p2-supply = <&vreg_s4g_1p25>;
+		vddrfa1p8-supply = <&vreg_s6g_1p86>;
+
+		regulators {
+			vreg_pmu_rfa_cmn: ldo0 {
+				regulator-name = "vreg_pmu_rfa_cmn";
+			};
+
+			vreg_pmu_aon_0p59: ldo1 {
+				regulator-name = "vreg_pmu_aon_0p59";
+			};
+
+			vreg_pmu_wlcx_0p8: ldo2 {
+				regulator-name = "vreg_pmu_wlcx_0p8";
+			};
+
+			vreg_pmu_wlmx_0p85: ldo3 {
+				regulator-name = "vreg_pmu_wlmx_0p85";
+			};
+
+			vreg_pmu_btcmx_0p85: ldo4 {
+				regulator-name = "vreg_pmu_btcmx_0p85";
+			};
+
+			vreg_pmu_rfa_0p8: ldo5 {
+				regulator-name = "vreg_pmu_rfa_0p8";
+			};
+
+			vreg_pmu_rfa_1p2: ldo6 {
+				regulator-name = "vreg_pmu_rfa_1p2";
+			};
+
+			vreg_pmu_rfa_1p8: ldo7 {
+				regulator-name = "vreg_pmu_rfa_1p8";
+			};
+
+			vreg_pmu_pcie_0p9: ldo8 {
+				regulator-name = "vreg_pmu_pcie_0p9";
+			};
+
+			vreg_pmu_pcie_1p8: ldo9 {
+				regulator-name = "vreg_pmu_pcie_1p8";
+			};
+		};
+	};
+};
+
+/* DMIC 01 23 */
+&lpass_vamacro {
+	pinctrl-0 = <&dmic01_default>, <&dmic23_default>;
+	pinctrl-names = "default";
+	vdd-micb-supply = <&vreg_l10b_1p8>;
+	qcom,dmic-sample-rate = <4800000>;
+};
+
+&apps_rsc {
+	regulators-0 {
+		compatible = "qcom,pm8550-rpmh-regulators";
+		qcom,pmic-id = "b";
+
+		vdd-bob1-supply = <&vph_pwr>;
+		vdd-bob2-supply = <&vph_pwr>;
+		vdd-l1-l4-l10-supply = <&vreg_s6g_1p86>;
+		vdd-l2-l13-l14-supply = <&vreg_bob1>;
+		vdd-l3-supply = <&vreg_s4g_1p25>;
+		vdd-l5-l16-supply = <&vreg_bob1>;
+		vdd-l6-l7-supply = <&vreg_bob1>;
+		vdd-l8-l9-supply = <&vreg_bob1>;
+		vdd-l11-supply = <&vreg_s4g_1p25>;
+		vdd-l12-supply = <&vreg_s6g_1p86>;
+		vdd-l15-supply = <&vreg_s6g_1p86>;
+		vdd-l17-supply = <&vreg_bob2>;
+
+		vreg_bob1: bob1 {
+			regulator-name = "vreg_bob1";
+			regulator-min-microvolt = <3296000>;
+			regulator-max-microvolt = <3960000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_bob2: bob2 {
+			regulator-name = "vreg_bob2";
+			regulator-min-microvolt = <2720000>;
+			regulator-max-microvolt = <3960000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l2b_3p0: ldo2 {
+			regulator-name = "vreg_l2b_3p0";
+			regulator-min-microvolt = <3008000>;
+			regulator-max-microvolt = <3008000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l5b_3p1: ldo5 {
+			regulator-name = "vreg_l5b_3p1";
+			regulator-min-microvolt = <3104000>;
+			regulator-max-microvolt = <3104000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l6b_1p8: ldo6 {
+			regulator-name = "vreg_l6b_1p8";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <3008000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l7b_1p8: ldo7 {
+			regulator-name = "vreg_l7b_1p8";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <3008000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l8b_1p8: ldo8 {
+			regulator-name = "vreg_l8b_1p8";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <3008000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l9b_2p9: ldo9 {
+			regulator-name = "vreg_l9b_2p9";
+			regulator-min-microvolt = <2960000>;
+			regulator-max-microvolt = <3008000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l10b_1p8: ldo10 {
+			regulator-name = "vreg_l10b_1p8";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l11b_1p2: ldo11 {
+			regulator-name = "vreg_l11b_1p2";
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1504000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l12b_1p8: ldo12 {
+			regulator-name = "vreg_l12b_1p8";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l13b_3p0: ldo13 {
+			regulator-name = "vreg_l13b_3p0";
+			regulator-min-microvolt = <3000000>;
+			regulator-max-microvolt = <3000000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l14b_3p2: ldo14 {
+			regulator-name = "vreg_l14b_3p2";
+			regulator-min-microvolt = <3200000>;
+			regulator-max-microvolt = <3200000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l15b_1p8: ldo15 {
+			regulator-name = "vreg_l15b_1p8";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l16b_2p8: ldo16 {
+			regulator-name = "vreg_l16b_2p8";
+			regulator-min-microvolt = <2800000>;
+			regulator-max-microvolt = <2800000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l17b_2p5: ldo17 {
+			regulator-name = "vreg_l17b_2p5";
+			regulator-min-microvolt = <2504000>;
+			regulator-max-microvolt = <2504000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	regulators-1 {
+		compatible = "qcom,pm8550vs-rpmh-regulators";
+		qcom,pmic-id = "c";
+
+		vdd-l1-supply = <&vreg_s4g_1p25>;
+		vdd-l2-supply = <&vreg_s4e_0p95>;
+		vdd-l3-supply = <&vreg_s4e_0p95>;
+
+		vreg_l3c_0p9: ldo3 {
+			regulator-name = "vreg_l3c_0p9";
+			regulator-min-microvolt = <880000>;
+			regulator-max-microvolt = <912000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	regulators-2 {
+		compatible = "qcom,pm8550vs-rpmh-regulators";
+		qcom,pmic-id = "d";
+
+		vdd-l1-supply = <&vreg_s4e_0p95>;
+		vdd-l2-supply = <&vreg_s4e_0p95>;
+		vdd-l3-supply = <&vreg_s4e_0p95>;
+
+		vreg_l1d_0p88: ldo1 {
+			regulator-name = "vreg_l1d_0p88";
+			regulator-min-microvolt = <880000>;
+			regulator-max-microvolt = <920000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	regulators-3 {
+		compatible = "qcom,pm8550vs-rpmh-regulators";
+		qcom,pmic-id = "e";
+
+		vdd-l1-supply = <&vreg_s4e_0p95>;
+		vdd-l2-supply = <&vreg_s4e_0p95>;
+		vdd-l3-supply = <&vreg_s4g_1p25>;
+		vdd-s4-supply = <&vph_pwr>;
+		vdd-s5-supply = <&vph_pwr>;
+
+		vreg_s4e_0p95: smps4 {
+			regulator-name = "vreg_s4e_0p95";
+			regulator-min-microvolt = <904000>;
+			regulator-max-microvolt = <984000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_s5e_1p08: smps5 {
+			regulator-name = "vreg_s5e_1p08";
+			regulator-min-microvolt = <1010000>;
+			regulator-max-microvolt = <1120000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l1e_0p88: ldo1 {
+			regulator-name = "vreg_l1e_0p88";
+			regulator-min-microvolt = <880000>;
+			regulator-max-microvolt = <880000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l2e_0p9: ldo2 {
+			regulator-name = "vreg_l2e_0p9";
+			regulator-min-microvolt = <904000>;
+			regulator-max-microvolt = <970000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l3e_1p2: ldo3 {
+			regulator-name = "vreg_l3e_1p2";
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1200000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	regulators-4 {
+		compatible = "qcom,pm8550ve-rpmh-regulators";
+		qcom,pmic-id = "f";
+
+		vdd-l1-supply = <&vreg_s4e_0p95>;
+		vdd-l2-supply = <&vreg_s4e_0p95>;
+		vdd-l3-supply = <&vreg_s4e_0p95>;
+		vdd-s4-supply = <&vph_pwr>;
+
+		vreg_s4f_0p5: smps4 {
+			regulator-name = "vreg_s4f_0p5";
+			regulator-min-microvolt = <500000>;
+			regulator-max-microvolt = <700000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l1f_0p9: ldo1 {
+			regulator-name = "vreg_l1f_0p9";
+			regulator-min-microvolt = <912000>;
+			regulator-max-microvolt = <912000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l2f_0p88: ldo2 {
+			regulator-name = "vreg_l2f_0p88";
+			regulator-min-microvolt = <880000>;
+			regulator-max-microvolt = <912000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l3f_0p88: ldo3 {
+			regulator-name = "vreg_l3f_0p88";
+			regulator-min-microvolt = <880000>;
+			regulator-max-microvolt = <912000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	regulators-5 {
+		compatible = "qcom,pm8550vs-rpmh-regulators";
+		qcom,pmic-id = "g";
+		vdd-l1-supply = <&vreg_s4g_1p25>;
+		vdd-l2-supply = <&vreg_s4g_1p25>;
+		vdd-l3-supply = <&vreg_s4g_1p25>;
+		vdd-s1-supply = <&vph_pwr>;
+		vdd-s2-supply = <&vph_pwr>;
+		vdd-s3-supply = <&vph_pwr>;
+		vdd-s4-supply = <&vph_pwr>;
+		vdd-s5-supply = <&vph_pwr>;
+		vdd-s6-supply = <&vph_pwr>;
+
+		vreg_s1g_1p25: smps1 {
+			regulator-name = "vreg_s1g_1p25";
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1300000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_s2g_0p85: smps2 {
+			regulator-name = "vreg_s2g_0p85";
+			regulator-min-microvolt = <800000>;
+			regulator-max-microvolt = <1000000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_s3g_0p8: smps3 {
+			regulator-name = "vreg_s3g_0p8";
+			regulator-min-microvolt = <300000>;
+			regulator-max-microvolt = <1004000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_s4g_1p25: smps4 {
+			regulator-name = "vreg_s4g_1p25";
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1352000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_s5g_0p85: smps5 {
+			regulator-name = "vreg_s5g_0p85";
+			regulator-min-microvolt = <500000>;
+			regulator-max-microvolt = <1004000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_s6g_1p86: smps6 {
+			regulator-name = "vreg_s6g_1p86";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <2000000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l1g_1p2: ldo1 {
+			regulator-name = "vreg_l1g_1p2";
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1200000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l3g_1p2: ldo3 {
+			regulator-name = "vreg_l3g_1p2";
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1200000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+};
+
+&pm8550_gpios {
+	sdc2_card_det_n: sdc2-card-det-n-state {
+		pins = "gpio12";
+		function = "normal";
+		input-enable;
+		output-disable;
+		bias-pull-up;
+		power-source = <1>;
+	};
+
+	volume_up_n: volume-up-n-state {
+		pins = "gpio6";
+		function = "normal";
+		power-source = <1>;
+		bias-pull-up;
+		input-enable;
+	};
+
+	fan_pwm_active: fan-pwm-active-state {
+		pins = "gpio9";
+		function = "func1";
+		output-low;
+		bias-disable;
+		power-source = <0>;
+		qcom,drive-strength = <3>; /* PMIC_GPIO_STRENGTH_LOW */
+	};
+};
+
+&pmk8550_gpios {
+	pmk8550_sleep_clk: sleep-clk-state {
+		pins = "gpio3";
+		function = "func1";
+		input-disable;
+		output-enable;
+		bias-disable;
+		power-source = <0>;
+	};
+};
+
+&pm8550b_eusb2_repeater {
+	vdd18-supply = <&vreg_l15b_1p8>;
+	vdd3-supply = <&vreg_l5b_3p1>;
+};
+
+&pon_pwrkey {
+	status = "okay";
+};
+
+&pon_resin {
+	linux,code = <KEY_VOLUMEDOWN>;
+
+	status = "okay";
+};
+
+&pmk8550_rtc {
+	nvmem-cells = <&rtc_offset>;
+	nvmem-cell-names = "offset";
+};
+
+&pmk8550_sdam_2 {
+	rtc_offset: rtc-offset@bc {
+		reg = <0xbc 0x4>;
+	};
+};
+
+&qupv3_id_0 {
+	status = "okay";
+};
+
+&qupv3_id_1 {
+	status = "okay";
+
+	/* AYANEO Controller serial interface */
+	uart11: serial@88c000 {
+		compatible = "qcom,geni-uart";
+		reg = <0 0x0088c000 0 0x4000>;
+		clock-names = "se";
+		clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&qup_uart11_default>;
+		interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH 0>;
+		interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
+				 &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
+				<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+				 &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>;
+		interconnect-names = "qup-core", "qup-config";
+		operating-points-v2 = <&qup_opp_table_100mhz>;
+		power-domains = <&rpmhpd RPMHPD_CX>;
+		status = "okay";
+	};
+};
+
+&remoteproc_adsp {
+	firmware-name = "qcom/sm8550/ayaneo/adsp.mdt",
+			"qcom/sm8550/ayaneo/adsp_dtb.mdt";
+	status = "okay";
+};
+
+&sdhc_2 {
+	cd-gpios = <&pm8550_gpios 12 GPIO_ACTIVE_LOW>;
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&sdc2_default &sdc2_card_det_n>;
+	pinctrl-1 = <&sdc2_sleep &sdc2_card_det_n>;
+	vmmc-supply = <&vreg_l9b_2p9>;
+	vqmmc-supply = <&vreg_l8b_1p8>;
+	no-sdio;
+	no-mmc;
+
+	sd-uhs-sdr12;
+	sd-uhs-sdr25;
+	sd-uhs-sdr50;
+	sd-uhs-sdr104;
+	sd-uhs-ddr50;
+
+	qcom,dll-config = <0x0007442c>;
+	sdhci-caps-mask = <0x3 0x0>;
+
+	status = "okay";
+};
+
+&sleep_clk {
+	clock-frequency = <32764>;
+};
+
+&swr0 {
+	status = "okay";
+
+	spk_amp_l: speaker@0,0 {
+		compatible = "sdw20217020400";
+		reg = <0 0>;
+
+		pinctrl-0 = <&spkr_1_sd_n_active>;
+		pinctrl-names = "default";
+
+		powerdown-gpios = <&tlmm 7 GPIO_ACTIVE_LOW>;
+
+		vdd-1p8-supply = <&vreg_l10b_1p8>;
+		vdd-io-supply = <&vreg_l10b_1p8>;
+
+		#sound-dai-cells = <0>;
+		sound-name-prefix = "SpkrLeft";
+		qcom,port-mapping = <1 2 3 7 10 13>;
+	};
+
+	spk_amp_r: speaker@0,1 {
+		compatible = "sdw20217020400";
+		reg = <0 1>;
+
+		pinctrl-0 = <&spkr_2_sd_n_active>;
+		pinctrl-names = "default";
+
+		powerdown-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
+
+		vdd-1p8-supply = <&vreg_l10b_1p8>;
+		vdd-io-supply = <&vreg_l10b_1p8>;
+
+		#sound-dai-cells = <0>;
+		sound-name-prefix = "SpkrRight";
+		qcom,port-mapping = <4 5 6 7 11 13>;
+	};
+};
+
+&tlmm {
+	gpio-reserved-ranges = <32 8>;
+
+	bt_default: bt-default-state {
+		bt-en-pins {
+			pins = "gpio81";
+			function = "gpio";
+			drive-strength = <16>;
+			bias-disable;
+		};
+
+		sw-ctrl-pins {
+			pins = "gpio82";
+			function = "gpio";
+			bias-pull-down;
+		};
+	};
+
+	fan_pwr_active: fan-pwr-active-state {
+		pins = "gpio31";
+		function = "gpio";
+		drive-strength = <2>;
+		bias-disable;
+		output-low;
+	};
+
+	fan_int: fan-int-state {
+		pins = "gpio64";
+		function = "gpio";
+		drive-strength = <2>;
+		bias-pull-up;
+	};
+
+	upd720201_active: upd720201-active-state {
+		pins = "gpio10",  "gpio13", "gpio18";
+		function = "gpio";
+		drive-strength = <2>;
+		bias-pull-up;
+		output-high;
+	};
+
+	gamepad_pwr_en: gamepad-pwr-en-active-state {
+		pins = "gpio52";
+		function = "gpio";
+		drive-strength = <2>;
+		bias-disable;
+		output-high;
+	};
+
+	qup_uart11_default: qup-uart11-default-state {
+		/* TX, RX */
+		pins = "gpio70", "gpio71";
+		function = "qup2_se3";
+		drive-strength = <2>;
+		bias-disable;
+	};
+
+	sde_dsi_active: sde-dsi-active-state {
+		pins = "gpio133";
+		function = "gpio";
+		drive-strength = <8>;
+		bias-disable;
+		output-high;
+	};
+
+	sde_dsi_suspend: sde-dsi-suspend-state {
+		pins = "gpio133";
+		function = "gpio";
+		drive-strength = <2>;
+		bias-pull-down;
+	};
+
+	sde_te_active: sde-te-active-state {
+		pins = "gpio86";
+		function = "mdp_vsync";
+		drive-strength = <2>;
+		bias-pull-down;
+	};
+
+	sde_te_suspend: sde-te-suspend-state {
+		pins = "gpio86";
+		function = "mdp_vsync";
+		drive-strength = <2>;
+		bias-pull-down;
+	};
+
+	wlan_en: wlan-en-state {
+		pins = "gpio80";
+		function = "gpio";
+		drive-strength = <8>;
+		bias-pull-down;
+	};
+
+	spkr_1_sd_n_active: spkr-1-sd-n-active-state {
+		pins = "gpio7";
+		function = "gpio";
+		drive-strength = <16>;
+		bias-disable;
+		output-high;
+	};
+
+	spkr_2_sd_n_active: spkr-2-sd-n-active-state {
+		pins = "gpio12";
+		function = "gpio";
+		drive-strength = <16>;
+		bias-disable;
+		output-high;
+	};
+};
+
+&pm8550_pwm {
+	status = "okay";
+};
+
+&xo_board {
+	clock-frequency = <76800000>;
+};
+
+&gpi_dma1 {
+	status = "okay";
+};
+
+&gpi_dma2 {
+	status = "okay";
+};
+
+&gpu {
+	status = "okay";
+
+	zap-shader {
+		firmware-name = "qcom/sm8550/a740_zap.mbn";
+	};
+};
+
+&gpu_opp_table {
+	/* Additional speedbin for Adreno A32
+	 *	719000000  RPMH_REGULATOR_LEVEL_SVS_L2
+	 *	746000000 RPMH_REGULATOR_LEVEL_NOM
+	 *	794000000 RPMH_REGULATOR_LEVEL_NOM_L1
+	 *	827000000 RPMH_REGULATOR_LEVEL_TURBO
+	 *	860000000 RPMH_REGULATOR_LEVEL_TURBO_L1
+	 *	1000000000 RPMH_REGULATOR_LEVEL_TURBO_L2
+	 */
+	opp-719000000 {
+		opp-hz = /bits/ 64 <719000000>;
+		opp-level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
+		opp-peak-kBps = <10687500>; // Level 7
+		qcom,opp-acd-level = <0x882e5ffd>;
+	};
+
+	opp-746000000 {
+		opp-hz = /bits/ 64 <746000000>;
+		opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
+		opp-peak-kBps = <10687500>; // Level 7
+		qcom,opp-acd-level = <0x882e5ffd>;
+	};
+
+	opp-794000000 {
+		opp-hz = /bits/ 64 <794000000>;
+		opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
+		opp-peak-kBps = <14398438>; // Level 8
+		qcom,opp-acd-level = <0xa82d5ffd>;
+	};
+
+	opp-827000000 {
+		opp-hz = /bits/ 64 <827000000>;
+		opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
+		opp-peak-kBps = <16500000>; // Level 9
+		qcom,opp-acd-level = <0xa82d5ffd>;
+	};
+
+	opp-860000000 {
+		opp-hz = /bits/ 64 <860000000>;
+		opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
+		opp-peak-kBps = <16500000>; // Level 9
+		qcom,opp-acd-level = <0x882d5ffd>;
+	};
+
+	opp-1000000000 {
+		opp-hz = /bits/ 64 <1000000000>;
+		opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L2>;
+		opp-peak-kBps = <16500000>; // Level 9
+		qcom,opp-acd-level = <0x882d5ffd>;
+	};
+};
+
+&i2c_master_hub_0 {
+	status = "okay";
+};
+
+&i2c_hub_2 {
+	status = "okay";
+
+	typec-retimer@1c {
+		compatible = "onnn,nb7vpq904m";
+		reg = <0x1c>;
+		vcc-supply = <&vreg_l15b_1p8>;
+
+		retimer-switch;
+		orientation-switch;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+
+				redriver_ss_out: endpoint {
+					remote-endpoint = <&pmic_glink_ss_in>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+
+				redriver_ss_in: endpoint {
+					data-lanes = <3 2 1 0>;
+					remote-endpoint = <&usb_dp_qmpphy_out>;
+				};
+			};
+		};
+	};
+};
+
+&mdss {
+	status = "okay";
+};
+
+&mdss_dsi0 {
+	vdda-supply = <&vreg_l3e_1p2>;
+	status = "okay";
+
+	display_panel: panel@0 {
+		reg = <0>;
+
+		pinctrl-0 = <&sde_dsi_active>, <&sde_te_active>;
+		pinctrl-1 = <&sde_dsi_suspend>, <&sde_te_suspend>;
+		pinctrl-names = "default", "sleep";
+	};
+};
+
+&mdss_dsi0_phy {
+	vdds-supply = <&vreg_l1e_0p88>;
+	status = "okay";
+};
+
+&mdss_dp0 {
+	status = "okay";
+};
+
+&mdss_dp0_out {
+	data-lanes = <0 1>;
+};
+
+&pcie0 {
+	wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
+	perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
+
+	max-link-speed = <2>;
+
+	pinctrl-0 = <&pcie0_default_state>;
+	pinctrl-names = "default";
+
+	status = "okay";
+};
+
+&pcie1 {
+	wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>;
+	perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>;
+
+	pinctrl-0 = <&pcie1_default_state>, <&upd720201_active>, <&gamepad_pwr_en>;
+	pinctrl-names = "default";
+
+	status = "okay";
+};
+
+&pcie1_phy {
+	vdda-phy-supply = <&vreg_l3c_0p9>;
+	vdda-pll-supply = <&vreg_l3e_1p2>;
+	vdda-qref-supply = <&vreg_l1e_0p88>;
+
+	status = "okay";
+};
+
+&ufs_mem_hc {
+	reset-gpios = <&tlmm 210 GPIO_ACTIVE_LOW>;
+
+	vcc-supply = <&vreg_l17b_2p5>;
+	vcc-max-microamp = <1300000>;
+	vccq-supply = <&vreg_l1g_1p2>;
+	vccq-max-microamp = <1200000>;
+	vdd-hba-supply = <&vreg_l3g_1p2>;
+
+	status = "okay";
+};
+
+&ufs_mem_phy {
+	vdda-phy-supply = <&vreg_l1d_0p88>;
+	vdda-pll-supply = <&vreg_l3e_1p2>;
+
+	status = "okay";
+};
+
+&usb_1 {
+	status = "okay";
+};
+
+&usb_1_dwc3_hs {
+	remote-endpoint = <&pmic_glink_hs_in>;
+};
+
+&usb_1_hsphy {
+	vdd-supply = <&vreg_l1e_0p88>;
+	vdda12-supply = <&vreg_l3e_1p2>;
+
+	phys = <&pm8550b_eusb2_repeater>;
+
+	status = "okay";
+};
+
+&usb_dp_qmpphy {
+	vdda-phy-supply = <&vreg_l3e_1p2>;
+	vdda-pll-supply = <&vreg_l3f_0p88>;
+
+	status = "okay";
+};
+
+&usb_dp_qmpphy_out {
+	remote-endpoint = <&redriver_ss_in>;
+};
+
+&uart7 {
+	status = "okay";
+};
+
+&uart14 {
+	status = "okay";
+
+	bluetooth {
+		compatible = "qcom,wcn7850-bt";
+
+		vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
+		vddaon-supply = <&vreg_pmu_aon_0p59>;
+		vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
+		vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
+		vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
+		vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
+		vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>;
+
+		max-speed = <3200000>;
+	};
+};
+
+&iris {
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/qcom/qcs8550-ayaneo-pocketds.dts b/arch/arm64/boot/dts/qcom/qcs8550-ayaneo-pocketds.dts
new file mode 100644
index 000000000000..723b027fa73b
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/qcs8550-ayaneo-pocketds.dts
@@ -0,0 +1,170 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2025, Teguh Sobirin.
+ * Copyright (c) 2025, ROCKNIX (https://github.com/ROCKNIX)
+ */
+
+/dts-v1/;
+
+#include "qcs8550-ayaneo-pocket-common.dtsi"
+
+/ {
+	model = "AYANEO Pocket DS";
+	compatible = "ayaneo,pocketds", "qcom,sm8550";
+	rocknix-u-boot-dt-id = "u-boot-pocket-ds";
+
+	tca6424_vcc: regulator-tca6424-vcc {
+		compatible = "regulator-fixed";
+		regulator-name = "tca6424_vcc";
+
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+
+		gpio = <&tlmm 168 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		regulator-boot-on;
+		regulator-state-mem {
+			regulator-off-in-suspend;
+		};
+	};
+
+	vdd_ts: vdd-ts {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd_ts_en";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&tca6408 1 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
+};
+
+&tlmm {
+	gpio-reserved-ranges = <32 4>;
+	panel_pwr_active: panel-pwr-active-state {
+		pins = "gpio152", "gpio153";
+		function = "gpio";
+		drive-strength = <8>;
+		bias-disable;
+		output-high;
+	};
+
+	sde_dsi1_active: sde-dsi1-active-state {
+		pins = "gpio137";
+		function = "gpio";
+		drive-strength = <8>;
+		bias-disable;
+		output-high;
+	};
+
+	sde_dsi1_suspend: sde-dsi1-suspend-state {
+		pins = "gpio137";
+		function = "gpio";
+		drive-strength = <2>;
+		bias-pull-down;
+	};
+
+	ts_rst_default: ts-rst-default-state {
+		pins = "gpio24";
+		function = "gpio";
+		bias-pull-up;
+		drive-strength = <8>;
+	};
+
+	ts_rst_sleep: ts-rst-sleep-state {
+		pins = "gpio24";
+		function = "gpio";
+		bias-pull-down;
+		drive-strength = <2>;
+	};
+
+	ts_int_default: ts-int-default-state {
+		pins = "gpio25";
+		function = "gpio";
+		bias-pull-up;
+		drive-strength = <8>;
+	};
+
+	ts_int_sleep: ts-int-sleep-state {
+		pins = "gpio25";
+		function = "gpio";
+		bias-pull-down;
+		drive-strength = <2>;
+	};
+
+	ts2_irq: ts2-irq-state {
+		pins = "gpio39";
+		function = "gpio";
+		drive-strength = <8>;
+		bias-disable;
+	};
+
+	ts2_reset: ts2-reset-state {
+		pins = "gpio38";
+		function = "gpio";
+		drive-strength = <8>;
+		bias-pull-down;
+	};
+};
+
+&i2c0 {
+	clock-frequency = <400000>;
+	status = "okay";
+
+	tca6408: tca64_20@20 {
+		gpio-controller;
+		compatible = "ti,tca6408";
+		status = "okay";
+		reg = <0x20>;
+		#gpio-cells = <0x02>;
+		vcc-supply = <&tca6424_vcc>;
+	};
+};
+
+&i2c2 {
+	clock-frequency = <400000>;
+	status = "okay";
+
+	touchscreen@5d {
+		reg = <0x5d>;
+		compatible = "goodix,gt911";
+
+		interrupt-parent = <&tlmm>;
+		interrupts = <39 IRQ_TYPE_EDGE_FALLING>;
+
+		reset-gpios = <&tlmm 38 GPIO_ACTIVE_HIGH>;
+		irq-gpios = <&tlmm 39 GPIO_ACTIVE_HIGH>;
+		VDDIO-supply = <&vdd_ts>;
+
+		touchscreen-size-x = <768>;
+		touchscreen-size-y = <1024>;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&ts2_reset>, <&ts2_irq>;
+
+	};
+};
+
+&i2c4 {
+	clock-frequency = <400000>;
+	status = "okay";
+	touchscreen: touchscreen@38 {
+		compatible = "focaltech,ft5426";
+		reg = <0x38>;
+
+		interrupt-parent = <&tlmm>;
+		interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
+
+		reset-gpios = <&tlmm 24 GPIO_ACTIVE_LOW>;
+
+		vcc-supply = <&vreg_l14b_3p2>;
+		iovcc-supply = <&vreg_l12b_1p8>;
+
+		pinctrl-0 = <&ts_int_default &ts_rst_default>;
+		pinctrl-1 = <&ts_int_sleep &ts_rst_sleep>;
+		pinctrl-names = "default", "sleep";
+
+		touchscreen-size-x = <1080>;
+		touchscreen-size-y = <1920>;
+	};
+};

-- 
2.54.0



^ permalink raw reply related	[flat|nested] 8+ messages in thread

* Re: [PATCH 2/2] arm64: dts: qcom: add basic devicetree for Ayaneo Pocket DS gaming console
  2026-05-10 16:05 ` [PATCH 2/2] arm64: dts: qcom: add basic devicetree for Ayaneo Pocket DS gaming console Alexandre Hamamdjian via B4 Relay
@ 2026-05-11  8:19   ` Neil Armstrong
  2026-05-11  9:14     ` Konrad Dybcio
  2026-05-11  9:19   ` Konrad Dybcio
  2026-05-11 22:11   ` sashiko-bot
  2 siblings, 1 reply; 8+ messages in thread
From: Neil Armstrong @ 2026-05-11  8:19 UTC (permalink / raw)
  To: azkali.limited, Bjorn Andersson, Konrad Dybcio, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley
  Cc: linux-arm-msm, devicetree, linux-kernel, Teguh Sobirin

Hi,

On 5/10/26 18:05, Alexandre Hamamdjian via B4 Relay wrote:
> From: Teguh Sobirin <teguh@sobir.in>
> 
> Add initial device tree support for the Ayaneo Pocket DS gaming
> console based on the Qualcomm QCS8550 platform.
> 
> The board file is split into qcs8550-ayaneo-pocket-common.dtsi and
> qcs8550-ayaneo-pocketds.dts in anticipation of additional boards in
> the same family that share the QCS8550 base. Only the Pocket DS has
> been verified on hardware so far; the shared dtsi is intended to pick
> up sibling boards as they are submitted.

Please don't, this is dead code, please send a single file and then
split it when you introduce variants boards.

> 
> Co-developed-by: Alexandre Hamamdjian <azkali.limited@gmail.com>
> Signed-off-by: Alexandre Hamamdjian <azkali.limited@gmail.com>
> Signed-off-by: Teguh Sobirin <teguh@sobir.in>
> ---
>   arch/arm64/boot/dts/qcom/Makefile                  |    1 +
>   .../dts/qcom/qcs8550-ayaneo-pocket-common.dtsi     | 1596 ++++++++++++++++++++
>   .../boot/dts/qcom/qcs8550-ayaneo-pocketds.dts      |  170 +++
>   3 files changed, 1767 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> index cc42829f92eb..45859e977bc9 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -185,6 +185,7 @@ qcs8300-ride-el2-dtbs := qcs8300-ride.dtb monaco-el2.dtbo
>   
>   dtb-$(CONFIG_ARCH_QCOM)	+= qcs8300-ride-el2.dtb
>   dtb-$(CONFIG_ARCH_QCOM)	+= qcs8550-aim300-aiot.dtb
> +dtb-$(CONFIG_ARCH_QCOM)	+= qcs8550-ayaneo-pocketds.dtb
>   dtb-$(CONFIG_ARCH_QCOM)	+= qcs9100-ride.dtb
>   dtb-$(CONFIG_ARCH_QCOM)	+= qcs9100-ride-r3.dtb
>   
> diff --git a/arch/arm64/boot/dts/qcom/qcs8550-ayaneo-pocket-common.dtsi b/arch/arm64/boot/dts/qcom/qcs8550-ayaneo-pocket-common.dtsi
> new file mode 100644
> index 000000000000..8d215a9d31d5
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/qcs8550-ayaneo-pocket-common.dtsi
> @@ -0,0 +1,1596 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2025, Teguh Sobirin.
> + */
> +
> +#include <dt-bindings/leds/common.h>
> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
> +#include "qcs8550.dtsi"
> +#include "pm8550.dtsi"
> +#include "pm8550b.dtsi"
> +#define PMK8550VE_SID 5
> +#include "pm8550ve.dtsi"
> +#include "pm8550vs.dtsi"
> +#include "pmk8550.dtsi"
> +
> +/delete-node/ &aop_image_mem;
> +/delete-node/ &aop_config_mem;
> +/delete-node/ &camera_mem;
> +/delete-node/ &ipa_fw_mem;
> +/delete-node/ &ipa_gsi_mem;
> +/delete-node/ &mpss_dsm_mem;
> +/delete-node/ &mpss_mem;
> +/delete-node/ &q6_mpss_dtb_mem;
> +/delete-node/ &cdsp_mem;
> +/delete-node/ &q6_cdsp_dtb_mem;
> +
> +/delete-node/ &remoteproc_mpss;
> +/delete-node/ &remoteproc_cdsp;
> +
> +/ {
> +	chassis-type = "handset";
> +
> +	aliases {
> +		serial0 = &uart7;
> +		serial1 = &uart14;
> +		hsuart0 = &uart11;
> +	};
> +
> +	chosen {
> +		stdout-path = "serial0:115200n8";
> +	};
> +
> +	gpio-keys {
> +		compatible = "gpio-keys";
> +
> +		pinctrl-0 = <&volume_up_n>;
> +		pinctrl-names = "default";
> +
> +		key-volume-up {
> +			label = "Volume Up";
> +			debounce-interval = <15>;
> +			gpios = <&pm8550_gpios 6 GPIO_ACTIVE_LOW>;
> +			linux,code = <KEY_VOLUMEUP>;
> +			linux,can-disable;
> +			wakeup-source;
> +		};
> +	};
> +
> +	pmic-glink {
> +		compatible = "qcom,sm8550-pmic-glink", "qcom,pmic-glink";
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		orientation-gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
> +
> +		connector@0 {
> +			compatible = "usb-c-connector";
> +			reg = <0>;
> +			power-role = "dual";
> +			data-role = "dual";
> +
> +			ports {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +
> +				port@0 {
> +					reg = <0>;
> +
> +					pmic_glink_hs_in: endpoint {
> +						remote-endpoint = <&usb_1_dwc3_hs>;
> +					};
> +				};
> +
> +				port@1 {
> +					reg = <1>;
> +
> +					pmic_glink_ss_in: endpoint {
> +						remote-endpoint = <&redriver_ss_out>;
> +					};
> +				};
> +			};
> +		};
> +	};
> +
> +	reserved-memory {
> +		hyp_mem: hyp-region@80000000 {
> +			reg = <0 0x80000000 0 0xa00000>;
> +			no-map;
> +		};
> +
> +		cpusys_vm_mem: cpusys-vm-region@80a00000 {
> +			reg = <0 0x80a00000 0 0x400000>;
> +			no-map;
> +		};
> +
> +		hyp_tags_mem: hyp-tags-region@80e00000 {
> +			reg = <0 0x80e00000 0 0x3d0000>;
> +			no-map;
> +		};
> +
> +		xbl_sc_mem: xbl-sc-region@d8100000 {
> +			reg = <0 0xd8100000 0 0x40000>;
> +			no-map;
> +		};
> +
> +		hyp_tags_reserved_mem: hyp-tags-reserved-region@811d0000 {
> +			reg = <0 0x811d0000 0 0x30000>;
> +			no-map;
> +		};
> +
> +		xbl_dt_log_merged_mem: xbl-dt-log-merged-region@81a00000 {
> +			reg = <0 0x81a00000 0 0x260000>;
> +			no-map;
> +		};
> +
> +		aop_config_merged_mem: aop-config-merged-region@81c80000 {
> +			reg = <0 0x81c80000 0 0x74000>;
> +			no-map;
> +		};
> +
> +		chipinfo_mem: chipinfo-region@81cf4000 {
> +			reg = <0 0x81cf4000 0 0x1000>;
> +			no-map;
> +		};
> +
> +		global_sync_mem: global-sync-region@82600000 {
> +			reg = <0 0x82600000 0 0x100000>;
> +			no-map;
> +		};
> +
> +		tz_stat_mem: tz-stat-region@82700000 {
> +			reg = <0 0x82700000 0 0x100000>;
> +			no-map;
> +		};
> +
> +		cpucp_fw_mem: cpucp-fw-region@d8140000 {
> +			reg = <0 0xd8140000 0 0x1c0000>;
> +			no-map;
> +		};
> +
> +		qtee_mem: qtee-region@d8300000 {
> +			reg = <0 0xd8300000 0 0x500000>;
> +			no-map;
> +		};
> +
> +		hwfence_shbuf: hwfence-shbuf-region@e6440000 {
> +			reg = <0 0xe6440000 0 0x2dd000>;
> +			no-map;
> +		};
> +
> +		hyp_ext_reserved_mem: hyp-ext-reserved-region@ff700000 {
> +			reg = <0 0xff700000 0 0x100000>;
> +			no-map;
> +		};
> +
> +		llcc_lpi_mem: llcc_lpi_region@ff800000 {
> +			reg = <0 0xff800000 0 0x600000>;
> +			no-map;
> +		};
> +
> +		hyp_ext_tags_mem: hyp-ext-tags-region@fce00000 {
> +			reg = <0 0xfce00000 0 0x2900000>;
> +			no-map;
> +		};
> +
> +		splash_region: splash_region@b8000000 {
> +			reg = <0x0 0xb8000000 0x0 0x2b00000>;
> +			label = "cont_splash_region";
> +			no-map;
> +		};
> +	};
> +
> +	sound {
> +		status = "okay";
> +		compatible = "qcom,sm8550-sndcard", "qcom,sm8450-sndcard";
> +		model = "SM8550-APS";
> +		audio-routing = "SpkrLeft IN", "WSA_SPK1 OUT",
> +				"SpkrRight IN", "WSA_SPK2 OUT",
> +				"VA DMIC0", "vdd-micb",
> +				"VA DMIC1", "vdd-micb";
> +
> +		wsa-dai-link {
> +			link-name = "WSA Playback";
> +
> +			cpu {
> +				sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>;
> +			};
> +
> +			codec {
> +				sound-dai = <&spk_amp_l>,
> +					<&spk_amp_r>,
> +					<&swr0 0>,
> +					<&lpass_wsamacro 0>;
> +			};
> +
> +			platform {
> +				sound-dai = <&q6apm>;
> +			};
> +		};
> +
> +		va-dai-link {
> +			link-name = "VA Capture";
> +
> +			cpu {
> +				sound-dai = <&q6apmbedai VA_CODEC_DMA_TX_0>;
> +			};
> +
> +			codec {
> +				sound-dai = <&lpass_vamacro 0>;
> +			};
> +
> +			platform {
> +				sound-dai = <&q6apm>;
> +			};
> +		};
> +	};
> +
> +	thermal-zones {
> +		cpuss0-thermal {

Add labels for each thermal zones on the sm8550.dtsi files instead.

Please see the sm8650-ayaneo-pocket-s2 as reference.

> +			polling-delay = <200>;
> +			trips {
> +				cpuss0_fan0: trip-point2 {
> +					temperature = <40000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +					};

Bad alignment

Please add empty lines like the rest of the file.

> +				cpuss0_fan1: trip-point3 {
> +					temperature = <50000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				cpuss0_fan2: trip-point4 {
> +					temperature = <60000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				cpuss0_fan3: trip-point5 {
> +					temperature = <65000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				cpuss0_fan4: trip-point6 {
> +					temperature = <70000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				cpuss0_fan5: trip-point7 {
> +					temperature = <75000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				cpuss0_fan6: trip-point8 {
> +					temperature = <80000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +			};
> +
> +		};
> +		cpuss1-thermal {
> +			polling-delay = <200>;
> +			trips {
> +				cpuss1_fan0: trip-point2 {
> +					temperature = <40000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				cpuss1_fan1: trip-point3 {
> +					temperature = <50000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				cpuss1_fan2: trip-point4 {
> +					temperature = <60000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				cpuss1_fan3: trip-point5 {
> +					temperature = <65000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				cpuss1_fan4: trip-point6 {
> +					temperature = <70000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				cpuss1_fan5: trip-point7 {
> +					temperature = <75000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				cpuss1_fan6: trip-point8 {
> +					temperature = <80000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +			};
> +
> +		};
> +		cpuss2-thermal {
> +			polling-delay = <200>;
> +			trips {
> +				cpuss2_fan0: trip-point2 {
> +					temperature = <40000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				cpuss2_fan1: trip-point3 {
> +					temperature = <50000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				cpuss2_fan2: trip-point4 {
> +					temperature = <60000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				cpuss2_fan3: trip-point5 {
> +					temperature = <65000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				cpuss2_fan4: trip-point6 {
> +					temperature = <70000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				cpuss2_fan5: trip-point7 {
> +					temperature = <75000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				cpuss2_fan6: trip-point8 {
> +					temperature = <80000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +			};
> +
> +		};
> +		cpuss3-thermal {
> +			polling-delay = <200>;
> +			trips {
> +				cpuss3_fan0: trip-point2 {
> +					temperature = <40000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				cpuss3_fan1: trip-point3 {
> +					temperature = <50000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				cpuss3_fan2: trip-point4 {
> +					temperature = <60000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				cpuss3_fan3: trip-point5 {
> +					temperature = <65000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				cpuss3_fan4: trip-point6 {
> +					temperature = <70000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				cpuss3_fan5: trip-point7 {
> +					temperature = <75000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				cpuss3_fan6: trip-point8 {
> +					temperature = <80000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +			};
> +
> +		};
> +		cpu7-top-thermal {
> +			polling-delay = <200>;
> +			trips {
> +				cpu7_top_fan0: trip-point2 {
> +					temperature = <70000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				cpu7_top_fan1: trip-point3 {
> +					temperature = <75000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				cpu7_top_fan2: trip-point4 {
> +					temperature = <80000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +			};
> +
> +		};
> +		gpuss-0-thermal {
> +			polling-delay = <200>;
> +			trips {
> +				gpuss0_fan0: trip-point3 {
> +					temperature = <70000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				gpuss0_fan1: trip-point4 {
> +					temperature = <75000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				gpuss0_fan2: trip-point5 {
> +					temperature = <80000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +			};
> +
> +		};
> +		gpuss-1-thermal {
> +			polling-delay = <200>;
> +			trips {
> +				gpuss1_fan0: trip-point3 {
> +					temperature = <70000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				gpuss1_fan1: trip-point4 {
> +					temperature = <75000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				gpuss1_fan2: trip-point5 {
> +					temperature = <80000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +			};
> +
> +		};
> +		gpuss-2-thermal {
> +			polling-delay = <200>;
> +			trips {
> +				gpuss2_fan0: trip-point3 {
> +					temperature = <70000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				gpuss2_fan1: trip-point4 {
> +					temperature = <75000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				gpuss2_fan2: trip-point5 {
> +					temperature = <80000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +			};
> +
> +		};
> +		gpuss-3-thermal {
> +			polling-delay = <200>;
> +			trips {
> +				gpuss3_fan0: trip-point3 {
> +					temperature = <70000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				gpuss3_fan1: trip-point4 {
> +					temperature = <75000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				gpuss3_fan2: trip-point5 {
> +					temperature = <80000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +			};
> +
> +		};
> +		gpuss-4-thermal {
> +			polling-delay = <200>;
> +			trips {
> +				gpuss4_fan0: trip-point3 {
> +					temperature = <70000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				gpuss4_fan1: trip-point4 {
> +					temperature = <75000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				gpuss4_fan2: trip-point5 {
> +					temperature = <80000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +			};
> +
> +		};
> +		gpuss-5-thermal {
> +			polling-delay = <200>;
> +			trips {
> +				gpuss5_fan0: trip-point3 {
> +					temperature = <70000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				gpuss5_fan1: trip-point4 {
> +					temperature = <75000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				gpuss5_fan2: trip-point5 {
> +					temperature = <80000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +			};
> +
> +		};
> +		gpuss-6-thermal {
> +			polling-delay = <200>;
> +			trips {
> +				gpuss6_fan0: trip-point3 {
> +					temperature = <70000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				gpuss6_fan1: trip-point4 {
> +					temperature = <75000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				gpuss6_fan2: trip-point5 {
> +					temperature = <80000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +			};
> +
> +		};
> +		gpuss-7-thermal {
> +			polling-delay = <200>;
> +			trips {
> +				gpuss7_fan0: trip-point3 {
> +					temperature = <70000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				gpuss7_fan1: trip-point4 {
> +					temperature = <75000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +				gpuss7_fan2: trip-point5 {
> +					temperature = <80000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +				};
> +			};
> +
> +		};
> +	};
> +
> +	vdd_fan_5v0: vdd-fan-5v0-regulator {
> +		compatible = "regulator-fixed";
> +		regulator-name = "vdd_fan_5v0";
> +
> +		regulator-min-microvolt = <5000000>;
> +		regulator-max-microvolt = <5000000>;
> +
> +		gpio = <&tlmm 31 GPIO_ACTIVE_HIGH>;
> +		enable-active-high;
> +
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&fan_pwr_active>;
> +
> +		regulator-state-mem {
> +			regulator-off-in-suspend;
> +		};
> +	};
> +
> +	vph_pwr: regulator-vph-pwr {
> +		compatible = "regulator-fixed";
> +		regulator-name = "  vph_pwr";
> +		regulator-min-microvolt = <3700000>;
> +		regulator-max-microvolt = <3700000>;
> +
> +		regulator-always-on;
> +		regulator-boot-on;
> +	};
> +
> +	pwm_fan: pwm-fan {
> +		compatible = "pwm-fan";
> +
> +		pinctrl-names = "default", "sleep";
> +		pinctrl-0 = <&fan_pwm_active>, <&fan_int>;
> +
> +		fan-supply = <&vdd_fan_5v0>;
> +		pwms = <&pm8550_pwm 3 40000>;
> +		interrupt-parent = <&tlmm>;
> +		interrupts = <64 IRQ_TYPE_EDGE_FALLING>;
> +
> +		#cooling-cells = <2>;
> +		cooling-levels = <0 30 45 60 70 90 120 150>;
> +	};
> +
> +	wcn7850-pmu {
> +		compatible = "qcom,wcn7850-pmu";
> +
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&wlan_en>, <&bt_default>, <&pmk8550_sleep_clk>;
> +
> +		wlan-enable-gpios = <&tlmm 80 GPIO_ACTIVE_HIGH>;
> +		bt-enable-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>;
> +
> +		vdd-supply = <&vreg_s5g_0p85>;
> +		vddio-supply = <&vreg_l15b_1p8>;
> +		vddaon-supply = <&vreg_s2g_0p85>;
> +		vdddig-supply = <&vreg_s4e_0p95>;
> +		vddrfa1p2-supply = <&vreg_s4g_1p25>;
> +		vddrfa1p8-supply = <&vreg_s6g_1p86>;
> +
> +		regulators {
> +			vreg_pmu_rfa_cmn: ldo0 {
> +				regulator-name = "vreg_pmu_rfa_cmn";
> +			};
> +
> +			vreg_pmu_aon_0p59: ldo1 {
> +				regulator-name = "vreg_pmu_aon_0p59";
> +			};
> +
> +			vreg_pmu_wlcx_0p8: ldo2 {
> +				regulator-name = "vreg_pmu_wlcx_0p8";
> +			};
> +
> +			vreg_pmu_wlmx_0p85: ldo3 {
> +				regulator-name = "vreg_pmu_wlmx_0p85";
> +			};
> +
> +			vreg_pmu_btcmx_0p85: ldo4 {
> +				regulator-name = "vreg_pmu_btcmx_0p85";
> +			};
> +
> +			vreg_pmu_rfa_0p8: ldo5 {
> +				regulator-name = "vreg_pmu_rfa_0p8";
> +			};
> +
> +			vreg_pmu_rfa_1p2: ldo6 {
> +				regulator-name = "vreg_pmu_rfa_1p2";
> +			};
> +
> +			vreg_pmu_rfa_1p8: ldo7 {
> +				regulator-name = "vreg_pmu_rfa_1p8";
> +			};
> +
> +			vreg_pmu_pcie_0p9: ldo8 {
> +				regulator-name = "vreg_pmu_pcie_0p9";
> +			};
> +
> +			vreg_pmu_pcie_1p8: ldo9 {
> +				regulator-name = "vreg_pmu_pcie_1p8";
> +			};
> +		};
> +	};
> +};
> +
> +/* DMIC 01 23 */
> +&lpass_vamacro {
> +	pinctrl-0 = <&dmic01_default>, <&dmic23_default>;
> +	pinctrl-names = "default";
> +	vdd-micb-supply = <&vreg_l10b_1p8>;
> +	qcom,dmic-sample-rate = <4800000>;
> +};
> +
> +&apps_rsc {
> +	regulators-0 {
> +		compatible = "qcom,pm8550-rpmh-regulators";
> +		qcom,pmic-id = "b";
> +
> +		vdd-bob1-supply = <&vph_pwr>;
> +		vdd-bob2-supply = <&vph_pwr>;
> +		vdd-l1-l4-l10-supply = <&vreg_s6g_1p86>;
> +		vdd-l2-l13-l14-supply = <&vreg_bob1>;
> +		vdd-l3-supply = <&vreg_s4g_1p25>;
> +		vdd-l5-l16-supply = <&vreg_bob1>;
> +		vdd-l6-l7-supply = <&vreg_bob1>;
> +		vdd-l8-l9-supply = <&vreg_bob1>;
> +		vdd-l11-supply = <&vreg_s4g_1p25>;
> +		vdd-l12-supply = <&vreg_s6g_1p86>;
> +		vdd-l15-supply = <&vreg_s6g_1p86>;
> +		vdd-l17-supply = <&vreg_bob2>;
> +
> +		vreg_bob1: bob1 {
> +			regulator-name = "vreg_bob1";
> +			regulator-min-microvolt = <3296000>;
> +			regulator-max-microvolt = <3960000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_bob2: bob2 {
> +			regulator-name = "vreg_bob2";
> +			regulator-min-microvolt = <2720000>;
> +			regulator-max-microvolt = <3960000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l2b_3p0: ldo2 {
> +			regulator-name = "vreg_l2b_3p0";
> +			regulator-min-microvolt = <3008000>;
> +			regulator-max-microvolt = <3008000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +			regulator-allow-set-load;
> +			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
> +						   RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l5b_3p1: ldo5 {
> +			regulator-name = "vreg_l5b_3p1";
> +			regulator-min-microvolt = <3104000>;
> +			regulator-max-microvolt = <3104000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +			regulator-allow-set-load;
> +			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
> +						   RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l6b_1p8: ldo6 {
> +			regulator-name = "vreg_l6b_1p8";
> +			regulator-min-microvolt = <1800000>;
> +			regulator-max-microvolt = <3008000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +			regulator-allow-set-load;
> +			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
> +						   RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l7b_1p8: ldo7 {
> +			regulator-name = "vreg_l7b_1p8";
> +			regulator-min-microvolt = <1800000>;
> +			regulator-max-microvolt = <3008000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l8b_1p8: ldo8 {
> +			regulator-name = "vreg_l8b_1p8";
> +			regulator-min-microvolt = <1800000>;
> +			regulator-max-microvolt = <3008000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +			regulator-allow-set-load;
> +			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
> +						   RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l9b_2p9: ldo9 {
> +			regulator-name = "vreg_l9b_2p9";
> +			regulator-min-microvolt = <2960000>;
> +			regulator-max-microvolt = <3008000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +			regulator-allow-set-load;
> +			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
> +						   RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l10b_1p8: ldo10 {
> +			regulator-name = "vreg_l10b_1p8";
> +			regulator-min-microvolt = <1800000>;
> +			regulator-max-microvolt = <1800000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +			regulator-allow-set-load;
> +			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
> +						   RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l11b_1p2: ldo11 {
> +			regulator-name = "vreg_l11b_1p2";
> +			regulator-min-microvolt = <1200000>;
> +			regulator-max-microvolt = <1504000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +			regulator-allow-set-load;
> +			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
> +						   RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l12b_1p8: ldo12 {
> +			regulator-name = "vreg_l12b_1p8";
> +			regulator-min-microvolt = <1800000>;
> +			regulator-max-microvolt = <1800000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +			regulator-allow-set-load;
> +			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
> +						   RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l13b_3p0: ldo13 {
> +			regulator-name = "vreg_l13b_3p0";
> +			regulator-min-microvolt = <3000000>;
> +			regulator-max-microvolt = <3000000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +			regulator-allow-set-load;
> +			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
> +						   RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l14b_3p2: ldo14 {
> +			regulator-name = "vreg_l14b_3p2";
> +			regulator-min-microvolt = <3200000>;
> +			regulator-max-microvolt = <3200000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +			regulator-allow-set-load;
> +			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
> +						   RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l15b_1p8: ldo15 {
> +			regulator-name = "vreg_l15b_1p8";
> +			regulator-min-microvolt = <1800000>;
> +			regulator-max-microvolt = <1800000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +			regulator-allow-set-load;
> +			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
> +						   RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l16b_2p8: ldo16 {
> +			regulator-name = "vreg_l16b_2p8";
> +			regulator-min-microvolt = <2800000>;
> +			regulator-max-microvolt = <2800000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +			regulator-allow-set-load;
> +			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
> +						   RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l17b_2p5: ldo17 {
> +			regulator-name = "vreg_l17b_2p5";
> +			regulator-min-microvolt = <2504000>;
> +			regulator-max-microvolt = <2504000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +		};
> +	};
> +
> +	regulators-1 {
> +		compatible = "qcom,pm8550vs-rpmh-regulators";
> +		qcom,pmic-id = "c";
> +
> +		vdd-l1-supply = <&vreg_s4g_1p25>;
> +		vdd-l2-supply = <&vreg_s4e_0p95>;
> +		vdd-l3-supply = <&vreg_s4e_0p95>;
> +
> +		vreg_l3c_0p9: ldo3 {
> +			regulator-name = "vreg_l3c_0p9";
> +			regulator-min-microvolt = <880000>;
> +			regulator-max-microvolt = <912000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +			regulator-allow-set-load;
> +			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
> +						   RPMH_REGULATOR_MODE_HPM>;
> +		};
> +	};
> +
> +	regulators-2 {
> +		compatible = "qcom,pm8550vs-rpmh-regulators";
> +		qcom,pmic-id = "d";
> +
> +		vdd-l1-supply = <&vreg_s4e_0p95>;
> +		vdd-l2-supply = <&vreg_s4e_0p95>;
> +		vdd-l3-supply = <&vreg_s4e_0p95>;
> +
> +		vreg_l1d_0p88: ldo1 {
> +			regulator-name = "vreg_l1d_0p88";
> +			regulator-min-microvolt = <880000>;
> +			regulator-max-microvolt = <920000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +			regulator-allow-set-load;
> +			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
> +						   RPMH_REGULATOR_MODE_HPM>;
> +		};
> +	};
> +
> +	regulators-3 {
> +		compatible = "qcom,pm8550vs-rpmh-regulators";
> +		qcom,pmic-id = "e";
> +
> +		vdd-l1-supply = <&vreg_s4e_0p95>;
> +		vdd-l2-supply = <&vreg_s4e_0p95>;
> +		vdd-l3-supply = <&vreg_s4g_1p25>;
> +		vdd-s4-supply = <&vph_pwr>;
> +		vdd-s5-supply = <&vph_pwr>;
> +
> +		vreg_s4e_0p95: smps4 {
> +			regulator-name = "vreg_s4e_0p95";
> +			regulator-min-microvolt = <904000>;
> +			regulator-max-microvolt = <984000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_s5e_1p08: smps5 {
> +			regulator-name = "vreg_s5e_1p08";
> +			regulator-min-microvolt = <1010000>;
> +			regulator-max-microvolt = <1120000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l1e_0p88: ldo1 {
> +			regulator-name = "vreg_l1e_0p88";
> +			regulator-min-microvolt = <880000>;
> +			regulator-max-microvolt = <880000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +			regulator-allow-set-load;
> +			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
> +						   RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l2e_0p9: ldo2 {
> +			regulator-name = "vreg_l2e_0p9";
> +			regulator-min-microvolt = <904000>;
> +			regulator-max-microvolt = <970000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +			regulator-allow-set-load;
> +			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
> +						   RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l3e_1p2: ldo3 {
> +			regulator-name = "vreg_l3e_1p2";
> +			regulator-min-microvolt = <1200000>;
> +			regulator-max-microvolt = <1200000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +			regulator-allow-set-load;
> +			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
> +						   RPMH_REGULATOR_MODE_HPM>;
> +		};
> +	};
> +
> +	regulators-4 {
> +		compatible = "qcom,pm8550ve-rpmh-regulators";
> +		qcom,pmic-id = "f";
> +
> +		vdd-l1-supply = <&vreg_s4e_0p95>;
> +		vdd-l2-supply = <&vreg_s4e_0p95>;
> +		vdd-l3-supply = <&vreg_s4e_0p95>;
> +		vdd-s4-supply = <&vph_pwr>;
> +
> +		vreg_s4f_0p5: smps4 {
> +			regulator-name = "vreg_s4f_0p5";
> +			regulator-min-microvolt = <500000>;
> +			regulator-max-microvolt = <700000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l1f_0p9: ldo1 {
> +			regulator-name = "vreg_l1f_0p9";
> +			regulator-min-microvolt = <912000>;
> +			regulator-max-microvolt = <912000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +			regulator-allow-set-load;
> +			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
> +						   RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l2f_0p88: ldo2 {
> +			regulator-name = "vreg_l2f_0p88";
> +			regulator-min-microvolt = <880000>;
> +			regulator-max-microvolt = <912000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +			regulator-allow-set-load;
> +			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
> +						   RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l3f_0p88: ldo3 {
> +			regulator-name = "vreg_l3f_0p88";
> +			regulator-min-microvolt = <880000>;
> +			regulator-max-microvolt = <912000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +			regulator-allow-set-load;
> +			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
> +						   RPMH_REGULATOR_MODE_HPM>;
> +		};
> +	};
> +
> +	regulators-5 {
> +		compatible = "qcom,pm8550vs-rpmh-regulators";
> +		qcom,pmic-id = "g";
> +		vdd-l1-supply = <&vreg_s4g_1p25>;
> +		vdd-l2-supply = <&vreg_s4g_1p25>;
> +		vdd-l3-supply = <&vreg_s4g_1p25>;
> +		vdd-s1-supply = <&vph_pwr>;
> +		vdd-s2-supply = <&vph_pwr>;
> +		vdd-s3-supply = <&vph_pwr>;
> +		vdd-s4-supply = <&vph_pwr>;
> +		vdd-s5-supply = <&vph_pwr>;
> +		vdd-s6-supply = <&vph_pwr>;
> +
> +		vreg_s1g_1p25: smps1 {
> +			regulator-name = "vreg_s1g_1p25";
> +			regulator-min-microvolt = <1200000>;
> +			regulator-max-microvolt = <1300000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_s2g_0p85: smps2 {
> +			regulator-name = "vreg_s2g_0p85";
> +			regulator-min-microvolt = <800000>;
> +			regulator-max-microvolt = <1000000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_s3g_0p8: smps3 {
> +			regulator-name = "vreg_s3g_0p8";
> +			regulator-min-microvolt = <300000>;
> +			regulator-max-microvolt = <1004000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_s4g_1p25: smps4 {
> +			regulator-name = "vreg_s4g_1p25";
> +			regulator-min-microvolt = <1200000>;
> +			regulator-max-microvolt = <1352000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_s5g_0p85: smps5 {
> +			regulator-name = "vreg_s5g_0p85";
> +			regulator-min-microvolt = <500000>;
> +			regulator-max-microvolt = <1004000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_s6g_1p86: smps6 {
> +			regulator-name = "vreg_s6g_1p86";
> +			regulator-min-microvolt = <1800000>;
> +			regulator-max-microvolt = <2000000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l1g_1p2: ldo1 {
> +			regulator-name = "vreg_l1g_1p2";
> +			regulator-min-microvolt = <1200000>;
> +			regulator-max-microvolt = <1200000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +			regulator-allow-set-load;
> +			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
> +						   RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l3g_1p2: ldo3 {
> +			regulator-name = "vreg_l3g_1p2";
> +			regulator-min-microvolt = <1200000>;
> +			regulator-max-microvolt = <1200000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +			regulator-allow-set-load;
> +			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
> +						   RPMH_REGULATOR_MODE_HPM>;
> +		};
> +	};
> +};
> +
> +&pm8550_gpios {
> +	sdc2_card_det_n: sdc2-card-det-n-state {
> +		pins = "gpio12";
> +		function = "normal";
> +		input-enable;
> +		output-disable;
> +		bias-pull-up;
> +		power-source = <1>;
> +	};
> +
> +	volume_up_n: volume-up-n-state {
> +		pins = "gpio6";
> +		function = "normal";
> +		power-source = <1>;
> +		bias-pull-up;
> +		input-enable;
> +	};
> +
> +	fan_pwm_active: fan-pwm-active-state {
> +		pins = "gpio9";
> +		function = "func1";
> +		output-low;
> +		bias-disable;
> +		power-source = <0>;
> +		qcom,drive-strength = <3>; /* PMIC_GPIO_STRENGTH_LOW */
> +	};
> +};
> +
> +&pmk8550_gpios {
> +	pmk8550_sleep_clk: sleep-clk-state {
> +		pins = "gpio3";
> +		function = "func1";
> +		input-disable;
> +		output-enable;
> +		bias-disable;
> +		power-source = <0>;
> +	};
> +};
> +
> +&pm8550b_eusb2_repeater {
> +	vdd18-supply = <&vreg_l15b_1p8>;
> +	vdd3-supply = <&vreg_l5b_3p1>;
> +};
> +
> +&pon_pwrkey {
> +	status = "okay";
> +};
> +
> +&pon_resin {
> +	linux,code = <KEY_VOLUMEDOWN>;
> +
> +	status = "okay";
> +};
> +
> +&pmk8550_rtc {
> +	nvmem-cells = <&rtc_offset>;
> +	nvmem-cell-names = "offset";
> +};
> +
> +&pmk8550_sdam_2 {
> +	rtc_offset: rtc-offset@bc {
> +		reg = <0xbc 0x4>;
> +	};
> +};
> +
> +&qupv3_id_0 {
> +	status = "okay";
> +};
> +
> +&qupv3_id_1 {
> +	status = "okay";
> +
> +	/* AYANEO Controller serial interface */
> +	uart11: serial@88c000 {
> +		compatible = "qcom,geni-uart";
> +		reg = <0 0x0088c000 0 0x4000>;
> +		clock-names = "se";
> +		clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&qup_uart11_default>;
> +		interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH 0>;
> +		interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
> +				 &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
> +				<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
> +				 &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>;
> +		interconnect-names = "qup-core", "qup-config";
> +		operating-points-v2 = <&qup_opp_table_100mhz>;
> +		power-domains = <&rpmhpd RPMHPD_CX>;
> +		status = "okay";
> +	};
> +};
> +
> +&remoteproc_adsp {
> +	firmware-name = "qcom/sm8550/ayaneo/adsp.mdt",
> +			"qcom/sm8550/ayaneo/adsp_dtb.mdt";
> +	status = "okay";
> +};
> +
> +&sdhc_2 {
> +	cd-gpios = <&pm8550_gpios 12 GPIO_ACTIVE_LOW>;
> +	pinctrl-names = "default", "sleep";
> +	pinctrl-0 = <&sdc2_default &sdc2_card_det_n>;
> +	pinctrl-1 = <&sdc2_sleep &sdc2_card_det_n>;
> +	vmmc-supply = <&vreg_l9b_2p9>;
> +	vqmmc-supply = <&vreg_l8b_1p8>;
> +	no-sdio;
> +	no-mmc;
> +
> +	sd-uhs-sdr12;
> +	sd-uhs-sdr25;
> +	sd-uhs-sdr50;
> +	sd-uhs-sdr104;
> +	sd-uhs-ddr50;
> +
> +	qcom,dll-config = <0x0007442c>;
> +	sdhci-caps-mask = <0x3 0x0>;
> +
> +	status = "okay";
> +};
> +
> +&sleep_clk {
> +	clock-frequency = <32764>;
> +};
> +
> +&swr0 {
> +	status = "okay";
> +
> +	spk_amp_l: speaker@0,0 {
> +		compatible = "sdw20217020400";
> +		reg = <0 0>;
> +
> +		pinctrl-0 = <&spkr_1_sd_n_active>;
> +		pinctrl-names = "default";
> +
> +		powerdown-gpios = <&tlmm 7 GPIO_ACTIVE_LOW>;
> +
> +		vdd-1p8-supply = <&vreg_l10b_1p8>;
> +		vdd-io-supply = <&vreg_l10b_1p8>;
> +
> +		#sound-dai-cells = <0>;
> +		sound-name-prefix = "SpkrLeft";
> +		qcom,port-mapping = <1 2 3 7 10 13>;
> +	};
> +
> +	spk_amp_r: speaker@0,1 {
> +		compatible = "sdw20217020400";
> +		reg = <0 1>;
> +
> +		pinctrl-0 = <&spkr_2_sd_n_active>;
> +		pinctrl-names = "default";
> +
> +		powerdown-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
> +
> +		vdd-1p8-supply = <&vreg_l10b_1p8>;
> +		vdd-io-supply = <&vreg_l10b_1p8>;
> +
> +		#sound-dai-cells = <0>;
> +		sound-name-prefix = "SpkrRight";
> +		qcom,port-mapping = <4 5 6 7 11 13>;
> +	};
> +};
> +
> +&tlmm {
> +	gpio-reserved-ranges = <32 8>;
> +
> +	bt_default: bt-default-state {
> +		bt-en-pins {
> +			pins = "gpio81";
> +			function = "gpio";
> +			drive-strength = <16>;
> +			bias-disable;
> +		};
> +
> +		sw-ctrl-pins {
> +			pins = "gpio82";
> +			function = "gpio";
> +			bias-pull-down;
> +		};
> +	};
> +
> +	fan_pwr_active: fan-pwr-active-state {
> +		pins = "gpio31";
> +		function = "gpio";
> +		drive-strength = <2>;
> +		bias-disable;
> +		output-low;
> +	};
> +
> +	fan_int: fan-int-state {
> +		pins = "gpio64";
> +		function = "gpio";
> +		drive-strength = <2>;
> +		bias-pull-up;
> +	};
> +
> +	upd720201_active: upd720201-active-state {
> +		pins = "gpio10",  "gpio13", "gpio18";
> +		function = "gpio";
> +		drive-strength = <2>;
> +		bias-pull-up;
> +		output-high;
> +	};
> +
> +	gamepad_pwr_en: gamepad-pwr-en-active-state {
> +		pins = "gpio52";
> +		function = "gpio";
> +		drive-strength = <2>;
> +		bias-disable;
> +		output-high;
> +	};
> +
> +	qup_uart11_default: qup-uart11-default-state {
> +		/* TX, RX */
> +		pins = "gpio70", "gpio71";
> +		function = "qup2_se3";
> +		drive-strength = <2>;
> +		bias-disable;
> +	};
> +
> +	sde_dsi_active: sde-dsi-active-state {
> +		pins = "gpio133";
> +		function = "gpio";
> +		drive-strength = <8>;
> +		bias-disable;
> +		output-high;
> +	};
> +
> +	sde_dsi_suspend: sde-dsi-suspend-state {
> +		pins = "gpio133";
> +		function = "gpio";
> +		drive-strength = <2>;
> +		bias-pull-down;
> +	};
> +
> +	sde_te_active: sde-te-active-state {
> +		pins = "gpio86";
> +		function = "mdp_vsync";
> +		drive-strength = <2>;
> +		bias-pull-down;
> +	};
> +
> +	sde_te_suspend: sde-te-suspend-state {
> +		pins = "gpio86";
> +		function = "mdp_vsync";
> +		drive-strength = <2>;
> +		bias-pull-down;
> +	};
> +
> +	wlan_en: wlan-en-state {
> +		pins = "gpio80";
> +		function = "gpio";
> +		drive-strength = <8>;
> +		bias-pull-down;
> +	};
> +
> +	spkr_1_sd_n_active: spkr-1-sd-n-active-state {
> +		pins = "gpio7";
> +		function = "gpio";
> +		drive-strength = <16>;
> +		bias-disable;
> +		output-high;
> +	};
> +
> +	spkr_2_sd_n_active: spkr-2-sd-n-active-state {
> +		pins = "gpio12";
> +		function = "gpio";
> +		drive-strength = <16>;
> +		bias-disable;
> +		output-high;
> +	};
> +};
> +
> +&pm8550_pwm {
> +	status = "okay";
> +};
> +
> +&xo_board {
> +	clock-frequency = <76800000>;
> +};
> +
> +&gpi_dma1 {
> +	status = "okay";
> +};
> +
> +&gpi_dma2 {
> +	status = "okay";
> +};
> +
> +&gpu {
> +	status = "okay";
> +
> +	zap-shader {
> +		firmware-name = "qcom/sm8550/a740_zap.mbn";
> +	};
> +};
> +
> +&gpu_opp_table {
> +	/* Additional speedbin for Adreno A32
> +	 *	719000000  RPMH_REGULATOR_LEVEL_SVS_L2
> +	 *	746000000 RPMH_REGULATOR_LEVEL_NOM
> +	 *	794000000 RPMH_REGULATOR_LEVEL_NOM_L1
> +	 *	827000000 RPMH_REGULATOR_LEVEL_TURBO
> +	 *	860000000 RPMH_REGULATOR_LEVEL_TURBO_L1
> +	 *	1000000000 RPMH_REGULATOR_LEVEL_TURBO_L2
> +	 */
> +	opp-719000000 {
> +		opp-hz = /bits/ 64 <719000000>;
> +		opp-level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
> +		opp-peak-kBps = <10687500>; // Level 7
> +		qcom,opp-acd-level = <0x882e5ffd>;
> +	};
> +
> +	opp-746000000 {
> +		opp-hz = /bits/ 64 <746000000>;
> +		opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
> +		opp-peak-kBps = <10687500>; // Level 7
> +		qcom,opp-acd-level = <0x882e5ffd>;
> +	};
> +
> +	opp-794000000 {
> +		opp-hz = /bits/ 64 <794000000>;
> +		opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
> +		opp-peak-kBps = <14398438>; // Level 8
> +		qcom,opp-acd-level = <0xa82d5ffd>;
> +	};
> +
> +	opp-827000000 {
> +		opp-hz = /bits/ 64 <827000000>;
> +		opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
> +		opp-peak-kBps = <16500000>; // Level 9
> +		qcom,opp-acd-level = <0xa82d5ffd>;
> +	};
> +
> +	opp-860000000 {
> +		opp-hz = /bits/ 64 <860000000>;
> +		opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
> +		opp-peak-kBps = <16500000>; // Level 9
> +		qcom,opp-acd-level = <0x882d5ffd>;
> +	};
> +
> +	opp-1000000000 {
> +		opp-hz = /bits/ 64 <1000000000>;
> +		opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L2>;
> +		opp-peak-kBps = <16500000>; // Level 9
> +		qcom,opp-acd-level = <0x882d5ffd>;
> +	};
> +};
> +
> +&i2c_master_hub_0 {
> +	status = "okay";
> +};
> +
> +&i2c_hub_2 {
> +	status = "okay";
> +
> +	typec-retimer@1c {
> +		compatible = "onnn,nb7vpq904m";
> +		reg = <0x1c>;
> +		vcc-supply = <&vreg_l15b_1p8>;
> +
> +		retimer-switch;
> +		orientation-switch;
> +
> +		ports {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			port@0 {
> +				reg = <0>;
> +
> +				redriver_ss_out: endpoint {
> +					remote-endpoint = <&pmic_glink_ss_in>;
> +				};
> +			};
> +
> +			port@1 {
> +				reg = <1>;
> +
> +				redriver_ss_in: endpoint {
> +					data-lanes = <3 2 1 0>;
> +					remote-endpoint = <&usb_dp_qmpphy_out>;
> +				};
> +			};
> +		};
> +	};
> +};
> +
> +&mdss {
> +	status = "okay";
> +};
> +
> +&mdss_dsi0 {
> +	vdda-supply = <&vreg_l3e_1p2>;
> +	status = "okay";
> +
> +	display_panel: panel@0 {
> +		reg = <0>;
> +
> +		pinctrl-0 = <&sde_dsi_active>, <&sde_te_active>;
> +		pinctrl-1 = <&sde_dsi_suspend>, <&sde_te_suspend>;
> +		pinctrl-names = "default", "sleep";
> +	};

The panel compatible is not added in the main board file, this is wrong
and leaves a node without compatible.

I guess you did not test your DT files against the bindings

> +};
> +
> +&mdss_dsi0_phy {
> +	vdds-supply = <&vreg_l1e_0p88>;
> +	status = "okay";
> +};
> +
> +&mdss_dp0 {
> +	status = "okay";
> +};
> +
> +&mdss_dp0_out {
> +	data-lanes = <0 1>;
> +};
> +
> +&pcie0 {
> +	wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
> +	perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
> +
> +	max-link-speed = <2>;
> +
> +	pinctrl-0 = <&pcie0_default_state>;
> +	pinctrl-names = "default";
> +
> +	status = "okay";
> +};
> +
> +&pcie1 {
> +	wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>;
> +	perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>;
> +
> +	pinctrl-0 = <&pcie1_default_state>, <&upd720201_active>, <&gamepad_pwr_en>;


This is wrong, please add an upd720201 node like the ayaneo pocket s2

> +	pinctrl-names = "default";
> +
> +	status = "okay";
> +};
> +
> +&pcie1_phy {
> +	vdda-phy-supply = <&vreg_l3c_0p9>;
> +	vdda-pll-supply = <&vreg_l3e_1p2>;
> +	vdda-qref-supply = <&vreg_l1e_0p88>;
> +
> +	status = "okay";
> +};
> +
> +&ufs_mem_hc {
> +	reset-gpios = <&tlmm 210 GPIO_ACTIVE_LOW>;
> +
> +	vcc-supply = <&vreg_l17b_2p5>;
> +	vcc-max-microamp = <1300000>;
> +	vccq-supply = <&vreg_l1g_1p2>;
> +	vccq-max-microamp = <1200000>;
> +	vdd-hba-supply = <&vreg_l3g_1p2>;
> +
> +	status = "okay";
> +};
> +
> +&ufs_mem_phy {
> +	vdda-phy-supply = <&vreg_l1d_0p88>;
> +	vdda-pll-supply = <&vreg_l3e_1p2>;
> +
> +	status = "okay";
> +};
> +
> +&usb_1 {
> +	status = "okay";
> +};
> +
> +&usb_1_dwc3_hs {
> +	remote-endpoint = <&pmic_glink_hs_in>;
> +};
> +
> +&usb_1_hsphy {
> +	vdd-supply = <&vreg_l1e_0p88>;
> +	vdda12-supply = <&vreg_l3e_1p2>;
> +
> +	phys = <&pm8550b_eusb2_repeater>;
> +
> +	status = "okay";
> +};
> +
> +&usb_dp_qmpphy {
> +	vdda-phy-supply = <&vreg_l3e_1p2>;
> +	vdda-pll-supply = <&vreg_l3f_0p88>;
> +
> +	status = "okay";
> +};
> +
> +&usb_dp_qmpphy_out {
> +	remote-endpoint = <&redriver_ss_in>;
> +};
> +
> +&uart7 {
> +	status = "okay";
> +};
> +
> +&uart14 {
> +	status = "okay";
> +
> +	bluetooth {
> +		compatible = "qcom,wcn7850-bt";
> +
> +		vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
> +		vddaon-supply = <&vreg_pmu_aon_0p59>;
> +		vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
> +		vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
> +		vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
> +		vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
> +		vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>;
> +
> +		max-speed = <3200000>;
> +	};
> +};
> +
> +&iris {
> +	status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/qcom/qcs8550-ayaneo-pocketds.dts b/arch/arm64/boot/dts/qcom/qcs8550-ayaneo-pocketds.dts
> new file mode 100644
> index 000000000000..723b027fa73b
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/qcs8550-ayaneo-pocketds.dts
> @@ -0,0 +1,170 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2025, Teguh Sobirin.
> + * Copyright (c) 2025, ROCKNIX (https://github.com/ROCKNIX)
> + */
> +
> +/dts-v1/;
> +
> +#include "qcs8550-ayaneo-pocket-common.dtsi"
> +
> +/ {
> +	model = "AYANEO Pocket DS";
> +	compatible = "ayaneo,pocketds", "qcom,sm8550";
> +	rocknix-u-boot-dt-id = "u-boot-pocket-ds";
> +
> +	tca6424_vcc: regulator-tca6424-vcc {
> +		compatible = "regulator-fixed";
> +		regulator-name = "tca6424_vcc";
> +
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +
> +		gpio = <&tlmm 168 GPIO_ACTIVE_HIGH>;
> +		enable-active-high;
> +		regulator-boot-on;
> +		regulator-state-mem {
> +			regulator-off-in-suspend;
> +		};
> +	};
> +
> +	vdd_ts: vdd-ts {
> +		compatible = "regulator-fixed";
> +		regulator-name = "vdd_ts_en";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		gpio = <&tca6408 1 GPIO_ACTIVE_HIGH>;
> +		enable-active-high;
> +	};
> +
> +};
> +
> +&tlmm {
> +	gpio-reserved-ranges = <32 4>;
> +	panel_pwr_active: panel-pwr-active-state {
> +		pins = "gpio152", "gpio153";
> +		function = "gpio";
> +		drive-strength = <8>;
> +		bias-disable;
> +		output-high;
> +	};
> +
> +	sde_dsi1_active: sde-dsi1-active-state {
> +		pins = "gpio137";
> +		function = "gpio";
> +		drive-strength = <8>;
> +		bias-disable;
> +		output-high;
> +	};
> +
> +	sde_dsi1_suspend: sde-dsi1-suspend-state {
> +		pins = "gpio137";
> +		function = "gpio";
> +		drive-strength = <2>;
> +		bias-pull-down;
> +	};
> +
> +	ts_rst_default: ts-rst-default-state {
> +		pins = "gpio24";
> +		function = "gpio";
> +		bias-pull-up;
> +		drive-strength = <8>;
> +	};
> +
> +	ts_rst_sleep: ts-rst-sleep-state {
> +		pins = "gpio24";
> +		function = "gpio";
> +		bias-pull-down;
> +		drive-strength = <2>;
> +	};
> +
> +	ts_int_default: ts-int-default-state {
> +		pins = "gpio25";
> +		function = "gpio";
> +		bias-pull-up;
> +		drive-strength = <8>;
> +	};
> +
> +	ts_int_sleep: ts-int-sleep-state {
> +		pins = "gpio25";
> +		function = "gpio";
> +		bias-pull-down;
> +		drive-strength = <2>;
> +	};
> +
> +	ts2_irq: ts2-irq-state {
> +		pins = "gpio39";
> +		function = "gpio";
> +		drive-strength = <8>;
> +		bias-disable;
> +	};
> +
> +	ts2_reset: ts2-reset-state {
> +		pins = "gpio38";
> +		function = "gpio";
> +		drive-strength = <8>;
> +		bias-pull-down;
> +	};
> +};
> +
> +&i2c0 {
> +	clock-frequency = <400000>;
> +	status = "okay";
> +
> +	tca6408: tca64_20@20 {
> +		gpio-controller;
> +		compatible = "ti,tca6408";
> +		status = "okay";
> +		reg = <0x20>;
> +		#gpio-cells = <0x02>;
> +		vcc-supply = <&tca6424_vcc>;
> +	};
> +};
> +
> +&i2c2 {
> +	clock-frequency = <400000>;
> +	status = "okay";
> +
> +	touchscreen@5d {
> +		reg = <0x5d>;
> +		compatible = "goodix,gt911";
> +
> +		interrupt-parent = <&tlmm>;
> +		interrupts = <39 IRQ_TYPE_EDGE_FALLING>;
> +
> +		reset-gpios = <&tlmm 38 GPIO_ACTIVE_HIGH>;
> +		irq-gpios = <&tlmm 39 GPIO_ACTIVE_HIGH>;
> +		VDDIO-supply = <&vdd_ts>;
> +
> +		touchscreen-size-x = <768>;
> +		touchscreen-size-y = <1024>;
> +
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&ts2_reset>, <&ts2_irq>;
> +
> +	};
> +};
> +
> +&i2c4 {
> +	clock-frequency = <400000>;
> +	status = "okay";
> +	touchscreen: touchscreen@38 {
> +		compatible = "focaltech,ft5426";
> +		reg = <0x38>;
> +
> +		interrupt-parent = <&tlmm>;
> +		interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
> +
> +		reset-gpios = <&tlmm 24 GPIO_ACTIVE_LOW>;
> +
> +		vcc-supply = <&vreg_l14b_3p2>;
> +		iovcc-supply = <&vreg_l12b_1p8>;
> +
> +		pinctrl-0 = <&ts_int_default &ts_rst_default>;
> +		pinctrl-1 = <&ts_int_sleep &ts_rst_sleep>;
> +		pinctrl-names = "default", "sleep";
> +
> +		touchscreen-size-x = <1080>;
> +		touchscreen-size-y = <1920>;
> +	};
> +};
> 

Why 2 touch controllers ?

Thanks,
Neil

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 2/2] arm64: dts: qcom: add basic devicetree for Ayaneo Pocket DS gaming console
  2026-05-11  8:19   ` Neil Armstrong
@ 2026-05-11  9:14     ` Konrad Dybcio
  0 siblings, 0 replies; 8+ messages in thread
From: Konrad Dybcio @ 2026-05-11  9:14 UTC (permalink / raw)
  To: Neil Armstrong, azkali.limited, Bjorn Andersson, Konrad Dybcio,
	Rob Herring, Krzysztof Kozlowski, Conor Dooley
  Cc: linux-arm-msm, devicetree, linux-kernel, Teguh Sobirin

On 5/11/26 10:19 AM, Neil Armstrong wrote:
> Hi,
> 
> On 5/10/26 18:05, Alexandre Hamamdjian via B4 Relay wrote:
>> From: Teguh Sobirin <teguh@sobir.in>
>>
>> Add initial device tree support for the Ayaneo Pocket DS gaming
>> console based on the Qualcomm QCS8550 platform.
>>
>> The board file is split into qcs8550-ayaneo-pocket-common.dtsi and
>> qcs8550-ayaneo-pocketds.dts in anticipation of additional boards in
>> the same family that share the QCS8550 base. Only the Pocket DS has
>> been verified on hardware so far; the shared dtsi is intended to pick
>> up sibling boards as they are submitted.
> 
> Please don't, this is dead code, please send a single file and then
> split it when you introduce variants boards.
> 
>>
>> Co-developed-by: Alexandre Hamamdjian <azkali.limited@gmail.com>
>> Signed-off-by: Alexandre Hamamdjian <azkali.limited@gmail.com>
>> Signed-off-by: Teguh Sobirin <teguh@sobir.in>
>> ---

[...]

>> +&i2c4 {
>> +    clock-frequency = <400000>;
>> +    status = "okay";
>> +    touchscreen: touchscreen@38 {
>> +        compatible = "focaltech,ft5426";
>> +        reg = <0x38>;
>> +
>> +        interrupt-parent = <&tlmm>;
>> +        interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
>> +
>> +        reset-gpios = <&tlmm 24 GPIO_ACTIVE_LOW>;
>> +
>> +        vcc-supply = <&vreg_l14b_3p2>;
>> +        iovcc-supply = <&vreg_l12b_1p8>;
>> +
>> +        pinctrl-0 = <&ts_int_default &ts_rst_default>;
>> +        pinctrl-1 = <&ts_int_sleep &ts_rst_sleep>;
>> +        pinctrl-names = "default", "sleep";
>> +
>> +        touchscreen-size-x = <1080>;
>> +        touchscreen-size-y = <1920>;
>> +    };
>> +};
>>
> 
> Why 2 touch controllers ?

DS = "Dual Screen", presumably

Konrad

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 2/2] arm64: dts: qcom: add basic devicetree for Ayaneo Pocket DS gaming console
  2026-05-10 16:05 ` [PATCH 2/2] arm64: dts: qcom: add basic devicetree for Ayaneo Pocket DS gaming console Alexandre Hamamdjian via B4 Relay
  2026-05-11  8:19   ` Neil Armstrong
@ 2026-05-11  9:19   ` Konrad Dybcio
  2026-05-11 22:11   ` sashiko-bot
  2 siblings, 0 replies; 8+ messages in thread
From: Konrad Dybcio @ 2026-05-11  9:19 UTC (permalink / raw)
  To: azkali.limited, Bjorn Andersson, Konrad Dybcio, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley
  Cc: linux-arm-msm, devicetree, linux-kernel, Teguh Sobirin

On 5/10/26 6:05 PM, Alexandre Hamamdjian via B4 Relay wrote:
> From: Teguh Sobirin <teguh@sobir.in>
> 
> Add initial device tree support for the Ayaneo Pocket DS gaming
> console based on the Qualcomm QCS8550 platform.
> 
> The board file is split into qcs8550-ayaneo-pocket-common.dtsi and
> qcs8550-ayaneo-pocketds.dts in anticipation of additional boards in
> the same family that share the QCS8550 base. Only the Pocket DS has
> been verified on hardware so far; the shared dtsi is intended to pick
> up sibling boards as they are submitted.
> 
> Co-developed-by: Alexandre Hamamdjian <azkali.limited@gmail.com>
> Signed-off-by: Alexandre Hamamdjian <azkali.limited@gmail.com>
> Signed-off-by: Teguh Sobirin <teguh@sobir.in>
> ---

[...]

> +		splash_region: splash_region@b8000000 {

underscores in node names are frowned  upon

> +			reg = <0x0 0xb8000000 0x0 0x2b00000>;
> +			label = "cont_splash_region";

Is this label any useful?

> +			no-map;
> +		};
> +	};
> +
> +	sound {
> +		status = "okay";

It's already 'okay' if previously not disabled, please drop this line


> +		compatible = "qcom,sm8550-sndcard", "qcom,sm8450-sndcard";
> +		model = "SM8550-APS";
> +		audio-routing = "SpkrLeft IN", "WSA_SPK1 OUT",
> +				"SpkrRight IN", "WSA_SPK2 OUT",
> +				"VA DMIC0", "vdd-micb",
> +				"VA DMIC1", "vdd-micb";
> +
> +		wsa-dai-link {
> +			link-name = "WSA Playback";
> +
> +			cpu {

'co'dec < 'cp'u < 'p'latform

> +				sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>;
> +			};
> +
> +			codec {
> +				sound-dai = <&spk_amp_l>,
> +					<&spk_amp_r>,
> +					<&swr0 0>,
> +					<&lpass_wsamacro 0>;

Please align these entries

[...]

> +	thermal-zones {
> +		cpuss0-thermal {

You should really be overriding nodes by &labels, this is fragile as-is,
since even if someone deletes the thermal zone nodes, DTC will happily
compile this (and it won't work)

> +			polling-delay = <200>;
> +			trips {

Let's add an \n between the last property and the followng subnodes

> +				cpuss0_fan0: trip-point2 {
> +					temperature = <40000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +					};

Please remove the extra \t here and separate subsequent nodes
with a \n

[...]

> +	vdd_fan_5v0: vdd-fan-5v0-regulator {
> +		compatible = "regulator-fixed";
> +		regulator-name = "vdd_fan_5v0";
> +
> +		regulator-min-microvolt = <5000000>;
> +		regulator-max-microvolt = <5000000>;
> +
> +		gpio = <&tlmm 31 GPIO_ACTIVE_HIGH>;
> +		enable-active-high;
> +
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&fan_pwr_active>;

property-n
property-names

file-wide, please

> +
> +		regulator-state-mem {
> +			regulator-off-in-suspend;
> +		};
> +	};
> +
> +	vph_pwr: regulator-vph-pwr {
> +		compatible = "regulator-fixed";
> +		regulator-name = "  vph_pwr";

stray spaces after "


> +&gpu {
> +	status = "okay";
> +
> +	zap-shader {

Please use the &gpu_zap_shader label to override

> +		firmware-name = "qcom/sm8550/a740_zap.mbn";
> +	};
> +};
> +
> +&gpu_opp_table {
> +	/* Additional speedbin for Adreno A32
> +	 *	719000000  RPMH_REGULATOR_LEVEL_SVS_L2
> +	 *	746000000 RPMH_REGULATOR_LEVEL_NOM
> +	 *	794000000 RPMH_REGULATOR_LEVEL_NOM_L1
> +	 *	827000000 RPMH_REGULATOR_LEVEL_TURBO
> +	 *	860000000 RPMH_REGULATOR_LEVEL_TURBO_L1
> +	 *	1000000000 RPMH_REGULATOR_LEVEL_TURBO_L2
> +	 */
> +	opp-719000000 {
> +		opp-hz = /bits/ 64 <719000000>;
> +		opp-level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
> +		opp-peak-kBps = <10687500>; // Level 7

Let's drop these inline comments

[...]

> +&mdss_dsi0 {
> +	vdda-supply = <&vreg_l3e_1p2>;
> +	status = "okay";

Please keep an \n before 'status'

[...]

> +&mdss_dp0_out {
> +	data-lanes = <0 1>;
> +};

Only 2 lanes? Are the other 2 not wired up?


> +
> +&pcie0 {
> +	wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
> +	perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
> +
> +	max-link-speed = <2>;

Are there issues with Gen3-speed links?

[...]

> +&i2c2 {
> +	clock-frequency = <400000>;
> +	status = "okay";
> +
> +	touchscreen@5d {
> +		reg = <0x5d>;
> +		compatible = "goodix,gt911";
> +
> +		interrupt-parent = <&tlmm>;
> +		interrupts = <39 IRQ_TYPE_EDGE_FALLING>;
> +
> +		reset-gpios = <&tlmm 38 GPIO_ACTIVE_HIGH>;
> +		irq-gpios = <&tlmm 39 GPIO_ACTIVE_HIGH>;
> +		VDDIO-supply = <&vdd_ts>;
> +
> +		touchscreen-size-x = <768>;
> +		touchscreen-size-y = <1024>;
> +
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&ts2_reset>, <&ts2_irq>;
> +
> +	};

Stray \n above

Does userspace somehow map these touchpanels to the right display,
or do you need to bind them somehow?

Konrad

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 1/2] dt-bindings: arm: qcom: document the Ayaneo Pocket DS
  2026-05-10 16:05 ` [PATCH 1/2] dt-bindings: arm: qcom: document the Ayaneo Pocket DS Alexandre Hamamdjian via B4 Relay
@ 2026-05-11 21:26   ` sashiko-bot
  0 siblings, 0 replies; 8+ messages in thread
From: sashiko-bot @ 2026-05-11 21:26 UTC (permalink / raw)
  To: Alexandre Hamamdjian via B4 Relay; +Cc: conor+dt, robh, devicetree, krzk+dt

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The compatible string 'ayaneo,pocketds' omits a hyphen between words, violating typical devicetree naming conventions and internal consistency.
--

commit 3beb9c18c4855d596e09aceb2276fb3c8a70aff3
Author: Teguh Sobirin <teguh@sobir.in>

dt-bindings: arm: qcom: document the Ayaneo Pocket DS

This commit documents the device tree bindings for the Ayaneo Pocket DS
gaming console. It maps the new device to the Qualcomm QCS8550 and SM8550
platforms.

> diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
> index 2741c07e9f416..f130a6b092b95 100644
> --- a/Documentation/devicetree/bindings/arm/qcom.yaml
> +++ b/Documentation/devicetree/bindings/arm/qcom.yaml
[ ... ]
> @@ -1107,6 +1107,12 @@ properties:
>            - const: qcom,qcs8550
>            - const: qcom,sm8550
>  
> +      - items:
> +          - enum:
> +              - ayaneo,pocketds

This isn't a bug, but should this compatible string include a hyphen
between the words (ayaneo,pocket-ds)? Standard devicetree naming
conventions typically use hyphens to separate words, and it would match
the existing format used for the Ayaneo Pocket S2 below.

> +          - const: qcom,qcs8550
> +          - const: qcom,sm8550
> +
>        - items:
>            - enum:
>                - ayaneo,pocket-s2

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260510-pocketds-v1-0-cf05acec06af@gmail.com?part=1

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 2/2] arm64: dts: qcom: add basic devicetree for Ayaneo Pocket DS gaming console
  2026-05-10 16:05 ` [PATCH 2/2] arm64: dts: qcom: add basic devicetree for Ayaneo Pocket DS gaming console Alexandre Hamamdjian via B4 Relay
  2026-05-11  8:19   ` Neil Armstrong
  2026-05-11  9:19   ` Konrad Dybcio
@ 2026-05-11 22:11   ` sashiko-bot
  2 siblings, 0 replies; 8+ messages in thread
From: sashiko-bot @ 2026-05-11 22:11 UTC (permalink / raw)
  To: Alexandre Hamamdjian via B4 Relay; +Cc: krzk+dt, conor+dt, robh, devicetree

Thank you for your contribution! Sashiko AI review found 8 potential issue(s) to consider:
- [High] Missing `compatible` string on the primary display panel.
- [High] Missing `cooling-maps` for fan thermal trip points.
- [Medium] PCIe peripheral power and enable signals are hardcoded via pinctrl.
- [Medium] Conflicting `output-low` pinctrl state for a regulator-managed GPIO.
- [Medium] Missing `pinctrl-1` property in the `pwm_fan` node.
- [Low] Inclusion of undocumented, downstream-specific devicetree property `rocknix-u-boot-dt-id`.
- [Low] Leading spaces in `vph_pwr` regulator name.
- [Low] Orphaned pinctrl nodes for a missing secondary display.
--

commit a48e1f08f4a1d52011fe6aeaf547a479fe5b3a94
Author: Teguh Sobirin <teguh@sobir.in>
arm64: dts: qcom: add basic devicetree for Ayaneo Pocket DS gaming console

This commit adds initial device tree support for the Ayaneo Pocket DS
gaming console based on the Qualcomm QCS8550 platform.

> diff --git a/arch/arm64/boot/dts/qcom/qcs8550-ayaneo-pocket-common.dtsi b/arch/arm64/boot/dts/qcom/qcs8550-ayaneo-pocket-common.dtsi
> new file mode 100644
> index 0000000000000..8d215a9d31d54
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/qcs8550-ayaneo-pocket-common.dtsi

[ ... ]

> +	thermal-zones {
> +		cpuss0-thermal {
> +			polling-delay = <200>;
> +			trips {
> +				cpuss0_fan0: trip-point2 {
> +					temperature = <40000>;
> +					hysteresis = <3000>;
> +					type = "passive";
> +					};

Should these thermal zones include a cooling-maps block? Without it, the
passive trip points don't seem to bind to the pwm_fan cooling device, meaning
the thermal framework won't automatically scale the fan based on temperature.

[ ... ]

> +	vph_pwr: regulator-vph-pwr {
> +		compatible = "regulator-fixed";
> +		regulator-name = "  vph_pwr";

This isn't a bug, but there are leading spaces in the regulator name. Will
this cause formatting issues in sysfs or break userspace tools that parse the
regulator tree?

> +		regulator-min-microvolt = <3700000>;
> +		regulator-max-microvolt = <3700000>;
> +
> +		regulator-always-on;
> +		regulator-boot-on;
> +	};
> +
> +	pwm_fan: pwm-fan {
> +		compatible = "pwm-fan";
> +
> +		pinctrl-names = "default", "sleep";
> +		pinctrl-0 = <&fan_pwm_active>, <&fan_int>;

Should this node include a pinctrl-1 property? The sleep state is declared in
pinctrl-names, but the corresponding configuration is missing, which might
cause the pinctrl framework to fail during power management transitions.

> +
> +		fan-supply = <&vdd_fan_5v0>;
> +		pwms = <&pm8550_pwm 3 40000>;

[ ... ]

> +	fan_pwr_active: fan-pwr-active-state {
> +		pins = "gpio31";
> +		function = "gpio";
> +		drive-strength = <2>;
> +		bias-disable;
> +		output-low;
> +	};

Does the output-low property here conflict with the regulator subsystem? This
state is used by the vdd_fan_5v0 fixed regulator, which already manages the
GPIO's output direction and logic level natively.

[ ... ]

> +&mdss_dsi0 {
> +	vdda-supply = <&vreg_l3e_1p2>;
> +	status = "okay";
> +
> +	display_panel: panel@0 {
> +		reg = <0>;
> +
> +		pinctrl-0 = <&sde_dsi_active>, <&sde_te_active>;

Is this panel missing a compatible string? Without it, the DRM panel driver
will not be able to probe and bind to the hardware, rendering the primary
display non-functional.

> +		pinctrl-1 = <&sde_dsi_suspend>, <&sde_te_suspend>;
> +		pinctrl-names = "default", "sleep";
> +	};
> +};

[ ... ]

> +&pcie1 {
> +	wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>;
> +	perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>;
> +
> +	pinctrl-0 = <&pcie1_default_state>, <&upd720201_active>, <&gamepad_pwr_en>;

Is it intended to manage the downstream USB controller and gamepad enable
GPIOs directly at the PCIe host level?

Hardcoding them here bypasses the proper device-specific power management and
might break suspend/resume sequencing since the peripherals will remain
unconditionally powered while the PCIe controller is active.

> +	pinctrl-names = "default";
> +
> +	status = "okay";
> +};

[ ... ]

> diff --git a/arch/arm64/boot/dts/qcom/qcs8550-ayaneo-pocketds.dts b/arch/arm64/boot/dts/qcom/qcs8550-ayaneo-pocketds.dts
> new file mode 100644
> index 0000000000000..723b027fa73bd
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/qcs8550-ayaneo-pocketds.dts

[ ... ]

> +/ {
> +	model = "AYANEO Pocket DS";
> +	compatible = "ayaneo,pocketds", "qcom,sm8550";
> +	rocknix-u-boot-dt-id = "u-boot-pocket-ds";

Is this downstream-specific property intended to be upstreamed? Devicetrees
usually describe hardware topology rather than downstream OS or bootloader
identifiers.

> +
> +	tca6424_vcc: regulator-tca6424-vcc {

[ ... ]

> +&tlmm {
> +	gpio-reserved-ranges = <32 4>;
> +	panel_pwr_active: panel-pwr-active-state {
> +		pins = "gpio152", "gpio153";
> +		function = "gpio";
> +		drive-strength = <8>;
> +		bias-disable;
> +		output-high;
> +	};
> +
> +	sde_dsi1_active: sde-dsi1-active-state {
> +		pins = "gpio137";
> +		function = "gpio";
> +		drive-strength = <8>;
> +		bias-disable;
> +		output-high;
> +	};
> +
> +	sde_dsi1_suspend: sde-dsi1-suspend-state {
> +		pins = "gpio137";
> +		function = "gpio";
> +		drive-strength = <2>;
> +		bias-pull-down;
> +	};

Are these pinctrl states needed? They appear to be orphaned since the
secondary display node (&mdss_dsi1) is not defined in this devicetree.

> +
> +	ts_rst_default: ts-rst-default-state {

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260510-pocketds-v1-0-cf05acec06af@gmail.com?part=2

^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2026-05-11 22:11 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-05-10 16:05 [PATCH 0/2] arm64: qcom: add Ayaneo Pocket DS gaming console Alexandre Hamamdjian via B4 Relay
2026-05-10 16:05 ` [PATCH 1/2] dt-bindings: arm: qcom: document the Ayaneo Pocket DS Alexandre Hamamdjian via B4 Relay
2026-05-11 21:26   ` sashiko-bot
2026-05-10 16:05 ` [PATCH 2/2] arm64: dts: qcom: add basic devicetree for Ayaneo Pocket DS gaming console Alexandre Hamamdjian via B4 Relay
2026-05-11  8:19   ` Neil Armstrong
2026-05-11  9:14     ` Konrad Dybcio
2026-05-11  9:19   ` Konrad Dybcio
2026-05-11 22:11   ` sashiko-bot

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