[PATCH 0/2] clk: qcom: nord: add missing define for the USB2 PHY reset

[PATCH 0/2] clk: qcom: nord: add missing define for the USB2 PHY reset

[Bartosz Golaszewski]

Update the bindings and driver code with the definition for the USB2 PHY
reset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
---
Bartosz Golaszewski (2):
      dt-bindings: clock: qcom: add missing definition for the USB2 PHY reset
      clk: qcom: nord: negcc: add missing definition for the USB2 PHY reset

 drivers/clk/qcom/negcc-nord.c               | 1 +
 include/dt-bindings/clock/qcom,nord-negcc.h | 1 +
 2 files changed, 2 insertions(+)
---
base-commit: e98d21c170b01ddef366f023bbfcf6b31509fa83
change-id: 20260513-nord-clk-usb2-phy-3e60fb0c31d1

Best regards,
-- 
Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>

[PATCH 1/2] dt-bindings: clock: qcom: add missing definition for the USB2 PHY reset

[Bartosz Golaszewski]

The USB2 PHY reset definition is missing from the negcc clock driver and
its bindings. Provide it in order to enable adding the USB nodes in DTS.

Fixes: 06498d59bb4e ("dt-bindings: clock: qcom: Add Nord Global Clock Controller")
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
---
 include/dt-bindings/clock/qcom,nord-negcc.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/dt-bindings/clock/qcom,nord-negcc.h b/include/dt-bindings/clock/qcom,nord-negcc.h
index 95f333d8e1aa7cf1e386b6926380b2c853f7cf43..c2d048d9fc9e98d04658de665a1928297bde035a 100644
--- a/include/dt-bindings/clock/qcom,nord-negcc.h
+++ b/include/dt-bindings/clock/qcom,nord-negcc.h
@@ -120,5 +120,6 @@
 #define NE_GCC_USB3_PHY_SEC_BCR					10
 #define NE_GCC_USB3PHY_PHY_PRIM_BCR				11
 #define NE_GCC_USB3PHY_PHY_SEC_BCR				12
+#define NE_GCC_QUSB3PHY_PRIM_BCR				13
 
 #endif

-- 
2.47.3

Re: [PATCH 1/2] dt-bindings: clock: qcom: add missing definition for the USB2 PHY reset

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The newly added reset macro is incorrectly named `NE_GCC_QUSB3PHY_PRIM_BCR` instead of `NE_GCC_QUSB2PHY_PRIM_BCR`, contradicting the commit message.
--

commit 995687d91ac26d49f12e0c08bcd404ce73e33d6c
Author: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>

dt-bindings: clock: qcom: add missing definition for the USB2 PHY reset

This commit adds the missing USB2 PHY reset definition to the nord-negcc
clock bindings header. This provides the definition needed to add the USB
nodes in the device tree.

> diff --git a/include/dt-bindings/clock/qcom,nord-negcc.h b/include/dt-bindings/clock/qcom,nord-negcc.h
> index 95f333d8e1aa7..c2d048d9fc9e9 100644
> --- a/include/dt-bindings/clock/qcom,nord-negcc.h
> +++ b/include/dt-bindings/clock/qcom,nord-negcc.h

[ ... ]

> @@ -120,5 +120,6 @@
>  #define NE_GCC_USB3_PHY_SEC_BCR					10
>  #define NE_GCC_USB3PHY_PHY_PRIM_BCR				11
>  #define NE_GCC_USB3PHY_PHY_SEC_BCR				12
> +#define NE_GCC_QUSB3PHY_PRIM_BCR				13

The commit message indicates this patch adds the USB2 PHY reset definition,
but the introduced macro is named NE_GCC_QUSB3PHY_PRIM_BCR.

Is this a typo? Should the macro be named NE_GCC_QUSB2PHY_PRIM_BCR to reflect
a USB2 PHY rather than a USB3 PHY before it becomes locked into the
dt-bindings API?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260513-nord-clk-usb2-phy-v1-0-8eafcb2d5129@oss.qualcomm.com?part=1

[PATCH 2/2] clk: qcom: nord: negcc: add missing definition for the USB2 PHY reset

[Bartosz Golaszewski]

The USB2 PHY reset definition is missing from the negcc clock driver and
its bindings. Provide it in order to enable adding the USB nodes in DTS.

Fixes: a4f780cd5c7a ("clk: qcom: gcc: Add multiple global clock controller driver for Nord SoC")
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
---
 drivers/clk/qcom/negcc-nord.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/qcom/negcc-nord.c b/drivers/clk/qcom/negcc-nord.c
index 1aa24e2784e536e6b6e76f488abd0e2fcc435380..31442d39924a6f79bf39962ebb0de8d5c65fa0b0 100644
--- a/drivers/clk/qcom/negcc-nord.c
+++ b/drivers/clk/qcom/negcc-nord.c
@@ -1918,6 +1918,7 @@ static const struct qcom_reset_map ne_gcc_nord_resets[] = {
 	[NE_GCC_USB3_PHY_SEC_BCR] = { 0x2d000 },
 	[NE_GCC_USB3PHY_PHY_PRIM_BCR] = { 0x2b004 },
 	[NE_GCC_USB3PHY_PHY_SEC_BCR] = { 0x2d004 },
+	[NE_GCC_QUSB3PHY_PRIM_BCR] = { 0x2e000 },
 };
 
 static const struct clk_rcg_dfs_data ne_gcc_nord_dfs_clocks[] = {

-- 
2.47.3

Re: [PATCH 2/2] clk: qcom: nord: negcc: add missing definition for the USB2 PHY reset

[Bartosz Golaszewski]

On Wed, May 13, 2026 at 5:35 PM Bartosz Golaszewski
<bartosz.golaszewski@oss.qualcomm.com> wrote:
>
> The USB2 PHY reset definition is missing from the negcc clock driver and
> its bindings. Provide it in order to enable adding the USB nodes in DTS.
>
> Fixes: a4f780cd5c7a ("clk: qcom: gcc: Add multiple global clock controller driver for Nord SoC")
> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
> ---
>  drivers/clk/qcom/negcc-nord.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/clk/qcom/negcc-nord.c b/drivers/clk/qcom/negcc-nord.c
> index 1aa24e2784e536e6b6e76f488abd0e2fcc435380..31442d39924a6f79bf39962ebb0de8d5c65fa0b0 100644
> --- a/drivers/clk/qcom/negcc-nord.c
> +++ b/drivers/clk/qcom/negcc-nord.c
> @@ -1918,6 +1918,7 @@ static const struct qcom_reset_map ne_gcc_nord_resets[] = {
>         [NE_GCC_USB3_PHY_SEC_BCR] = { 0x2d000 },
>         [NE_GCC_USB3PHY_PHY_PRIM_BCR] = { 0x2b004 },
>         [NE_GCC_USB3PHY_PHY_SEC_BCR] = { 0x2d004 },
> +       [NE_GCC_QUSB3PHY_PRIM_BCR] = { 0x2e000 },
>  };
>
>  static const struct clk_rcg_dfs_data ne_gcc_nord_dfs_clocks[] = {
>
> --
> 2.47.3
>

Please disregard this, the address is correct but it was supposed to
be called NE_GCC_QUSB2PHY_PRIM_BCR instead. I'll send a v2 on Monday.

Bart

Re: [PATCH 2/2] clk: qcom: nord: negcc: add missing definition for the USB2 PHY reset

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The newly introduced UAPI macro for the USB2 PHY reset is incorrectly named `NE_GCC_QUSB3PHY_PRIM_BCR` instead of `NE_GCC_QUSB2PHY_PRIM_BCR`.
--

commit 6d297fb76d38d25ccff03c1716dff37d01275b24
Author: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>

clk: qcom: nord: negcc: add missing definition for the USB2 PHY reset

This commit adds the missing USB2 PHY reset definition to the negcc clock
driver and its bindings. This enables adding the USB nodes in the device
tree.

> diff --git a/drivers/clk/qcom/negcc-nord.c b/drivers/clk/qcom/negcc-nord.c
> index 1aa24e2784e53..31442d39924a6 100644
> --- a/drivers/clk/qcom/negcc-nord.c
> +++ b/drivers/clk/qcom/negcc-nord.c
> @@ -1918,6 +1918,7 @@ static const struct qcom_reset_map ne_gcc_nord_resets[] = {
>  	[NE_GCC_USB3_PHY_SEC_BCR] = { 0x2d000 },
>  	[NE_GCC_USB3PHY_PHY_PRIM_BCR] = { 0x2b004 },
>  	[NE_GCC_USB3PHY_PHY_SEC_BCR] = { 0x2d004 },
> +	[NE_GCC_QUSB3PHY_PRIM_BCR] = { 0x2e000 },

Should this be NE_GCC_QUSB2PHY_PRIM_BCR instead of NE_GCC_QUSB3PHY_PRIM_BCR?

The commit message explicitly states the intention to add the USB2 PHY reset,
and Qualcomm conventions typically use QUSB2 for USB 2.0 PHYs. Since this
macro is part of the device tree bindings, correcting this typo before it
merges will prevent the QUSB3 name from becoming part of the permanent ABI.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260513-nord-clk-usb2-phy-v1-0-8eafcb2d5129@oss.qualcomm.com?part=2