Re: [PATCH 07/22] arm64: dts: qcom: sm8250: Fix the PCIe iommu-map entries

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Critical] Modifying `iommu-map` entries from 4 cells to 5 cells breaks backwards compatibility with older kernels.
- [High] Adding a 5th cell to `iommu-map` entries breaks PCIe on SM8250 because the QCOM PCIe driver hardcodes a 4-cell structure when parsing this property.
--

--- Patch [7]: [PATCH 07/22] arm64: dts: qcom: sm8250: Fix the PCIe iommu-map entries ---
commit a5815a8c934e5c94f8aea5e79e5ac8f47d1465b8
Author: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>

arm64: dts: qcom: sm8250: Fix the PCIe iommu-map entries

The commit updates the iommu-map entries for PCIe to include two cells
for the IOMMU specifier, matching the apps_smmu #iommu-cells property.
This resolves a warning from the OF core about 1-cell entries targeting
2-cell #iommu-cells.

> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index 7076720413ab2..c6f49ae9d253c 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -2190,8 +2190,8 @@ pcie0: pcie@1c00000 {
>  				      "tbu",
>  				      "ddrss_sf_tbu";
>  
> -			iommu-map = <0x0   &apps_smmu 0x1c00 0x1>,
> -				    <0x100 &apps_smmu 0x1c01 0x1>;
> +			iommu-map = <0x0   &apps_smmu 0x1c00 0x0 0x1>,
> +				    <0x100 &apps_smmu 0x1c01 0x0 0x1>;

[Severity: High]
Does this change break the qcom-pcie driver's parsing logic?

Looking at drivers/pci/controller/dwc/pcie-qcom.c, the driver has a fixed
structure it expects for iommu-map entries:

drivers/pci/controller/dwc/pcie-qcom.c:qcom_pcie_config_sid_1_9_0() {
	/* iommu map structure */
	struct {
		u32 bdf;
		u32 phandle;
		u32 smmu_sid;
		u32 smmu_sid_len;
	} *map;
	...
}

If the iommu-map property is updated to contain 5 cells instead of 4, will
this hardcoded struct misalign and read the wrong values for smmu_sid and
length?

[Severity: Critical]
Will this cause a regression for older kernels booting with this updated
device tree?

Prior to commit ccb2fd725d41, the generic of_map_id() function in
drivers/of/base.c enforced a length check that assumed exactly 4 cells per
entry. Adding a 5th cell will cause that modulo check to fail and return
-EINVAL.

Since device trees are often treated as firmware ABI, will older kernels
fail to parse these mappings entirely and break DMA isolation or cause SMMU
faults?

[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260730-iommu-map-fix-v1-0-83405d37ba41@oss.qualcomm.com?part=7