From: Sven Peter <sven@kernel.org>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Heikki Krogerus <heikki.krogerus@linux.intel.com>,
Janne Grunau <j@jannau.net>, Neal Gompa <neal@gompa.dev>,
Andreas Noever <andreas.noever@gmail.com>,
Mika Westerberg <westeri@kernel.org>,
Yehezkel Bernat <YehezkelShB@gmail.com>,
Philipp Zabel <p.zabel@pengutronix.de>
Cc: Konrad Dybcio <konradybcio@kernel.org>,
linux-usb@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, asahi@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
Sven Peter <sven@kernel.org>
Subject: [PATCH 18/19] arm64: dts: apple: t8112: Add USB4 ACIO and NHI
Date: Sun, 30 Aug 2026 22:19:36 +0200 [thread overview]
Message-ID: <20260830-b4-apple-soc-tbt-v1-18-44bc9348683c@kernel.org> (raw)
In-Reply-To: <20260830-b4-apple-soc-tbt-v1-0-44bc9348683c@kernel.org>
Add the ACIO host router, NHI, DART and mailbox nodes for both Type-C
ports on t8112 and connect the host routers to the Type-C connectors.
Signed-off-by: Sven Peter <sven@kernel.org>
---
arch/arm64/boot/dts/apple/t8112-jxxx.dtsi | 61 ++++++++++
arch/arm64/boot/dts/apple/t8112.dtsi | 190 ++++++++++++++++++++++++++++++
2 files changed, 251 insertions(+)
diff --git a/arch/arm64/boot/dts/apple/t8112-jxxx.dtsi b/arch/arm64/boot/dts/apple/t8112-jxxx.dtsi
index 562e7a25a1e8..4c9654f169f4 100644
--- a/arch/arm64/boot/dts/apple/t8112-jxxx.dtsi
+++ b/arch/arm64/boot/dts/apple/t8112-jxxx.dtsi
@@ -13,6 +13,10 @@ / {
aliases {
atcphy0 = &atcphy0;
atcphy1 = &atcphy1;
+ usb4-0-acio = &usb4_0_acio;
+ usb4-0-nhi = &usb4_0_nhi;
+ usb4-1-acio = &usb4_1_acio;
+ usb4-1-nhi = &usb4_1_nhi;
serial0 = &serial0;
serial2 = &serial2;
};
@@ -76,6 +80,13 @@ typec0_connector_ss: endpoint {
remote-endpoint = <&atcphy0_typec_lanes>;
};
};
+
+ port@2 {
+ reg = <2>;
+ typec0_con_tbt: endpoint {
+ remote-endpoint = <&usb4_0_acio_tbt>;
+ };
+ };
};
};
};
@@ -107,6 +118,13 @@ typec1_connector_ss: endpoint {
remote-endpoint = <&atcphy1_typec_lanes>;
};
};
+
+ port@2 {
+ reg = <2>;
+ typec1_con_tbt: endpoint {
+ remote-endpoint = <&usb4_1_acio_tbt>;
+ };
+ };
};
};
};
@@ -198,6 +216,49 @@ atcphy1_usb3: endpoint {
};
};
+/* USB4 */
+&usb4_0_acio {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* 1: USB4 port */
+ port@1 {
+ reg = <1>;
+ usb4_0_acio_tbt: endpoint {
+ remote-endpoint = <&typec0_con_tbt>;
+ };
+ };
+
+ /* 2: unused(?) USB4 port */
+ /* 3: PCIe */
+ /* 4: USB3 */
+ /* 5: DP0 */
+ /* 6: DP1 */
+ };
+};
+
+&usb4_1_acio {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* 1: USB4 port */
+ port@1 {
+ reg = <1>;
+ usb4_1_acio_tbt: endpoint {
+ remote-endpoint = <&typec1_con_tbt>;
+ };
+ };
+
+ /* 2: unused(?) USB4 port */
+ /* 3: PCIe */
+ /* 4: USB3 */
+ /* 5: DP0 */
+ /* 6: DP1 */
+ };
+};
+
&i2c1 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/apple/t8112.dtsi b/arch/arm64/boot/dts/apple/t8112.dtsi
index ec248ca052cb..735ca3b8b716 100644
--- a/arch/arm64/boot/dts/apple/t8112.dtsi
+++ b/arch/arm64/boot/dts/apple/t8112.dtsi
@@ -985,6 +985,14 @@ pinctrl_aop: pinctrl@24a820000 {
<AIC_IRQ 305 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 306 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 307 IRQ_TYPE_LEVEL_HIGH>;
+
+ acio0_pins: acio0-pins {
+ pinmux = <APPLE_PINMUX(28, 1)>;
+ };
+
+ acio1_pins: acio1-pins {
+ pinmux = <APPLE_PINMUX(30, 1)>;
+ };
};
ans_mbox: mbox@277408000 {
@@ -1021,6 +1029,97 @@ nvme@27bcc0000 {
resets = <&ps_ans>;
};
+ usb4_0_mbox: mailbox@381108000 {
+ compatible = "apple,t8112-asc-mailbox",
+ "apple,asc-mailbox-v4";
+ reg = <0x3 0x81108000 0x0 0x4000>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 1067 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1068 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1069 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1070 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "send-empty", "send-not-empty",
+ "recv-empty", "recv-not-empty";
+ #mbox-cells = <0>;
+ };
+
+ usb4_0_acio: cio@381ac0000 {
+ compatible = "apple,t8112-usb4-acio", "apple,t8103-usb4-acio";
+ reg = <0x3 0x81ac0000 0x0 0xc000>,
+ <0x3 0x81080000 0x0 0x20000>;
+ reg-names = "rc", "sram";
+
+ mboxes = <&usb4_0_mbox>;
+ resets = <&cio_reset 0>;
+
+ power-domains = <&ps_atc0_cio>,
+ <&ps_atc0_cio_pcie>,
+ <&ps_atc0_cio_usb>;
+
+ thunderbolt-switch;
+
+ pinctrl-0 = <&acio0_pins>;
+ pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x3 0x81000000 0x1000000>;
+ nonposted-mmio;
+
+ usb4_0_dart: iommu@a80000 {
+ compatible = "apple,t8110-dart";
+ reg = <0xa80000 0x4000>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 1065 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ };
+
+ usb4_0_nhi: nhi@f00000 {
+ reg = <0xf00000 0x100000>,
+ <0xdb0000 0x30004>;
+ reg-names = "nhi", "pdf";
+ compatible = "apple,t8112-usb4-nhi",
+ "apple,t8103-usb4-nhi";
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 1038 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1039 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1040 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1041 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1042 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1043 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1044 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1045 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1046 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1047 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1048 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1049 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1050 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1051 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1052 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1053 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1054 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1055 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1056 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1057 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1058 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1059 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1060 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1061 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names =
+ "txring0", "txring1", "txring2",
+ "txring3", "txring4", "txring5",
+ "txring6", "txring7", "txring8",
+ "txring9", "txring10", "txring11",
+ "rxring0", "rxring1", "rxring2",
+ "rxring3", "rxring4", "rxring5",
+ "rxring6", "rxring7", "rxring8",
+ "rxring9", "rxring10", "rxring11";
+ iommus = <&usb4_0_dart 1>;
+ /* To be filled by the loader */
+ apple,thunderbolt-drom = [00];
+ };
+ };
+
dwc3_0: usb@382280000 {
compatible = "apple,t8112-dwc3", "apple,t8103-dwc3";
reg = <0x3 0x82280000 0x0 0xcd00>, <0x3 0x8228cd00 0x0 0x3200>;
@@ -1073,6 +1172,97 @@ atcphy0: phy@383000000 {
power-domains = <&ps_atc0_usb>;
};
+ usb4_1_mbox: mailbox@501108000 {
+ compatible = "apple,t8112-asc-mailbox",
+ "apple,asc-mailbox-v4";
+ reg = <0x5 0x01108000 0x0 0x4000>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 1148 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1149 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1150 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1151 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "send-empty", "send-not-empty",
+ "recv-empty", "recv-not-empty";
+ #mbox-cells = <0>;
+ };
+
+ usb4_1_acio: cio@501ac0000 {
+ compatible = "apple,t8112-usb4-acio", "apple,t8103-usb4-acio";
+ reg = <0x5 0x01ac0000 0x0 0xc000>,
+ <0x5 0x01080000 0x0 0x20000>;
+ reg-names = "rc", "sram";
+
+ mboxes = <&usb4_1_mbox>;
+ resets = <&cio_reset 1>;
+
+ power-domains = <&ps_atc1_cio>,
+ <&ps_atc1_cio_pcie>,
+ <&ps_atc1_cio_usb>;
+
+ thunderbolt-switch;
+
+ pinctrl-0 = <&acio1_pins>;
+ pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x5 0x01000000 0x1000000>;
+ nonposted-mmio;
+
+ usb4_1_dart: iommu@a80000 {
+ compatible = "apple,t8110-dart";
+ reg = <0xa80000 0x4000>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 1146 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ };
+
+ usb4_1_nhi: nhi@f00000 {
+ reg = <0xf00000 0x100000>,
+ <0xdb0000 0x30004>;
+ reg-names = "nhi", "pdf";
+ compatible = "apple,t8112-usb4-nhi",
+ "apple,t8103-usb4-nhi";
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 1119 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1120 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1121 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1122 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1123 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1124 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1125 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1126 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1127 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1128 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1129 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1130 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1131 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1132 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1133 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1134 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1135 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1136 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1137 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1138 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1139 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1140 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1141 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1142 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names =
+ "txring0", "txring1", "txring2",
+ "txring3", "txring4", "txring5",
+ "txring6", "txring7", "txring8",
+ "txring9", "txring10", "txring11",
+ "rxring0", "rxring1", "rxring2",
+ "rxring3", "rxring4", "rxring5",
+ "rxring6", "rxring7", "rxring8",
+ "rxring9", "rxring10", "rxring11";
+ iommus = <&usb4_1_dart 1>;
+ /* To be filled by the loader */
+ apple,thunderbolt-drom = [00];
+ };
+ };
+
dwc3_1: usb@502280000 {
compatible = "apple,t8112-dwc3", "apple,t8103-dwc3";
reg = <0x5 0x02280000 0x0 0xcd00>, <0x5 0x0228cd00 0x0 0x3200>;
--
2.55.0
next prev parent reply other threads:[~2026-08-30 20:19 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-30 20:19 [PATCH 00/19] Initial USB4/Thunderbolt support for Apple M1/M2/M3 SoCs Sven Peter
2026-08-30 20:19 ` [PATCH 01/19] dt-bindings: usb: Add thunderbolt-switch property Sven Peter
2026-08-30 20:19 ` [PATCH 02/19] usb: typec: Add thunderbolt switch Sven Peter
2026-08-30 20:30 ` sashiko-bot
2026-09-01 11:17 ` Heikki Krogerus
2026-09-01 18:53 ` Sven Peter
2026-08-30 20:19 ` [PATCH 03/19] usb: typec: tipd: Hook up Thunderbolt switch for CD321x Sven Peter
2026-08-30 20:36 ` sashiko-bot
2026-08-30 20:19 ` [PATCH 04/19] dt-bindings: thunderbolt: Add Apple USB4/Thunderbolt NHI Sven Peter
2026-08-30 20:19 ` [PATCH 05/19] dt-bindings: thunderbolt: Add Apple USB4/Thunderbolt ACIO block Sven Peter
2026-08-30 20:31 ` sashiko-bot
2026-08-30 20:19 ` [PATCH 06/19] thunderbolt: Try reading host DROM from device tree first Sven Peter
2026-08-30 20:33 ` sashiko-bot
2026-09-01 8:48 ` Mika Westerberg
2026-08-30 20:19 ` [PATCH 07/19] thunderbolt: Don't read the UID if we already know it Sven Peter
2026-08-30 20:19 ` [PATCH 08/19] thunderbolt: Allocate ring HopID before requesting the ring interrupt Sven Peter
2026-08-30 20:32 ` sashiko-bot
2026-08-30 20:19 ` [PATCH 09/19] thunderbolt: Add ring_interrupt_active to tb_nhi_ops Sven Peter
2026-08-30 20:19 ` [PATCH 10/19] thunderbolt: Make the ring register layout configurable Sven Peter
2026-09-01 8:58 ` Mika Westerberg
2026-09-01 18:56 ` Sven Peter
2026-08-30 20:19 ` [PATCH 11/19] thunderbolt: Add ring_interrupt_mask to tb_nhi_ops Sven Peter
2026-08-30 20:19 ` [PATCH 12/19] thunderbolt: Add ring_configure " Sven Peter
2026-08-30 20:28 ` sashiko-bot
2026-08-30 20:19 ` [PATCH 13/19] thunderbolt: Add QUIRK_NO_DMA_PORT Sven Peter
2026-09-01 9:04 ` Mika Westerberg
2026-09-01 17:06 ` Sven Peter
2026-08-30 20:19 ` [PATCH 14/19] thunderbolt: Add QUIRK_NO_USB3_BW_ALLOC Sven Peter
2026-09-01 9:12 ` Mika Westerberg
2026-08-30 20:19 ` [PATCH 15/19] thunderbolt: Export symbols required by the Apple Silicon driver Sven Peter
2026-08-30 20:19 ` [PATCH 16/19] thunderbolt: Add Apple Silicon support Sven Peter
2026-08-30 20:39 ` sashiko-bot
2026-09-01 10:09 ` Mika Westerberg
2026-09-01 19:06 ` Sven Peter
2026-08-30 20:19 ` [PATCH 17/19] arm64: dts: apple: t8103: Add USB4 ACIO and NHI Sven Peter
2026-09-01 10:20 ` Mika Westerberg
2026-08-30 20:19 ` Sven Peter [this message]
2026-08-30 20:39 ` [PATCH 18/19] arm64: dts: apple: t8112: " sashiko-bot
2026-08-30 20:19 ` [PATCH 19/19] arm64: dts: apple: t60xx: " Sven Peter
2026-08-31 17:44 ` [PATCH 00/19] Initial USB4/Thunderbolt support for Apple M1/M2/M3 SoCs Joshua Peisach
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