[PATCH v3 0/8] Add support for InvenSense ICM-42370-P accelerometer

[PATCH v3 0/8] Add support for InvenSense ICM-42370-P accelerometer

[Kanak Shilledar]

InvenSense ICM42370P is a high performance MEMS MotionTracking 3-axis
accelerometer. It supports I2C, I3C and SPI protocols. It has a 2.25kB
FIFO and two programmable interrupts with support for ultra-low-power
wake-on-motion support. It has a built-in temperature sensor. This
patch series adds basic support for the sensor with functionality of
performing raw reads and writes via the I2C interface.

This device contains 4 register banks for configuring the device called
MREG0, MREG1, MREG2 and MREG3. Unlike other devices from the same
vendor, this contains a very different way of accessing the register
banks apart from the default user bank 0 (MREG0). The register bank access
procedure is mentioned in the datasheet Section 13. This is very
similar to the existing InvenSense, ICM-42607-P driver. Thus, it
improves the existing driver support and adds the ICM-42370-P device to
it.

While adding the support for new device, I tried to perform some fixes
to the existing driver which were pointed out in the v2 of this patch
series.

The buffer support will be added in another patch series.

Note: The datasheet for InvenSense, ICM-42607-P could not be found on the 
official https://www.invensense.tdk.com/en-us website. Thus, I am 
using the datasheet available at https://www.lcsc.com.

Question to the reviewers:
* There is no entry for drivers/iio/imu/inv_icm42607 in the MAINTAINERS
  file, should a new MAINTAINERS entry be created for the inv_icm42607
  driver with the original author as the maintainer? Currently
  `get_maintainers.pl` is able to add the original author to the
  recipients list, but `b4 prep --auto-to-cc` is not able to add.
* As per the comments in v2 from @Jonathan regarding splitting the
  driver into multiple files, should we still have the driver as
  multiple files or should it be merged into a single file?
* As per the comments in v2 regarding the formatting of
  headerfile with the positioning of macros, enums and function
  prototypes, as well as indentation of in the register values, also the
  all the enum values are numbered which seems unnecessary, should these
  be implemented here as well?

Datasheet: https://www.invensense.tdk.com/en-us/products/3-axis/icm-42370-p
Datasheet: https://www.lcsc.com/product-detail/C5129967.html
Signed-off-by: Kanak Shilledar <kanak.shilledar@axis.com>
---
Changes in v3:
- Updated the cover letter to match the implementation.
- Add SPI properties to dt-bindings and fix typo (leave out I3C for now).
- Move the implementation to inv_icm42607 driver as both are similar
  devices.
- Fix formatting of the drivers based on the comments received in v2.
- Switch endianness of the driver.
- Update mreg checking to perform bank access even if the device is in
  OFF or LOW POWER state.
- Implement mreg read writes and calibbias support for inv_icm42607
  driver.
- Drop buffer and interrupt handling implementation for next patch series.

- Link to v2: https://patch.msgid.link/20260813-b4-inv_icm42370p-v2-0-11aedfdf76d3@axis.com

Changes in v2:
* Changes across all files
- Update MAINTAINERS with company mailing list
- Sort/Cleanup of includes
- Use `guard(mutex)` and newer `pm_runtime` APIs
- Fix code formatting and add empty lines
- Be consistent in inv_icm42370_data variable name
- Fix MODULE_DESCRIPTION
- Drop secondary state struct and merge it's properties in
  `inv_icm42370_data` struct
- Update mreg_read/write function calls
- Change the compatible and filename to `icm42370p`

* Changes to dt-binding
- Add dependencies property
- Made vdd and vddio supply as required
- Add description to drive-open-drain property
- Add mount-matrix property
- Add interrupt-names property

* Changes to `inv_icm42370.h` and `inv_icm42370_buffer.h`:
- Resturcture the file according to @Marcelo's advice
- Move struct __aligned properties to the end

* Changes to `inv_icm42370_core.c`:
- Fix _accel_scale[] values
- Add IIO_TIMESTAMP to channel spec
- Update mreg_read/write to fix bank access
- Replace usleep_range() with fsleep()
- Use constants from linux/units.h
- Call `_update_fifo_period()` after updating the ODR values
- Fix mathematical error in offset calculation
- Implement handling of mount matrix
- Implement handling of named interrupts
- Use devm_regulator_get_enable for the vdd/vddio regulators
- Use better error handling
- Move iio device registration after performing IRQ init

* Changes to `inv_icm42370_i2c.c`
- Change compatible string as per the binding
- Use named identifiers
- Add `id_table` to the i2c_driver struct

* Changes to `inv_icm42370_buffer.c`
- Update FIFO enable/disable logic
- Update FIFO buffer to match the specification and handle increased
  size dynamically.

- Link to v1: https://patch.msgid.link/20260806-b4-inv_icm42370p-v1-0-670837f5842f@axis.com

To: Kanak Shilledar <kanak.shilledar@axis.com>
To: Henrik Grimler <henrik.grimler@axis.com>
To: Jonathan Cameron <jic23@kernel.org>
To: David Lechner <dlechner@baylibre.com>
To: Nuno Sá <nuno.sa@analog.com>
To: Andy Shevchenko <andy@kernel.org>
To: Rob Herring <robh@kernel.org>
To: Krzysztof Kozlowski <krzk+dt@kernel.org>
To: Conor Dooley <conor+dt@kernel.org>
To: Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com>
To: Joshua Crofts <joshua.crofts1@gmail.com>
To: Marcelo Schmitt <marcelo.schmitt1@gmail.com>
To: Chris Morgan <macromorgan@hotmail.com>
Cc: kernel@axis.com
Cc: linux-iio@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org

---
Kanak Shilledar (8):
      dt-bindings: Add InvenSense ICM-42370-p accelerometer
      iio: imu: inv_icm42607: Update IIO channel macros
      iio: imu: inv_icm42607: Update _odr_to_period_us formatting
      iio: imu: inv_icm42607: Switch to little endian
      iio: imu: inv_icm42607: Add support for ICM-42370-P
      iio: imu: inv_icm42607: Implement MREGx register access
      iio: imu: inv_icm42607: Add accelerometer calibbias support
      iio: imu: inv_icm42607: Add gyroscope calibbias support

 .../bindings/iio/accel/invensense,icm42370p.yaml   |  87 +++++++
 MAINTAINERS                                        |   7 +
 drivers/iio/imu/inv_icm42607/inv_icm42607.h        |  51 +++-
 drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c  | 263 +++++++++++++++++++--
 drivers/iio/imu/inv_icm42607/inv_icm42607_core.c   | 203 +++++++++++++---
 drivers/iio/imu/inv_icm42607/inv_icm42607_gyro.c   | 258 ++++++++++++++++++--
 drivers/iio/imu/inv_icm42607/inv_icm42607_i2c.c    |   8 +
 drivers/iio/imu/inv_icm42607/inv_icm42607_temp.c   |   2 +-
 drivers/iio/imu/inv_icm42607/inv_icm42607_temp.h   |   2 +-
 9 files changed, 801 insertions(+), 80 deletions(-)
---
base-commit: 26bdafb3bdf58436579a1f6f0ef1ddb9011015ea
change-id: 20260629-b4-inv_icm42370p-ccd671066bcf

Best regards,
--  
Kanak Shilledar <kanak.shilledar@axis.com>

[PATCH v3 1/8] dt-bindings: Add InvenSense ICM-42370-p accelerometer

[Kanak Shilledar]

ICM42370P is a 3-axis accelerometer. The device can support I2C, SPI
and I3C. Add the supporting devicetree documentation for I2C as we
have only tested using I2C protocol and leave the rest for future
work.

The device supports VDD and VDDIO operating range of 1.71V to 3.6V.

Signed-off-by: Kanak Shilledar <kanak.shilledar@axis.com>
---
 .../bindings/iio/accel/invensense,icm42370p.yaml   | 87 ++++++++++++++++++++++
 MAINTAINERS                                        |  7 ++
 2 files changed, 94 insertions(+)

diff --git a/Documentation/devicetree/bindings/iio/accel/invensense,icm42370p.yaml b/Documentation/devicetree/bindings/iio/accel/invensense,icm42370p.yaml
new file mode 100644
index 000000000000..d519dc7e63dd
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/accel/invensense,icm42370p.yaml
@@ -0,0 +1,87 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/accel/invensense,icm42370p.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: InvenSense ICM-42370-P Accelerometer
+
+maintainers:
+  - Kanak Shilledar <kanak.shilledar@axis.com>
+  - Henrik Grimler <henrik.grimler@axis.com>
+
+description: |
+  3-axis accelerometer MotionTracking device.
+
+  It supports I3C, I2C and SPI serial communication, has a 2.25kB FIFO
+  and 2 programmable interrupts with low-power wake-on-motion support.
+
+  It also has programmable filters and an embedded temperature sensor.
+
+  https://www.invensense.tdk.com/en-us/products/3-axis/icm-42370-p
+
+properties:
+  compatible:
+    const: invensense,icm42370p
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    minItems: 1
+    maxItems: 2
+
+  interrupt-names:
+    minItems: 1
+    maxItems: 2
+    items:
+      enum:
+        - INT1
+        - INT2
+
+  drive-open-drain:
+    type: boolean
+    description:
+      Whether irq is in open-drain mode. False means push-pull mode.
+
+  mount-matrix: true
+
+  vdd-supply:
+    description: Regulator operating range between 1.71V to 3.6V.
+
+  vddio-supply:
+    description: Regulator operating range between 1.71V to 3.6V.
+
+  spi-cpha: true
+  spi-cpol: true
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - vdd-supply
+  - vddio-supply
+
+allOf:
+  - $ref: /schemas/spi/spi-peripheral-props.yaml#
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/gpio/gpio.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+    i2c {
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        accelerometer@69 {
+            compatible = "invensense,icm42370p";
+            reg = <0x69>;
+            interrupt-parent = <&gpio1>;
+            interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
+            interrupt-names = "INT1";
+            vdd-supply = <&vdd>;
+            vddio-supply = <&vddio>;
+        };
+    };
diff --git a/MAINTAINERS b/MAINTAINERS
index 48dcb8b10743..177bcad75884 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -13662,6 +13662,13 @@ S:	Maintained
 F:	Documentation/devicetree/bindings/media/i2c/isil,isl79987.yaml
 F:	drivers/media/i2c/isl7998x.c
 
+INVENSENSE ICM-42370-P ACCELEROMETER
+M:	Kanak Shilledar <kanak.shilledar@axis.com>
+M:	Henrik Grimler <henrik.grimler@axis.com>
+L:	kernel@axis.com
+S:	Maintained
+F:	Documentation/devicetree/bindings/iio/accel/invensense,icm42370p.yaml
+
 INVENSENSE ICM-426xx IMU DRIVER
 M:	Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com>
 L:	linux-iio@vger.kernel.org

-- 
2.43.0

[PATCH v3 2/8] iio: imu: inv_icm42607: Update IIO channel macros

[Kanak Shilledar]

The INV_ICM42607_ACCEL_CHAN and INV_ICM42607_GYRO_CHAN macro had a third
parameter of _ext_info, drop it and just point the .ext_info field to
the respective inv_icm42607_*_ext_infos. This reduces the repeatitive
calling of inv_icm42607_*_ext_infos struct in the IIO channel spec
struct.

Signed-off-by: Kanak Shilledar <kanak.shilledar@axis.com>
---
 drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c | 23 ++++++++++-------------
 drivers/iio/imu/inv_icm42607/inv_icm42607_gyro.c  | 23 ++++++++++-------------
 2 files changed, 20 insertions(+), 26 deletions(-)

diff --git a/drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c b/drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c
index 0b3f035c2da0..8f61bc901452 100644
--- a/drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c
+++ b/drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c
@@ -17,7 +17,7 @@
 #include "inv_icm42607.h"
 #include "inv_icm42607_temp.h"
 
-#define INV_ICM42607_ACCEL_CHAN(_modifier, _index, _ext_info)			\
+#define INV_ICM42607_ACCEL_CHAN(_modifier, _index)				\
 {										\
 	.type = IIO_ACCEL,							\
 	.modified = 1,								\
@@ -34,9 +34,14 @@
 		.storagebits = 16,						\
 		.endianness = IIO_BE,						\
 	},									\
-	.ext_info = _ext_info,							\
+	.ext_info = inv_icm42607_accel_ext_infos,				\
 }
 
+static const struct iio_chan_spec_ext_info inv_icm42607_accel_ext_infos[] = {
+	IIO_MOUNT_MATRIX(IIO_SHARED_BY_ALL, inv_icm42607_get_mount_matrix),
+	{ }
+};
+
 enum inv_icm42607_accel_scan {
 	INV_ICM42607_ACCEL_SCAN_X,
 	INV_ICM42607_ACCEL_SCAN_Y,
@@ -44,18 +49,10 @@ enum inv_icm42607_accel_scan {
 	INV_ICM42607_ACCEL_SCAN_TEMP,
 };
 
-static const struct iio_chan_spec_ext_info inv_icm42607_accel_ext_infos[] = {
-	IIO_MOUNT_MATRIX(IIO_SHARED_BY_ALL, inv_icm42607_get_mount_matrix),
-	{ }
-};
-
 static const struct iio_chan_spec inv_icm42607_accel_channels[] = {
-	INV_ICM42607_ACCEL_CHAN(IIO_MOD_X, INV_ICM42607_ACCEL_SCAN_X,
-				inv_icm42607_accel_ext_infos),
-	INV_ICM42607_ACCEL_CHAN(IIO_MOD_Y, INV_ICM42607_ACCEL_SCAN_Y,
-				inv_icm42607_accel_ext_infos),
-	INV_ICM42607_ACCEL_CHAN(IIO_MOD_Z, INV_ICM42607_ACCEL_SCAN_Z,
-				inv_icm42607_accel_ext_infos),
+	INV_ICM42607_ACCEL_CHAN(IIO_MOD_X, INV_ICM42607_ACCEL_SCAN_X),
+	INV_ICM42607_ACCEL_CHAN(IIO_MOD_Y, INV_ICM42607_ACCEL_SCAN_Y),
+	INV_ICM42607_ACCEL_CHAN(IIO_MOD_Z, INV_ICM42607_ACCEL_SCAN_Z),
 	INV_ICM42607_TEMP_CHAN(INV_ICM42607_ACCEL_SCAN_TEMP),
 };
 
diff --git a/drivers/iio/imu/inv_icm42607/inv_icm42607_gyro.c b/drivers/iio/imu/inv_icm42607/inv_icm42607_gyro.c
index 5b4683c2dd1e..8e8d36461e51 100644
--- a/drivers/iio/imu/inv_icm42607/inv_icm42607_gyro.c
+++ b/drivers/iio/imu/inv_icm42607/inv_icm42607_gyro.c
@@ -17,7 +17,7 @@
 #include "inv_icm42607.h"
 #include "inv_icm42607_temp.h"
 
-#define INV_ICM42607_GYRO_CHAN(_modifier, _index, _ext_info)			\
+#define INV_ICM42607_GYRO_CHAN(_modifier, _index)				\
 {										\
 	.type = IIO_ANGL_VEL,							\
 	.modified = 1,								\
@@ -34,9 +34,14 @@
 		.storagebits = 16,						\
 		.endianness = IIO_BE,						\
 	},									\
-	.ext_info = _ext_info,							\
+	.ext_info = inv_icm42607_gyro_ext_infos,				\
 }
 
+static const struct iio_chan_spec_ext_info inv_icm42607_gyro_ext_infos[] = {
+	IIO_MOUNT_MATRIX(IIO_SHARED_BY_ALL, inv_icm42607_get_mount_matrix),
+	{ }
+};
+
 enum inv_icm42607_gyro_scan {
 	INV_ICM42607_GYRO_SCAN_X,
 	INV_ICM42607_GYRO_SCAN_Y,
@@ -44,18 +49,10 @@ enum inv_icm42607_gyro_scan {
 	INV_ICM42607_GYRO_SCAN_TEMP,
 };
 
-static const struct iio_chan_spec_ext_info inv_icm42607_gyro_ext_infos[] = {
-	IIO_MOUNT_MATRIX(IIO_SHARED_BY_ALL, inv_icm42607_get_mount_matrix),
-	{ }
-};
-
 static const struct iio_chan_spec inv_icm42607_gyro_channels[] = {
-	INV_ICM42607_GYRO_CHAN(IIO_MOD_X, INV_ICM42607_GYRO_SCAN_X,
-			       inv_icm42607_gyro_ext_infos),
-	INV_ICM42607_GYRO_CHAN(IIO_MOD_Y, INV_ICM42607_GYRO_SCAN_Y,
-			       inv_icm42607_gyro_ext_infos),
-	INV_ICM42607_GYRO_CHAN(IIO_MOD_Z, INV_ICM42607_GYRO_SCAN_Z,
-			       inv_icm42607_gyro_ext_infos),
+	INV_ICM42607_GYRO_CHAN(IIO_MOD_X, INV_ICM42607_GYRO_SCAN_X),
+	INV_ICM42607_GYRO_CHAN(IIO_MOD_Y, INV_ICM42607_GYRO_SCAN_Y),
+	INV_ICM42607_GYRO_CHAN(IIO_MOD_Z, INV_ICM42607_GYRO_SCAN_Z),
 	INV_ICM42607_TEMP_CHAN(INV_ICM42607_GYRO_SCAN_TEMP),
 };
 

-- 
2.43.0

[PATCH v3 3/8] iio: imu: inv_icm42607: Update _odr_to_period_us formatting

[Kanak Shilledar]

Update the function formatting for the inv_icm42607_odr_to_period_us
function. This enhances the readability of the function and drop the
unnecessary comments in the array elements.

Signed-off-by: Kanak Shilledar <kanak.shilledar@axis.com>
---
 drivers/iio/imu/inv_icm42607/inv_icm42607.h      | 20 +++++++-------
 drivers/iio/imu/inv_icm42607/inv_icm42607_core.c | 35 ++++++++----------------
 2 files changed, 21 insertions(+), 34 deletions(-)

diff --git a/drivers/iio/imu/inv_icm42607/inv_icm42607.h b/drivers/iio/imu/inv_icm42607/inv_icm42607.h
index 4d51b0da1aa1..fa85cf738cc0 100644
--- a/drivers/iio/imu/inv_icm42607/inv_icm42607.h
+++ b/drivers/iio/imu/inv_icm42607/inv_icm42607.h
@@ -62,16 +62,16 @@ enum inv_icm42607_accel_fs {
 /* ODR values  - Note Gyro does not support ODR less than 12.5Hz */
 enum inv_icm42607_odr {
 	INV_ICM42607_ODR_1600HZ = 5,
-	INV_ICM42607_ODR_800HZ = 6,
-	INV_ICM42607_ODR_400HZ = 7,
-	INV_ICM42607_ODR_200HZ = 8,
-	INV_ICM42607_ODR_100HZ = 9,
-	INV_ICM42607_ODR_50HZ = 10,
-	INV_ICM42607_ODR_25HZ = 11,
-	INV_ICM42607_ODR_12_5HZ = 12,
-	INV_ICM42607_ODR_6_25HZ_LP = 13,
-	INV_ICM42607_ODR_3_125HZ_LP = 14,
-	INV_ICM42607_ODR_1_5625HZ_LP = 15,
+	INV_ICM42607_ODR_800HZ,
+	INV_ICM42607_ODR_400HZ,
+	INV_ICM42607_ODR_200HZ,
+	INV_ICM42607_ODR_100HZ,
+	INV_ICM42607_ODR_50HZ,
+	INV_ICM42607_ODR_25HZ,
+	INV_ICM42607_ODR_12_5HZ,
+	INV_ICM42607_ODR_6_25HZ_LP,
+	INV_ICM42607_ODR_3_125HZ_LP,
+	INV_ICM42607_ODR_1_5625HZ_LP,
 	INV_ICM42607_ODR_NB
 };
 
diff --git a/drivers/iio/imu/inv_icm42607/inv_icm42607_core.c b/drivers/iio/imu/inv_icm42607/inv_icm42607_core.c
index 190e998f7b8e..de3b158f446c 100644
--- a/drivers/iio/imu/inv_icm42607/inv_icm42607_core.c
+++ b/drivers/iio/imu/inv_icm42607/inv_icm42607_core.c
@@ -118,30 +118,17 @@ inv_icm42607_get_mount_matrix(struct iio_dev *indio_dev,
 static u32 inv_icm42607_odr_to_period_us(enum inv_icm42607_odr odr)
 {
 	static const u32 odr_periods[INV_ICM42607_ODR_NB] = {
-		/* Reserved values */
-		0, 0, 0, 0, 0,
-		/* 1600Hz */
-		625,
-		/* 800Hz */
-		1250,
-		/* 400Hz */
-		2500,
-		/* 200Hz */
-		5000,
-		/* 100 Hz */
-		10000,
-		/* 50Hz */
-		20000,
-		/* 25Hz */
-		40000,
-		/* 12.5Hz */
-		80000,
-		/* 6.25Hz */
-		160000,
-		/* 3.125Hz */
-		320000,
-		/* 1.5625Hz */
-		640000,
+		[INV_ICM42607_ODR_1600HZ]	= 625,
+		[INV_ICM42607_ODR_800HZ]	= 1250,
+		[INV_ICM42607_ODR_400HZ]	= 2500,
+		[INV_ICM42607_ODR_200HZ]	= 5000,
+		[INV_ICM42607_ODR_100HZ]	= 10000,
+		[INV_ICM42607_ODR_50HZ]		= 20000,
+		[INV_ICM42607_ODR_25HZ]		= 40000,
+		[INV_ICM42607_ODR_12_5HZ]	= 80000,
+		[INV_ICM42607_ODR_6_25HZ_LP]	= 160000,
+		[INV_ICM42607_ODR_3_125HZ_LP]	= 320000,
+		[INV_ICM42607_ODR_1_5625HZ_LP]	= 640000,
 	};
 
 	odr = clamp(odr, INV_ICM42607_ODR_1600HZ, INV_ICM42607_ODR_1_5625HZ_LP);

-- 
2.43.0

[PATCH v3 4/8] iio: imu: inv_icm42607: Switch to little endian

[Kanak Shilledar]

The device supports both big and little endian formats for sensor data,
this is handled via the SENSOR_DATA_BIT in INTF_CONFIG0 register. The
default value is big-endian format.

Switch to little-endian as it matches the native byte order on vast
majority of systems and avoids unnecessary byte-swapping.

Datasheet: https://www.invensense.tdk.com/en-us/products/3-axis/icm-42370-p
Datasheet: https://www.lcsc.com/product-detail/C5129967.html
Signed-off-by: Kanak Shilledar <kanak.shilledar@axis.com>
---
 drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c | 2 +-
 drivers/iio/imu/inv_icm42607/inv_icm42607_core.c  | 6 +++---
 drivers/iio/imu/inv_icm42607/inv_icm42607_gyro.c  | 2 +-
 drivers/iio/imu/inv_icm42607/inv_icm42607_temp.c  | 2 +-
 drivers/iio/imu/inv_icm42607/inv_icm42607_temp.h  | 2 +-
 5 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c b/drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c
index 8f61bc901452..318373efeb9e 100644
--- a/drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c
+++ b/drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c
@@ -32,7 +32,7 @@
 		.sign = 's',							\
 		.realbits = 16,							\
 		.storagebits = 16,						\
-		.endianness = IIO_BE,						\
+		.endianness = IIO_LE,						\
 	},									\
 	.ext_info = inv_icm42607_accel_ext_infos,				\
 }
diff --git a/drivers/iio/imu/inv_icm42607/inv_icm42607_core.c b/drivers/iio/imu/inv_icm42607/inv_icm42607_core.c
index de3b158f446c..7eb486ff673b 100644
--- a/drivers/iio/imu/inv_icm42607/inv_icm42607_core.c
+++ b/drivers/iio/imu/inv_icm42607/inv_icm42607_core.c
@@ -343,7 +343,7 @@ int inv_icm42607_read_sensor(struct iio_dev *indio_dev,
 	struct inv_icm42607_sensor_state *sensor_st = iio_priv(indio_dev);
 	struct device *dev = regmap_get_device(st->map);
 	unsigned int reg;
-	__be16 data;
+	__le16 data;
 	int ret;
 
 	if ((chan->type != IIO_ANGL_VEL) && (chan->type != IIO_ACCEL))
@@ -391,7 +391,7 @@ int inv_icm42607_read_sensor(struct iio_dev *indio_dev,
 	if (ret)
 		return ret;
 
-	*val = be16_to_cpu(data);
+	*val = le16_to_cpu(data);
 	if (*val == INV_ICM42607_DATA_INVALID)
 		return -EINVAL;
 
@@ -490,7 +490,7 @@ static int inv_icm42607_setup(struct inv_icm42607_state *st,
 	if (ret)
 		return ret;
 
-	ret = regmap_set_bits(st->map, INV_ICM42607_REG_INTF_CONFIG0,
+	ret = regmap_clear_bits(st->map, INV_ICM42607_REG_INTF_CONFIG0,
 			      INV_ICM42607_INTF_CONFIG0_SENSOR_DATA_ENDIAN);
 	if (ret)
 		return ret;
diff --git a/drivers/iio/imu/inv_icm42607/inv_icm42607_gyro.c b/drivers/iio/imu/inv_icm42607/inv_icm42607_gyro.c
index 8e8d36461e51..fb9bacee4e8d 100644
--- a/drivers/iio/imu/inv_icm42607/inv_icm42607_gyro.c
+++ b/drivers/iio/imu/inv_icm42607/inv_icm42607_gyro.c
@@ -32,7 +32,7 @@
 		.sign = 's',							\
 		.realbits = 16,							\
 		.storagebits = 16,						\
-		.endianness = IIO_BE,						\
+		.endianness = IIO_LE,						\
 	},									\
 	.ext_info = inv_icm42607_gyro_ext_infos,				\
 }
diff --git a/drivers/iio/imu/inv_icm42607/inv_icm42607_temp.c b/drivers/iio/imu/inv_icm42607/inv_icm42607_temp.c
index 53f0484c0845..ab2ba7900095 100644
--- a/drivers/iio/imu/inv_icm42607/inv_icm42607_temp.c
+++ b/drivers/iio/imu/inv_icm42607/inv_icm42607_temp.c
@@ -58,7 +58,7 @@ static int inv_icm42607_temp_read(struct inv_icm42607_state *st, s16 *temp)
 	if (ret)
 		return ret;
 
-	*temp = get_unaligned_be16(raw);
+	*temp = get_unaligned_le16(raw);
 	if (*temp == INV_ICM42607_DATA_INVALID)
 		return -EINVAL;
 
diff --git a/drivers/iio/imu/inv_icm42607/inv_icm42607_temp.h b/drivers/iio/imu/inv_icm42607/inv_icm42607_temp.h
index 18499b4d0b94..eb55e2daac89 100644
--- a/drivers/iio/imu/inv_icm42607/inv_icm42607_temp.h
+++ b/drivers/iio/imu/inv_icm42607/inv_icm42607_temp.h
@@ -27,7 +27,7 @@ struct iio_chan_spec;
 		.sign = 's',					\
 		.realbits = 16,					\
 		.storagebits = 16,				\
-		.endianness = IIO_BE,				\
+		.endianness = IIO_LE,				\
 	},							\
 }
 

-- 
2.43.0

[PATCH v3 5/8] iio: imu: inv_icm42607: Add support for ICM-42370-P

[Kanak Shilledar]

Add support for the Invensense ICM-42370-P MEMS MotionTracking 3-axis
accelerometer with built-in temperature sensor. This device is almost
identical to the existing Invensense ICM-42607-P IMU, but lacks
gyroscope. The device supports I2C, SPI and I3C, implement only I2C
support. Provide basic support for raw sensor reads via sysfs. There is
also a built-in temperature sensor but it can not be turned off.

Datasheet: https://www.invensense.tdk.com/en-us/products/3-axis/icm-42370-p
Datasheet: https://www.lcsc.com/product-detail/C5129967.html
Signed-off-by: Kanak Shilledar <kanak.shilledar@axis.com>
---
 drivers/iio/imu/inv_icm42607/inv_icm42607.h      |  2 +
 drivers/iio/imu/inv_icm42607/inv_icm42607_core.c | 56 ++++++++++++++++++++----
 drivers/iio/imu/inv_icm42607/inv_icm42607_i2c.c  |  8 ++++
 3 files changed, 58 insertions(+), 8 deletions(-)

diff --git a/drivers/iio/imu/inv_icm42607/inv_icm42607.h b/drivers/iio/imu/inv_icm42607/inv_icm42607.h
index fa85cf738cc0..a183a8566617 100644
--- a/drivers/iio/imu/inv_icm42607/inv_icm42607.h
+++ b/drivers/iio/imu/inv_icm42607/inv_icm42607.h
@@ -368,6 +368,7 @@ struct inv_icm42607_sensor_state {
 #define INV_ICM42607_REG_WHOAMI				0x75
 #define INV_ICM42607P_WHOAMI				0x60
 #define INV_ICM42607_WHOAMI				0x67
+#define INV_ICM42370P_WHOAMI				0x0D
 
 /*
  * Timings as listed in section 3 of datasheet, all values listed in datasheet
@@ -392,6 +393,7 @@ typedef int (*inv_icm42607_bus_setup)(struct inv_icm42607_state *);
 extern const struct regmap_config inv_icm42607_regmap_config;
 extern const struct inv_icm42607_hw inv_icm42607_hw_data;
 extern const struct inv_icm42607_hw inv_icm42607p_hw_data;
+extern const struct inv_icm42607_hw inv_icm42370p_hw_data;
 extern const struct dev_pm_ops inv_icm42607_pm_ops;
 
 const struct iio_mount_matrix *
diff --git a/drivers/iio/imu/inv_icm42607/inv_icm42607_core.c b/drivers/iio/imu/inv_icm42607/inv_icm42607_core.c
index 7eb486ff673b..e77d72e0f7bc 100644
--- a/drivers/iio/imu/inv_icm42607/inv_icm42607_core.c
+++ b/drivers/iio/imu/inv_icm42607/inv_icm42607_core.c
@@ -92,6 +92,17 @@ static const struct inv_icm42607_conf inv_icm42607_default_conf = {
 	},
 };
 
+/* Chip initial default configuration */
+static const struct inv_icm42607_conf inv_icm42370_default_conf = {
+	.gyro = { },
+	.accel = {
+		.mode = INV_ICM42607_SENSOR_MODE_OFF,
+		.fs = INV_ICM42607_ACCEL_FS_4G,
+		.odr = INV_ICM42607_ODR_100HZ,
+		.filter = INV_ICM42607_FILTER_BW_25HZ,
+	},
+};
+
 const struct inv_icm42607_hw inv_icm42607_hw_data = {
 	.whoami = INV_ICM42607_WHOAMI,
 	.name = "icm42607",
@@ -106,6 +117,13 @@ const struct inv_icm42607_hw inv_icm42607p_hw_data = {
 };
 EXPORT_SYMBOL_NS_GPL(inv_icm42607p_hw_data, "IIO_ICM42607");
 
+const struct inv_icm42607_hw inv_icm42370p_hw_data = {
+	.whoami = INV_ICM42370P_WHOAMI,
+	.name = "icm42370p",
+	.conf = &inv_icm42370_default_conf,
+};
+EXPORT_SYMBOL_NS_GPL(inv_icm42370p_hw_data, "IIO_ICM42607");
+
 const struct iio_mount_matrix *
 inv_icm42607_get_mount_matrix(struct iio_dev *indio_dev,
 			      const struct iio_chan_spec *chan)
@@ -617,16 +635,38 @@ int inv_icm42607_core_probe(struct regmap *regmap,
 	pm_runtime_set_autosuspend_delay(dev, INV_ICM42607_SUSPEND_DELAY_MS);
 	pm_runtime_use_autosuspend(dev);
 
-	/* Initialize IIO device for Accel */
-	st->indio_accel = inv_icm42607_accel_init(st);
-	if (IS_ERR(st->indio_accel))
-		return PTR_ERR(st->indio_accel);
+	switch (st->hw->whoami) {
+	case INV_ICM42607_WHOAMI:
+	case INV_ICM42607P_WHOAMI:
+		/*
+		 * Invensense, ICM42607 and ICM42607P both have accelerometer
+		 * and gyroscope functionality.
+		 */
+		st->indio_accel = inv_icm42607_accel_init(st);
+		if (IS_ERR(st->indio_accel))
+			return PTR_ERR(st->indio_accel);
+
+		st->indio_gyro = inv_icm42607_gyro_init(st);
+		if (IS_ERR(st->indio_gyro))
+			return PTR_ERR(st->indio_gyro);
+
+		break;
+	case INV_ICM42370P_WHOAMI:
+		/*
+		 * Invensense, ICM42370P has only accelerometer functionality.
+		 * Thus, set the gryo property to NULL.
+		 */
+		st->indio_accel = inv_icm42607_accel_init(st);
+		if (IS_ERR(st->indio_accel))
+			return PTR_ERR(st->indio_accel);
 
-	/* Initialize IIO device for Gyro */
-	st->indio_gyro = inv_icm42607_gyro_init(st);
-	if (IS_ERR(st->indio_gyro))
-		return PTR_ERR(st->indio_gyro);
+		st->indio_gyro = NULL;
 
+		break;
+	default:
+		/* No WHOAMI value matched */
+		return dev_err_probe(dev, -ENODEV, "Failed to find a matching WHO_AM_I value\n");
+	}
 	return 0;
 }
 EXPORT_SYMBOL_NS_GPL(inv_icm42607_core_probe, "IIO_ICM42607");
diff --git a/drivers/iio/imu/inv_icm42607/inv_icm42607_i2c.c b/drivers/iio/imu/inv_icm42607/inv_icm42607_i2c.c
index e903106af84a..82480ae6879c 100644
--- a/drivers/iio/imu/inv_icm42607/inv_icm42607_i2c.c
+++ b/drivers/iio/imu/inv_icm42607/inv_icm42607_i2c.c
@@ -64,6 +64,10 @@ static const struct i2c_device_id inv_icm42607_id[] = {
 		.name = "icm42607p",
 		.driver_data = (kernel_ulong_t)&inv_icm42607p_hw_data,
 	},
+	{
+		.name = "icm42370p",
+		.driver_data = (kernel_ulong_t)&inv_icm42370p_hw_data,
+	},
 	{ }
 };
 MODULE_DEVICE_TABLE(i2c, inv_icm42607_id);
@@ -76,6 +80,10 @@ static const struct of_device_id inv_icm42607_of_matches[] = {
 		.compatible = "invensense,icm42607p",
 		.data = &inv_icm42607p_hw_data,
 	},
+	{
+		.compatible = "invensense,icm42370p",
+		.data = &inv_icm42370p_hw_data,
+	},
 	{ }
 };
 MODULE_DEVICE_TABLE(of, inv_icm42607_of_matches);

-- 
2.43.0

[PATCH v3 6/8] iio: imu: inv_icm42607: Implement MREGx register access

[Kanak Shilledar]

The device supports indirect register access to different banks. A
specific routine needs to be followed when accessing the registers in
another bank as documented in the datasheet (section 13). This is
required for accessing registers configured via the user and
implementing buffer support.

Datasheet: https://www.invensense.tdk.com/en-us/products/3-axis/icm-42370-p
Datasheet: https://www.lcsc.com/product-detail/C5129967.html
Assisted-by: LLM
Signed-off-by: Kanak Shilledar <kanak.shilledar@axis.com>
---
LLM was used to improve the mreg_check function to include the case
where the sensor is in a POWER OFF or LOW POWER mode to utilize the RC
oscillator for initiating the bank access.
---
 drivers/iio/imu/inv_icm42607/inv_icm42607.h      |  29 ++++++
 drivers/iio/imu/inv_icm42607/inv_icm42607_core.c | 108 ++++++++++++++++++++++-
 2 files changed, 135 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/imu/inv_icm42607/inv_icm42607.h b/drivers/iio/imu/inv_icm42607/inv_icm42607.h
index a183a8566617..a522850e0268 100644
--- a/drivers/iio/imu/inv_icm42607/inv_icm42607.h
+++ b/drivers/iio/imu/inv_icm42607/inv_icm42607.h
@@ -111,6 +111,13 @@ enum inv_icm42607_temp_filter_bw {
 	/* value 7 also corresponds to 4Hz */
 };
 
+enum inv_icm42607_mregs {
+	INV_ICM42607_MREG1,
+	INV_ICM42607_MREG2 = 0x28,
+	INV_ICM42607_MREG3 = 0x50,
+	INV_ICM42370_NB
+};
+
 /* Signed so that negative values can signify an invalid condition. */
 struct inv_icm42607_sensor_conf {
 	int mode;
@@ -170,6 +177,7 @@ struct inv_icm42607_sensor_state {
 
 /* Register Map for User Bank 0 */
 #define INV_ICM42607_REG_MCLK_RDY			0x00
+#define INV_ICM42607_MCLK_RDY_BIT			BIT(3)
 
 #define INV_ICM42607_REG_DEVICE_CONFIG			0x01
 #define INV_ICM42607_DEVICE_CONFIG_SPI_AP_4WIRE		BIT(2)
@@ -370,6 +378,24 @@ struct inv_icm42607_sensor_state {
 #define INV_ICM42607_WHOAMI				0x67
 #define INV_ICM42370P_WHOAMI				0x0D
 
+#define INV_ICM42607_REG_BLK_SEL_W			0x79
+#define INV_ICM42607_REG_MADDR_W			0x7A
+#define INV_ICM42607_REG_M_W				0x7B
+#define INV_ICM42607_REG_BLK_SEL_R			0x7C
+#define INV_ICM42607_REG_MADDR_R			0x7D
+#define INV_ICM42607_REG_M_R				0x7E
+
+/* User Bank MREG 1 registers */
+#define INV_ICM42607_REG_OFFSET_USER0			0x4E
+#define INV_ICM42607_REG_OFFSET_USER1			0x4F
+#define INV_ICM42607_REG_OFFSET_USER2			0x50
+#define INV_ICM42607_REG_OFFSET_USER3			0x51
+#define INV_ICM42607_REG_OFFSET_USER4			0x52
+#define INV_ICM42607_REG_OFFSET_USER5			0x53
+#define INV_ICM42607_REG_OFFSET_USER6			0x54
+#define INV_ICM42607_REG_OFFSET_USER7			0x55
+#define INV_ICM42607_REG_OFFSET_USER8			0x56
+
 /*
  * Timings as listed in section 3 of datasheet, all values listed in datasheet
  * in ms except temp startup time... setting all values in us and using
@@ -400,6 +426,9 @@ const struct iio_mount_matrix *
 inv_icm42607_get_mount_matrix(struct iio_dev *indio_dev,
 			      const struct iio_chan_spec *chan);
 
+int inv_icm42607_mreg_read(struct inv_icm42607_state *st, u8 bank, u8 addr, u8 *val);
+int inv_icm42607_mreg_write(struct inv_icm42607_state *st, u8 bank, u8 addr, u8 val);
+
 int inv_icm42607_get_pwr_mgmt0(struct inv_icm42607_state *st,
 			       enum inv_icm42607_sensor_mode *gyro,
 			       enum inv_icm42607_sensor_mode *accel);
diff --git a/drivers/iio/imu/inv_icm42607/inv_icm42607_core.c b/drivers/iio/imu/inv_icm42607/inv_icm42607_core.c
index e77d72e0f7bc..6e514b8682a0 100644
--- a/drivers/iio/imu/inv_icm42607/inv_icm42607_core.c
+++ b/drivers/iio/imu/inv_icm42607/inv_icm42607_core.c
@@ -31,6 +31,7 @@ static bool inv_icm42607_is_readable_reg(struct device *dev, unsigned int reg)
 	case INV_ICM42607_REG_APEX_DATA4 ... INV_ICM42607_REG_INTF_CONFIG1:
 	case INV_ICM42607_REG_INT_STATUS_DRDY ... INV_ICM42607_REG_FIFO_DATA:
 	case INV_ICM42607_REG_WHOAMI:
+	case INV_ICM42607_REG_BLK_SEL_W ... INV_ICM42607_REG_M_R:
 		return true;
 	}
 
@@ -43,6 +44,7 @@ static bool inv_icm42607_is_writeable_reg(struct device *dev, unsigned int reg)
 	case INV_ICM42607_REG_DEVICE_CONFIG ... INV_ICM42607_REG_INT_CONFIG:
 	case INV_ICM42607_REG_PWR_MGMT0 ... INV_ICM42607_REG_INT_SOURCE4:
 	case INV_ICM42607_REG_INTF_CONFIG0 ... INV_ICM42607_REG_INTF_CONFIG1:
+	case INV_ICM42607_REG_BLK_SEL_W ... INV_ICM42607_REG_M_R:
 		return true;
 	}
 
@@ -59,6 +61,7 @@ static bool inv_icm42607_is_volatile_reg(struct device *dev, unsigned int reg)
 	case INV_ICM42607_REG_FIFO_LOST_PKT0 ... INV_ICM42607_REG_APEX_DATA3:
 	case INV_ICM42607_REG_INT_STATUS_DRDY:
 	case INV_ICM42607_REG_INT_STATUS ... INV_ICM42607_REG_FIFO_DATA:
+	case INV_ICM42607_REG_BLK_SEL_W ... INV_ICM42607_REG_M_R:
 		return true;
 	}
 
@@ -71,7 +74,7 @@ const struct regmap_config inv_icm42607_regmap_config = {
 	.writeable_reg = inv_icm42607_is_writeable_reg,
 	.readable_reg = inv_icm42607_is_readable_reg,
 	.volatile_reg = inv_icm42607_is_volatile_reg,
-	.max_register = INV_ICM42607_REG_WHOAMI,
+	.max_register = INV_ICM42607_REG_M_R,
 	.cache_type = REGCACHE_MAPLE,
 };
 EXPORT_SYMBOL_NS_GPL(inv_icm42607_regmap_config, "IIO_ICM42607");
@@ -96,7 +99,7 @@ static const struct inv_icm42607_conf inv_icm42607_default_conf = {
 static const struct inv_icm42607_conf inv_icm42370_default_conf = {
 	.gyro = { },
 	.accel = {
-		.mode = INV_ICM42607_SENSOR_MODE_OFF,
+		.mode = INV_ICM42607_SENSOR_MODE_LOW_POWER,
 		.fs = INV_ICM42607_ACCEL_FS_4G,
 		.odr = INV_ICM42607_ODR_100HZ,
 		.filter = INV_ICM42607_FILTER_BW_25HZ,
@@ -352,6 +355,107 @@ int inv_icm42607_set_sensor_conf(struct inv_icm42607_state *st,
 	}
 }
 
+static int inv_icm42607_mreg_check(struct inv_icm42607_state *st)
+{
+	struct regmap *map = st->map;
+	unsigned int val;
+	int ret;
+
+	ret = regmap_read(map, INV_ICM42607_REG_MCLK_RDY, &val);
+	if (ret)
+		return ret;
+
+	if (val & INV_ICM42607_MCLK_RDY_BIT)
+		return 0;
+
+	/*
+	 * Clock isn't running: we're either in Sleep mode or Accel LP
+	 * mode with WUOSC. Force the RC oscillator on via IDLE, then
+	 * wait for MCLK_RDY.
+	 */
+	ret = regmap_set_bits(map, INV_ICM42607_REG_PWR_MGMT0,
+			       INV_ICM42607_PWR_MGMT0_IDLE);
+	if (ret)
+		return ret;
+
+	/*
+	 * After setting the IDLE bit to 1 in PWR_MGMT0 register, wait for anywhere between
+	 * 10us to 200us which are the ACCEL_STARTUP time and accelerometer transition time
+	 * from OFF respectively.
+	 */
+	return regmap_read_poll_timeout(map, INV_ICM42607_REG_MCLK_RDY, val,
+			val & INV_ICM42607_MCLK_RDY_BIT, 10, 200);
+}
+
+int inv_icm42607_mreg_write(struct inv_icm42607_state *st, const u8 bank,
+			    const u8 addr, const u8 val)
+{
+	int ret;
+
+	ret = inv_icm42607_mreg_check(st);
+	if (ret)
+		return ret;
+
+	ret = regmap_write(st->map, INV_ICM42607_REG_BLK_SEL_W, bank);
+	if (ret)
+		return ret;
+
+	ret = regmap_write(st->map, INV_ICM42607_REG_MADDR_W, addr);
+	if (ret)
+		return ret;
+
+	ret = regmap_write(st->map, INV_ICM42607_REG_M_W, val);
+	if (ret)
+		return ret;
+
+	/*
+	 * As per the Datasheet Section 13 Accessing MREGx Registers,
+	 * there should be no read/writes to the device for 10us
+	 * after performing bank access.
+	 */
+	fsleep(10);
+	return regmap_write(st->map, INV_ICM42607_REG_BLK_SEL_W, 0x00);
+}
+
+int inv_icm42607_mreg_read(struct inv_icm42607_state *st, const u8 bank, const u8 addr, u8 *val)
+{
+	unsigned int read_val;
+	int ret;
+
+	ret = inv_icm42607_mreg_check(st);
+	if (ret)
+		return ret;
+
+	ret = regmap_write(st->map, INV_ICM42607_REG_BLK_SEL_R, bank);
+	if (ret)
+		return ret;
+
+	ret = regmap_write(st->map, INV_ICM42607_REG_MADDR_R, addr);
+	if (ret)
+		return ret;
+
+	/*
+	 * As per the Datasheet Section 13 Accessing MREGx Registers,
+	 * there should be no read/writes to the device for 10us
+	 * after performing bank access.
+	 */
+	fsleep(10);
+	ret = regmap_read(st->map, INV_ICM42607_REG_M_R, &read_val);
+	if (ret)
+		return ret;
+
+	*val = (u8)read_val;
+
+	/*
+	 * As per the Datasheet Section 13 Accessing MREGx Registers,
+	 * there should be no read/writes to the device for 10us
+	 * after performing bank access.
+	 */
+	fsleep(10);
+
+	return regmap_write(st->map, INV_ICM42607_REG_BLK_SEL_R, 0x00);
+}
+
 int inv_icm42607_read_sensor(struct iio_dev *indio_dev,
 			     struct iio_chan_spec const *chan,
 			     s16 *val)

-- 
2.43.0

[PATCH v3 7/8] iio: imu: inv_icm42607: Add accelerometer calibbias support

[Kanak Shilledar]

Expose IIO_CHAN_INFO_CALIBBIAS on the accelerometer channels. The
registers are stored in MREG1, which can be accessed by the mreg_read
and mreg_write routines. The calibration bias is written to OFFSET_USER4
to OFFSET_USER8 registers in MREG1.

Note: The accelerometer functionality is tested with Invensense,
ICM42370-P development board.

Datasheet: https://www.invensense.tdk.com/en-us/products/3-axis/icm-42370-p
Datasheet: https://www.lcsc.com/product-detail/C5129967.html
Signed-off-by: Kanak Shilledar <kanak.shilledar@axis.com>
---
 drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c | 238 +++++++++++++++++++++-
 1 file changed, 236 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c b/drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c
index 318373efeb9e..af2ac9d6a47c 100644
--- a/drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c
+++ b/drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c
@@ -13,6 +13,7 @@
 #include <linux/pm_runtime.h>
 #include <linux/regmap.h>
 #include <linux/types.h>
+#include <linux/units.h>
 
 #include "inv_icm42607.h"
 #include "inv_icm42607_temp.h"
@@ -22,9 +23,11 @@
 	.type = IIO_ACCEL,							\
 	.modified = 1,								\
 	.channel2 = _modifier,							\
-	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),				\
+	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |				\
+		BIT(IIO_CHAN_INFO_CALIBBIAS),					\
 	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),			\
-	.info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE),		\
+	.info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE) |	\
+		BIT(IIO_CHAN_INFO_CALIBBIAS),					\
 	.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),		\
 	.info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ),	\
 	.scan_index = _index,							\
@@ -56,6 +59,16 @@ static const struct iio_chan_spec inv_icm42607_accel_channels[] = {
 	INV_ICM42607_TEMP_CHAN(INV_ICM42607_ACCEL_SCAN_TEMP),
 };
 
+/*
+ * Calibration bias values, IIO range format int + micro.
+ * Value is limited to +/-1g coded on 12 bits signed. Step is 0.5mg.
+ */
+static int inv_icm42607_accel_calibbias[] = {
+	-10, 42010, /* Min : -2^11 * 0.0005 * 9.80665	   = -10.042010 m/s²	*/
+	  0,  4903, /* Step: 0.5 * 0.00980655		   = 0.004903 m/s²	*/
+	 10, 37106, /* Max : (2^11 - 1) * 0.0005 * 9.80665 = 10.037106 m/s²	*/
+};
+
 static const int inv_icm42607_accel_scale_nano[][2] = {
 	[INV_ICM42607_ACCEL_FS_16G] = { 0, 4788403 },
 	[INV_ICM42607_ACCEL_FS_8G] = { 0, 2394202 },
@@ -176,6 +189,221 @@ static int inv_icm42607_accel_write_odr(struct iio_dev *indio_dev,
 	return inv_icm42607_set_sensor_conf(st, &conf, IIO_ACCEL);
 }
 
+static int inv_icm42607_accel_read_offset(struct inv_icm42607_state *st,
+		struct iio_chan_spec const *chan, int *val, int *val2)
+{
+	struct device *dev = regmap_get_device(st->map);
+	u8 buffer_data[2];
+	unsigned int reg;
+	s16 offset;
+	s64 val64;
+	s32 bias;
+	int ret;
+
+	if (chan->type != IIO_ACCEL)
+		return -EINVAL;
+
+	switch (chan->channel2) {
+	case IIO_MOD_X:
+		reg = INV_ICM42607_REG_OFFSET_USER4;
+		break;
+	case IIO_MOD_Y:
+		reg = INV_ICM42607_REG_OFFSET_USER6;
+		break;
+	case IIO_MOD_Z:
+		reg = INV_ICM42607_REG_OFFSET_USER7;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	PM_RUNTIME_ACQUIRE_AUTOSUSPEND(dev, pm);
+	ret = PM_RUNTIME_ACQUIRE_ERR(&pm);
+	if (ret)
+		return ret;
+
+	guard(mutex)(&st->lock);
+
+	ret = inv_icm42607_mreg_read(st, INV_ICM42607_MREG1, reg, &buffer_data[0]);
+	if (ret)
+		return ret;
+
+	ret = inv_icm42607_mreg_read(st, INV_ICM42607_MREG1, reg + 1,
+				     &buffer_data[1]);
+	if (ret)
+		return ret;
+
+	/* 12 bits signed value */
+	switch (chan->channel2) {
+	case IIO_MOD_X:
+		offset = sign_extend32(((buffer_data[0] & 0xF0) << 4) | buffer_data[1], 11);
+		break;
+	case IIO_MOD_Y:
+		offset = sign_extend32(((buffer_data[1] & 0x0F) << 8) | buffer_data[0], 11);
+		break;
+	case IIO_MOD_Z:
+		offset = sign_extend32(((buffer_data[0] & 0xF0) << 4) | buffer_data[1], 11);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	/*
+	 * Convert raw offset to g then to m/s²
+	 * 12 bits signed raw step 0.5mg to g: 5 / 10000
+	 * g to m/s²: 9.806650
+	 * Result in micro (1000000)
+	 * (offset * 5 * 9.806650 * 1000000) / 10000
+	 */
+	val64 = (s64)offset * 5LL * 9806650LL;
+	/* For rounding, add + or - divisor (10000) divided by 2 */
+	if (val64 >= 0)
+		val64 += 10000LL / 2LL;
+	else
+		val64 -= 10000LL / 2LL;
+
+	bias = div_s64(val64, 10000L);
+	*val = bias / (long)MEGA;
+	*val2 = bias % (long)MEGA;
+
+	return IIO_VAL_INT_PLUS_MICRO;
+}
+
+static int inv_icm42607_accel_write_offset(struct iio_dev *indio_dev,
+					   struct iio_chan_spec const *chan,
+					   int val, int val2)
+{
+	struct inv_icm42607_state *st = iio_device_get_drvdata(indio_dev);
+	struct device *dev = regmap_get_device(st->map);
+	u8 hi, lo, regval;
+	s32 min, max;
+	s16 offset;
+	s64 val64;
+	int ret;
+
+	if (chan->type != IIO_ACCEL)
+		return -EINVAL;
+
+	/* inv_icm42607_accel_calibbias: min - step - max in micro */
+	min = inv_icm42607_accel_calibbias[0] * (long)MEGA -
+	      inv_icm42607_accel_calibbias[1];
+	max = inv_icm42607_accel_calibbias[4] * (long)MEGA +
+	      inv_icm42607_accel_calibbias[5];
+
+	val64 = (s64)val * (s64)MEGA;
+	if (val >= 0)
+		val64 += (s64)val2;
+	else
+		val64 -= (s64)val2;
+
+	if (val64 < min || val64 > max)
+		return -EINVAL;
+
+	/*
+	 * Convert m/s² to g then to raw value
+	 * m/s² to g: 1 / 9.806650
+	 * g to raw 12 bits signed, step 0.5mg: 10000 / 5
+	 * val in micro (1000000)
+	 * val * 10000 / (9.806650 * 1000000 * 5)
+	 */
+	val64 = val64 * 10000LL;
+
+	/* For rounding, add + or - divisor (9806650 * 5) divided by 2 */
+	if (val64 >= 0)
+		val64 += 9806650 * 5 / 2;
+	else
+		val64 -= 9806650 * 5 / 2;
+	offset = div_s64(val64, 9806650 * 5);
+
+	/* Clamp value limited to 12 bits signed */
+	if (offset < -2048)
+		offset = -2048;
+	else if (offset > 2047)
+		offset = 2047;
+
+	PM_RUNTIME_ACQUIRE_AUTOSUSPEND(dev, pm);
+	ret = PM_RUNTIME_ACQUIRE_ERR(&pm);
+	if (ret)
+		return ret;
+
+	guard(mutex)(&st->lock);
+
+	switch (chan->channel2) {
+	case IIO_MOD_X:
+		/* OFFSET_USER4 register is shared */
+		ret = inv_icm42607_mreg_read(st, INV_ICM42607_MREG1,
+				INV_ICM42607_REG_OFFSET_USER4, &regval);
+		if (ret)
+			return ret;
+
+		hi = ((offset & 0xF00) >> 4) | (regval & 0x0F);
+		lo = offset & 0xFF;
+
+		ret = inv_icm42607_mreg_write(st, INV_ICM42607_MREG1,
+				INV_ICM42607_REG_OFFSET_USER4, hi);
+		if (ret)
+			return ret;
+
+		ret = inv_icm42607_mreg_write(st, INV_ICM42607_MREG1,
+					      INV_ICM42607_REG_OFFSET_USER5, lo);
+
+		if (ret)
+			return ret;
+		break;
+
+	case IIO_MOD_Y:
+		/* OFFSET_USER7 register is shared */
+		ret = inv_icm42607_mreg_read(st, INV_ICM42607_MREG1,
+					     INV_ICM42607_REG_OFFSET_USER7,
+					     &regval);
+		if (ret)
+			return ret;
+
+		lo = offset & 0xFF;
+		hi = ((offset & 0xF00) >> 8) | (regval & 0xF0);
+
+		ret = inv_icm42607_mreg_write(st, INV_ICM42607_MREG1,
+					      INV_ICM42607_REG_OFFSET_USER7,
+					      hi);
+		if (ret)
+			return ret;
+
+		ret = inv_icm42607_mreg_write(st, INV_ICM42607_MREG1,
+					      INV_ICM42607_REG_OFFSET_USER6,
+					      lo);
+		if (ret)
+			return ret;
+		break;
+
+	case IIO_MOD_Z:
+		/* OFFSET_USER7 register is shared */
+		ret = inv_icm42607_mreg_read(st, INV_ICM42607_MREG1,
+					     INV_ICM42607_REG_OFFSET_USER7,
+					     &regval);
+		if (ret)
+			return ret;
+
+		hi = ((offset & 0xF00) >> 4) | (regval & 0x0F);
+		lo = offset & 0xFF;
+
+		ret = inv_icm42607_mreg_write(st, INV_ICM42607_MREG1,
+					      INV_ICM42607_REG_OFFSET_USER7, hi);
+		if (ret)
+			return ret;
+
+		ret = inv_icm42607_mreg_write(st, INV_ICM42607_MREG1,
+					      INV_ICM42607_REG_OFFSET_USER8, lo);
+		if (ret)
+			return ret;
+		break;
+
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
 static int inv_icm42607_accel_read_raw(struct iio_dev *indio_dev,
 				       struct iio_chan_spec const *chan,
 				       int *val, int *val2, long mask)
@@ -207,6 +435,8 @@ static int inv_icm42607_accel_read_raw(struct iio_dev *indio_dev,
 		return inv_icm42607_accel_read_scale(indio_dev, val, val2);
 	case IIO_CHAN_INFO_SAMP_FREQ:
 		return inv_icm42607_accel_read_odr(st, val, val2);
+	case IIO_CHAN_INFO_CALIBBIAS:
+		return inv_icm42607_accel_read_offset(st, chan, val, val2);
 	default:
 		return -EINVAL;
 	}
@@ -250,6 +480,8 @@ static int inv_icm42607_accel_write_raw(struct iio_dev *indio_dev,
 		return ret;
 	case IIO_CHAN_INFO_SAMP_FREQ:
 		return inv_icm42607_accel_write_odr(indio_dev, val, val2);
+	case IIO_CHAN_INFO_CALIBBIAS:
+		return inv_icm42607_accel_write_offset(indio_dev, chan, val, val2);
 	default:
 		return -EINVAL;
 	}
@@ -266,6 +498,8 @@ static int inv_icm42607_accel_write_raw_get_fmt(struct iio_dev *indio_dev,
 		return IIO_VAL_INT_PLUS_NANO;
 	case IIO_CHAN_INFO_SAMP_FREQ:
 		return IIO_VAL_INT_PLUS_MICRO;
+	case IIO_CHAN_INFO_CALIBBIAS:
+		return IIO_VAL_INT_PLUS_MICRO;
 	default:
 		return -EINVAL;
 	}

-- 
2.43.0

[PATCH v3 8/8] iio: imu: inv_icm42607: Add gyroscope calibbias support

[Kanak Shilledar]

Expose IIO_CHAN_INFO_CALIBBIAS on the gyroscope channels. The
registers are stored in MREG1, which can be accessed by the mreg_read
and mreg_write routines. The calibration bias is written to OFFSET_USER0
to OFFSET_USER3 registers in MREG1.

Note: The gyroscope calibbias functionality is not tested on actual
hardware.

Datasheet: https://www.invensense.tdk.com/en-us/products/3-axis/icm-42370-p
Datasheet: https://www.lcsc.com/product-detail/C5129967.html
Signed-off-by: Kanak Shilledar <kanak.shilledar@axis.com>
---
 drivers/iio/imu/inv_icm42607/inv_icm42607_gyro.c | 233 ++++++++++++++++++++++-
 1 file changed, 231 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/imu/inv_icm42607/inv_icm42607_gyro.c b/drivers/iio/imu/inv_icm42607/inv_icm42607_gyro.c
index fb9bacee4e8d..58647cbd4ea4 100644
--- a/drivers/iio/imu/inv_icm42607/inv_icm42607_gyro.c
+++ b/drivers/iio/imu/inv_icm42607/inv_icm42607_gyro.c
@@ -13,6 +13,7 @@
 #include <linux/pm_runtime.h>
 #include <linux/regmap.h>
 #include <linux/types.h>
+#include <linux/units.h>
 
 #include "inv_icm42607.h"
 #include "inv_icm42607_temp.h"
@@ -22,9 +23,11 @@
 	.type = IIO_ANGL_VEL,							\
 	.modified = 1,								\
 	.channel2 = _modifier,							\
-	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),				\
+	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |				\
+		BIT(IIO_CHAN_INFO_CALIBBIAS),					\
 	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),			\
-	.info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE),		\
+	.info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE) |	\
+		BIT(IIO_CHAN_INFO_CALIBBIAS),					\
 	.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),		\
 	.info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ),	\
 	.scan_index = _index,							\
@@ -63,6 +66,16 @@ static const int inv_icm42607_gyro_scale_nano[][2] = {
 	[INV_ICM42607_GYRO_FS_250DPS] = { 0, 133158 },
 };
 
+/*
+ * Calibration bias values, IIO range format int + micro.
+ * Value is limited to +/-64 dps coded on 12 bits signed. Step is 1/32 dps.
+ */
+static int inv_icm42607_gyro_calibbias[] = {
+	-1, 117011, /* Min : -2^11 * (1/32) * (pi/180)	    = -1.117011 rad/s	*/
+	 0,    545, /* Step: (1/32) * (pi/180)		    = 0.000545 rad/s	*/
+	 1, 116465, /* Max : (2^11 - 1) * (1/32) * (pi/180) = 1.116465 rad/s	*/
+};
+
 static int inv_icm42607_gyro_read_scale(struct iio_dev *indio_dev,
 					int *val, int *val2)
 {
@@ -173,6 +186,209 @@ static int inv_icm42607_gyro_write_odr(struct iio_dev *indio_dev,
 	return inv_icm42607_set_sensor_conf(st, &conf, IIO_ANGL_VEL);
 }
 
+static int inv_icm42607_gyro_read_offset(struct inv_icm42607_state *st,
+					 struct iio_chan_spec const *chan,
+					 int *val, int *val2)
+{
+	struct device *dev = regmap_get_device(st->map);
+	s16 offset;
+	s64 val64;
+	u8 lo, hi;
+	s32 bias;
+	int ret;
+
+	if (chan->type != IIO_ANGL_VEL)
+		return -EINVAL;
+
+	PM_RUNTIME_ACQUIRE_AUTOSUSPEND(dev, pm);
+	ret = PM_RUNTIME_ACQUIRE_ERR(&pm);
+	if (ret)
+		return ret;
+
+	guard(mutex)(&st->lock);
+
+	switch (chan->channel2) {
+	case IIO_MOD_X:
+		ret = inv_icm42607_mreg_read(st, INV_ICM42607_MREG1,
+					     INV_ICM42607_REG_OFFSET_USER0, &lo);
+		if (ret)
+			return ret;
+		ret = inv_icm42607_mreg_read(st, INV_ICM42607_MREG1,
+					     INV_ICM42607_REG_OFFSET_USER1, &hi);
+		if (ret)
+			return ret;
+		offset = sign_extend32(((hi & 0x0F) << 8) | lo, 11);
+		break;
+
+	case IIO_MOD_Y:
+		ret = inv_icm42607_mreg_read(st, INV_ICM42607_MREG1,
+					     INV_ICM42607_REG_OFFSET_USER2, &lo);
+		if (ret)
+			return ret;
+		ret = inv_icm42607_mreg_read(st, INV_ICM42607_MREG1,
+					     INV_ICM42607_REG_OFFSET_USER1, &hi);
+		if (ret)
+			return ret;
+		offset = sign_extend32((((hi & 0xF0) >> 4) << 8) | lo, 11);
+		break;
+
+	case IIO_MOD_Z:
+		ret = inv_icm42607_mreg_read(st, INV_ICM42607_MREG1,
+					     INV_ICM42607_REG_OFFSET_USER3, &lo);
+		if (ret)
+			return ret;
+		ret = inv_icm42607_mreg_read(st, INV_ICM42607_MREG1,
+					     INV_ICM42607_REG_OFFSET_USER4, &hi);
+		if (ret)
+			return ret;
+		offset = sign_extend32(((hi & 0x0F) << 8) | lo, 11);
+		break;
+
+	default:
+		return -EINVAL;
+	}
+
+	/*
+	 * Convert raw offset to dps then to rad/s
+	 * 12 bits signed raw, step 1/32 dps
+	 * dps to rad/s: pi / 180
+	 * Result in micro (1000000): offset * 5760 / (pi * 1e6)  [inverse below]
+	 * offset * pi * 1e6 / 5760, using pi*1e6 ~= 3141593
+	 */
+	val64 = (s64)offset * 3141593LL;
+	if (val64 >= 0)
+		val64 += 5760LL / 2LL;
+	else
+		val64 -= 5760LL / 2LL;
+
+	bias = div_s64(val64, 5760L);
+	*val = bias / (long)MEGA;
+	*val2 = bias % (long)MEGA;
+
+	return IIO_VAL_INT_PLUS_MICRO;
+}
+
+static int inv_icm42607_gyro_write_offset(struct iio_dev *indio_dev,
+					  struct iio_chan_spec const *chan,
+					  int val, int val2)
+{
+	struct inv_icm42607_state *st = iio_device_get_drvdata(indio_dev);
+	struct device *dev = regmap_get_device(st->map);
+	u8 hi, lo, regval;
+	s64 min64, max64;
+	s16 offset;
+	s64 val64;
+	int ret;
+
+	if (chan->type != IIO_ANGL_VEL)
+		return -EINVAL;
+
+	/* inv_icm42607_gyro_calibbias: min - step - max in micro */
+	min64 = (s64)inv_icm42607_gyro_calibbias[0] * MEGA -
+		inv_icm42607_gyro_calibbias[1];
+	max64 = (s64)inv_icm42607_gyro_calibbias[4] * MEGA +
+		inv_icm42607_gyro_calibbias[5];
+
+	val64 = (s64)val * (s64)MEGA;
+	if (val >= 0)
+		val64 += (s64)val2;
+	else
+		val64 -= (s64)val2;
+
+	if (val64 < min64 || val64 > max64)
+		return -EINVAL;
+
+	/*
+	 * Convert rad/s to dps then to raw 12-bit signed value, step 1/32 dps
+	 * offset = val(rad/s, micro) * 5760 / (pi * 1e6), pi*1e6 ~= 3141593
+	 */
+	val64 = val64 * 5760LL;
+	if (val64 >= 0)
+		val64 += 3141593LL / 2LL;
+	else
+		val64 -= 3141593LL / 2LL;
+	offset = div_s64(val64, 3141593LL);
+
+	if (offset < -2048)
+		offset = -2048;
+	else if (offset > 2047)
+		offset = 2047;
+
+	PM_RUNTIME_ACQUIRE_AUTOSUSPEND(dev, pm);
+	ret = PM_RUNTIME_ACQUIRE_ERR(&pm);
+	if (ret)
+		return ret;
+
+	guard(mutex)(&st->lock);
+
+	switch (chan->channel2) {
+	case IIO_MOD_X:
+		/* OFFSET_USER1 register is shared with Y */
+		ret = inv_icm42607_mreg_read(st, INV_ICM42607_MREG1,
+					     INV_ICM42607_REG_OFFSET_USER1, &regval);
+		if (ret)
+			return ret;
+
+		lo = offset & 0xFF;
+		hi = ((offset & 0xF00) >> 8) | (regval & 0xF0);
+
+		ret = inv_icm42607_mreg_write(st, INV_ICM42607_MREG1,
+					      INV_ICM42607_REG_OFFSET_USER0, lo);
+		if (ret)
+			return ret;
+		ret = inv_icm42607_mreg_write(st, INV_ICM42607_MREG1,
+					      INV_ICM42607_REG_OFFSET_USER1, hi);
+		if (ret)
+			return ret;
+		break;
+
+	case IIO_MOD_Y:
+		/* OFFSET_USER1 register is shared with X */
+		ret = inv_icm42607_mreg_read(st, INV_ICM42607_MREG1,
+					     INV_ICM42607_REG_OFFSET_USER1, &regval);
+		if (ret)
+			return ret;
+
+		lo = offset & 0xFF;
+		hi = ((offset & 0xF00) >> 4) | (regval & 0x0F);
+
+		ret = inv_icm42607_mreg_write(st, INV_ICM42607_MREG1,
+					      INV_ICM42607_REG_OFFSET_USER2, lo);
+		if (ret)
+			return ret;
+		ret = inv_icm42607_mreg_write(st, INV_ICM42607_MREG1,
+					      INV_ICM42607_REG_OFFSET_USER1, hi);
+		if (ret)
+			return ret;
+		break;
+
+	case IIO_MOD_Z:
+		/* OFFSET_USER4 register is shared with accel X */
+		ret = inv_icm42607_mreg_read(st, INV_ICM42607_MREG1,
+					     INV_ICM42607_REG_OFFSET_USER4, &regval);
+		if (ret)
+			return ret;
+
+		lo = offset & 0xFF;
+		hi = ((offset & 0xF00) >> 8) | (regval & 0xF0);
+
+		ret = inv_icm42607_mreg_write(st, INV_ICM42607_MREG1,
+					      INV_ICM42607_REG_OFFSET_USER3, lo);
+		if (ret)
+			return ret;
+		ret = inv_icm42607_mreg_write(st, INV_ICM42607_MREG1,
+					      INV_ICM42607_REG_OFFSET_USER4, hi);
+		if (ret)
+			return ret;
+		break;
+
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
 static int inv_icm42607_gyro_read_raw(struct iio_dev *indio_dev,
 				      struct iio_chan_spec const *chan,
 				      int *val, int *val2, long mask)
@@ -204,6 +420,8 @@ static int inv_icm42607_gyro_read_raw(struct iio_dev *indio_dev,
 		return inv_icm42607_gyro_read_scale(indio_dev, val, val2);
 	case IIO_CHAN_INFO_SAMP_FREQ:
 		return inv_icm42607_gyro_read_odr(st, val, val2);
+	case IIO_CHAN_INFO_CALIBBIAS:
+		return inv_icm42607_gyro_read_offset(st, chan, val, val2);
 	default:
 		return -EINVAL;
 	}
@@ -228,6 +446,13 @@ static int inv_icm42607_gyro_read_avail(struct iio_dev *indio_dev,
 		*length = (ARRAY_SIZE(inv_icm42607_gyro_odr) -
 			   INV_ICM42607_ODR_1600HZ) * 2;
 		return IIO_AVAIL_LIST;
+	case IIO_CHAN_INFO_CALIBBIAS:
+		if (chan->type != IIO_ANGL_VEL)
+			return -EINVAL;
+		*vals = inv_icm42607_gyro_calibbias;
+		*type = IIO_VAL_INT_PLUS_MICRO;
+		*length = ARRAY_SIZE(inv_icm42607_gyro_calibbias);
+		return IIO_AVAIL_RANGE;
 	default:
 		return -EINVAL;
 	}
@@ -247,6 +472,8 @@ static int inv_icm42607_gyro_write_raw(struct iio_dev *indio_dev,
 		return ret;
 	case IIO_CHAN_INFO_SAMP_FREQ:
 		return inv_icm42607_gyro_write_odr(indio_dev, val, val2);
+	case IIO_CHAN_INFO_CALIBBIAS:
+		return inv_icm42607_gyro_write_offset(indio_dev, chan, val, val2);
 	default:
 		return -EINVAL;
 	}
@@ -263,6 +490,8 @@ static int inv_icm42607_gyro_write_raw_get_fmt(struct iio_dev *indio_dev,
 		return IIO_VAL_INT_PLUS_NANO;
 	case IIO_CHAN_INFO_SAMP_FREQ:
 		return IIO_VAL_INT_PLUS_MICRO;
+	case IIO_CHAN_INFO_CALIBBIAS:
+		return IIO_VAL_INT_PLUS_MICRO;
 	default:
 		return -EINVAL;
 	}

-- 
2.43.0

Re: [PATCH v3 1/8] dt-bindings: Add InvenSense ICM-42370-p accelerometer

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The schema includes SPI properties and unconditionally references the SPI peripheral schema, directly contradicting the commit message which states only I2C support is being added.
--

commit df5e4c67004b6299d9c5cce9f57c0acaa91c89bb
Author: Kanak Shilledar <kanak.shilledar@axis.com>

dt-bindings: Add InvenSense ICM-42370-p accelerometer

This commit adds the devicetree binding documentation for the InvenSense
ICM42370P 3-axis accelerometer. The commit message explicitly states that
only I2C support is being added, leaving SPI and I3C for future work.

> diff --git a/Documentation/devicetree/bindings/iio/accel/invensense,icm42370p.yaml b/Documentation/devicetree/bindings/iio/accel/invensense,icm42370p.yaml
> new file mode 100644
> index 0000000000000..d519dc7e63dd0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/accel/invensense,icm42370p.yaml

[ ... ]

> +  vddio-supply:
> +    description: Regulator operating range between 1.71V to 3.6V.
> +
> +  spi-cpha: true
> +  spi-cpol: true

[Severity: Medium]
The commit message states that only I2C support is being added and leaves
other protocols for future work. Are these SPI-specific properties intended
to be explicitly permitted here despite the stated omission of SPI support?

> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - vdd-supply
> +  - vddio-supply
> +
> +allOf:
> +  - $ref: /schemas/spi/spi-peripheral-props.yaml#

[Severity: Medium]
Does unconditionally referencing the SPI peripheral schema here allow invalid
device tree configurations to silently pass validation? Since the binding is
currently scoped to I2C, this might inadvertently allow I2C nodes to define
SPI-specific properties without causing validation errors.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260901-b4-inv_icm42370p-v3-0-77cc31642115@axis.com?part=1

Re: [PATCH v3 6/8] iio: imu: inv_icm42607: Implement MREGx register access

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] Resource leak: The RC oscillator is forced on for MREG access but never explicitly turned off.
- [Medium] Unintended power state regression: default accelerometer mode for ICM42370 changed to LOW_POWER.
--

commit 5e054b5c4e067c471755e5889343bfd30cf9d57a
Author: Kanak Shilledar <kanak.shilledar@axis.com>

iio: imu: inv_icm42607: Implement MREGx register access

This commit implements indirect register access to different banks (MREGx)
for the inv_icm42607 IMU driver. This allows accessing registers configured
via the user and implementing buffer support. It also alters the default
accelerometer configuration for the ICM42370.

Datasheet: https://www.invensense.tdk.com/en-us/products/3-axis/icm-42370-p
Datasheet: https://www.lcsc.com/product-detail/C5129967.html

> diff --git a/drivers/iio/imu/inv_icm42607/inv_icm42607_core.c b/drivers/iio/imu/inv_icm42607/inv_icm42607_core.c
> index e77d72e0f7bc6..6e514b8682a0e 100644
> --- a/drivers/iio/imu/inv_icm42607/inv_icm42607_core.c
> +++ b/drivers/iio/imu/inv_icm42607/inv_icm42607_core.c
[ ... ]
> @@ -96,7 +99,7 @@ static const struct inv_icm42607_conf inv_icm42607_default_conf = {
>  static const struct inv_icm42607_conf inv_icm42370_default_conf = {
>  	.gyro = { },
>  	.accel = {
> -		.mode = INV_ICM42607_SENSOR_MODE_OFF,
> +		.mode = INV_ICM42607_SENSOR_MODE_LOW_POWER,

[Severity: Medium]
Does this unintentionally cause the accelerometer to consume power immediately
upon probe?

During driver probe, inv_icm42607_set_init_conf() writes this initial state
to the hardware. This undocumented change forces the accelerometer to turn on
immediately at boot. 

While runtime PM will eventually suspend the device and turn it off after a
2-second delay, it introduces an unnecessary power spike at boot and leaves
the software defaults in an inconsistent state.

>  		.fs = INV_ICM42607_ACCEL_FS_4G,
>  		.odr = INV_ICM42607_ODR_100HZ,
>  		.filter = INV_ICM42607_FILTER_BW_25HZ,
[ ... ]
> @@ -352,6 +355,107 @@ int inv_icm42607_set_sensor_conf(struct inv_icm42607_state *st,
>  	}
>  }
>  
> +static int inv_icm42607_mreg_check(struct inv_icm42607_state *st)
> +{
> +	struct regmap *map = st->map;
> +	unsigned int val;
> +	int ret;
> +
> +	ret = regmap_read(map, INV_ICM42607_REG_MCLK_RDY, &val);
> +	if (ret)
> +		return ret;
> +
> +	if (val & INV_ICM42607_MCLK_RDY_BIT)
> +		return 0;
> +
> +	/*
> +	 * Clock isn't running: we're either in Sleep mode or Accel LP
> +	 * mode with WUOSC. Force the RC oscillator on via IDLE, then
> +	 * wait for MCLK_RDY.
> +	 */
> +	ret = regmap_set_bits(map, INV_ICM42607_REG_PWR_MGMT0,
> +			       INV_ICM42607_PWR_MGMT0_IDLE);

[Severity: Medium]
Does this code leak power by leaving the RC oscillator running indefinitely?

inv_icm42607_mreg_check() sets the INV_ICM42607_PWR_MGMT0_IDLE bit to force
the RC oscillator on when accessing MREGs while the sensor is in OFF or
LOW_POWER mode. The datasheet explicitly requires this bit to be cleared
after MREG access is complete to save power.

Neither inv_icm42607_mreg_check() nor the read/write sequences clear this
bit. Although runtime PM autosuspend (after a 2-second delay) will
coincidentally overwrite PWR_MGMT0 and clear the bit, this still leaves the
oscillator running needlessly for 2 seconds per access, or indefinitely if
runtime PM is disabled, causing a persistent power leak.

> +	if (ret)
> +		return ret;
> +
> +	/*
> +	 * After setting the IDLE bit to 1 in PWR_MGMT0 register, wait for anywhere between
> +	 * 10us to 200us which are the ACCEL_STARTUP time and accelerometer transition time
> +	 * from OFF respectively.
> +	 */
> +	return regmap_read_poll_timeout(map, INV_ICM42607_REG_MCLK_RDY, val,
> +			val & INV_ICM42607_MCLK_RDY_BIT, 10, 200);
> +}

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260901-b4-inv_icm42370p-v3-0-77cc31642115@axis.com?part=6

Re: [PATCH v3 7/8] iio: imu: inv_icm42607: Add accelerometer calibbias support

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Exposed sysfs attribute 'in_accel_calibbias_available' always returns -EINVAL because read_avail lacks the CALIBBIAS case.
--

commit aeb9058f622a7efa1cb2fe93f6364aaec05fb334
Author: Kanak Shilledar <kanak.shilledar@axis.com>

iio: imu: inv_icm42607: Add accelerometer calibbias support

Expose IIO_CHAN_INFO_CALIBBIAS on the accelerometer channels. The
registers are stored in MREG1, which can be accessed by the mreg_read
and mreg_write routines. The calibration bias is written to OFFSET_USER4
to OFFSET_USER8 registers in MREG1.

> diff --git a/drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c b/drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c
> index 318373efeb9e9..af2ac9d6a47c8 100644
> --- a/drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c
> +++ b/drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c

[ ... ]

> @@ -22,9 +23,11 @@
>  	.type = IIO_ACCEL,							\
>  	.modified = 1,								\
>  	.channel2 = _modifier,							\
> -	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),				\
> +	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |				\
> +		BIT(IIO_CHAN_INFO_CALIBBIAS),					\
>  	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),			\
> -	.info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE),		\
> +	.info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE) |	\
> +		BIT(IIO_CHAN_INFO_CALIBBIAS),					\

[Severity: Medium]
Will reading the in_accel_calibbias_available sysfs attribute fail with
-EINVAL?

Since IIO_CHAN_INFO_CALIBBIAS was added to the _available mask here, does
inv_icm42607_accel_read_avail() also need a new case to handle it?

Right now, it appears to fall through to the default error case:

inv_icm42607_accel_read_avail() {
	switch (mask) {
	case IIO_CHAN_INFO_SCALE:
		...
	case IIO_CHAN_INFO_SAMP_FREQ:
		...
	default:
		return -EINVAL;
	}
}

>  	.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),		\
>  	.info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ),	\
>  	.scan_index = _index,							\

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260901-b4-inv_icm42370p-v3-0-77cc31642115@axis.com?part=7

Re: [PATCH v3 0/8] Add support for InvenSense ICM-42370-P accelerometer

[Andy Shevchenko]

On Tue, Sep 01, 2026 at 04:35:53PM +0200, Kanak Shilledar wrote:
> InvenSense ICM42370P is a high performance MEMS MotionTracking 3-axis
> accelerometer. It supports I2C, I3C and SPI protocols. It has a 2.25kB
> FIFO and two programmable interrupts with support for ultra-low-power
> wake-on-motion support. It has a built-in temperature sensor. This
> patch series adds basic support for the sensor with functionality of
> performing raw reads and writes via the I2C interface.
> 
> This device contains 4 register banks for configuring the device called
> MREG0, MREG1, MREG2 and MREG3. Unlike other devices from the same
> vendor, this contains a very different way of accessing the register
> banks apart from the default user bank 0 (MREG0). The register bank access
> procedure is mentioned in the datasheet Section 13. This is very
> similar to the existing InvenSense, ICM-42607-P driver. Thus, it
> improves the existing driver support and adds the ICM-42370-P device to
> it.
> 
> While adding the support for new device, I tried to perform some fixes
> to the existing driver which were pointed out in the v2 of this patch
> series.
> 
> The buffer support will be added in another patch series.
> 
> Note: The datasheet for InvenSense, ICM-42607-P could not be found on the 
> official https://www.invensense.tdk.com/en-us website. Thus, I am 
> using the datasheet available at https://www.lcsc.com.
> 
> Question to the reviewers:
> * There is no entry for drivers/iio/imu/inv_icm42607 in the MAINTAINERS
>   file, should a new MAINTAINERS entry be created for the inv_icm42607
>   driver with the original author as the maintainer? Currently
>   `get_maintainers.pl` is able to add the original author to the
>   recipients list, but `b4 prep --auto-to-cc` is not able to add.

Only if you have (or will have for sure) the confirmation from them.
Otherwise it's you most likely...

> * As per the comments in v2 from @Jonathan regarding splitting the
>   driver into multiple files, should we still have the driver as
>   multiple files or should it be merged into a single file?

It depends on the factors like busses to support.

> * As per the comments in v2 regarding the formatting of
>   headerfile with the positioning of macros, enums and function
>   prototypes, as well as indentation of in the register values, also the
>   all the enum values are numbered which seems unnecessary, should these
>   be implemented here as well?

-- 
With Best Regards,
Andy Shevchenko