[PATCH 00/10] ARM: dts: dm816x: fixes and peripheral updates for DM8168 SoC

[PATCH 00/10] ARM: dts: dm816x: fixes and peripheral updates for DM8168 SoC

[Ettore Chimenti]

This patch series collects several fixes and peripheral enhancements for TI
DM816x SoCs and the DM8168-EVM board:

- Pinctrl: add correct pullup/down enable defines for DM816X SoCs, which
  they appear to be inverted respect to OMAP2/3.
- SD: explicit pullup disable in DM8168-EVM SD card pinmuxing.
- Clocks & Timers: Correct sysclk5 frequency definition in DT.
- Storage (MMC): Update MMC node settings.
- USB: Update MUSB node, enable multipoint mode, and prevent USB idle issues.

Signed-off-by: Ettore Chimenti <ettore.chimenti@linaro.org>
---
Andrew Goodbody (7):
      ARM: ti81xx: Prevent USB being put into idle
      ARM: dts: omap: dm816x: Fix pinctrl range
      ARM: dts: omap: dm816x: refactor and align MMC node
      ARM: dts: omap: dm816x: Update USB node
      ARM: omap: dm816x: Match up capability flags for USB
      ARM: dts: omap: dm816x: Correct speed for sysclk5
      ARM: dts: omap: dm8168-evm: Correct SD card pinmux

Christopher Obbard (1):
      ARM: dts: omap: dm8168-evm: enable MUSB multipoint support

Ettore Chimenti (2):
      dt-bindings: pinctrl: Add devicetree bindings for DM816x SoC Pinctrl
      ARM: dts: omap: dm816x: use dedicated SoC pinctrl

 arch/arm/boot/dts/ti/omap/dm8168-evm.dts     | 17 +++---
 arch/arm/boot/dts/ti/omap/dm816x-clocks.dtsi |  2 +-
 arch/arm/boot/dts/ti/omap/dm816x.dtsi        | 78 +++++++++++++++++++---------
 arch/arm/mach-omap2/omap_hwmod_81xx_data.c   |  3 +-
 include/dt-bindings/pinctrl/dm816x.h         | 20 +++++++
 5 files changed, 84 insertions(+), 36 deletions(-)
---
base-commit: 045958acaa75205b31578cb22c4345e28dd2e4bf
change-id: 20261015-patch-ektor5-dm8168-dts-24b35c8019f6

Best regards,
--  
Ettore Chimenti <ettore.chimenti@linaro.org>

[PATCH 01/10] ARM: ti81xx: Prevent USB being put into idle

[Ettore Chimenti]

From: Andrew Goodbody <andrew.goodbody@linaro.org>

There is an issue with USB being put into idle with DMA enabled and that
is mostly prevented with usbcore.autosuspend=-1 on the kernel command
line. Stop the ti,hwmod code from putting it into idle by setting the
appropriate flag. This stops the log entry 'clk:0058:0: failed to
disable' being generated.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Signed-off-by: Ettore Chimenti <ettore.chimenti@linaro.org>
---
 arch/arm/mach-omap2/omap_hwmod_81xx_data.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
index 9b5c728fb7da..2f55dc32e150 100644
--- a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
@@ -650,6 +650,7 @@ static struct omap_hwmod dm816x_usbss_hwmod = {
 	.name		= "usb_otg_hs",
 	.clkdm_name	= "default_l3_slow_clkdm",
 	.main_clk	= "sysclk6_ck",
+	.flags		= HWMOD_NO_IDLE,
 	.prcm		= {
 		.omap4 = {
 			.clkctrl_offs = DM81XX_CM_DEFAULT_USB_CLKCTRL,

-- 
2.56.0

[PATCH 02/10] dt-bindings: pinctrl: Add devicetree bindings for DM816x SoC Pinctrl

[Ettore Chimenti]

Add devicetree bindings for TI DM816x SoC pinctrl configuration.
Using same definition as OMAP2/3 except pullup/down enable macros, which
are inverted in this SoC.

Signed-off-by: Ettore Chimenti <ettore.chimenti@linaro.org>
---
 include/dt-bindings/pinctrl/dm816x.h | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/include/dt-bindings/pinctrl/dm816x.h b/include/dt-bindings/pinctrl/dm816x.h
new file mode 100644
index 000000000000..15aa15bca9bd
--- /dev/null
+++ b/include/dt-bindings/pinctrl/dm816x.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * This header provides constants specific to DM816X pinctrl bindings.
+ */
+
+#ifndef _DT_BINDINGS_PINCTRL_DM816X_H
+#define _DT_BINDINGS_PINCTRL_DM816X_H
+
+#include <dt-bindings/pinctrl/omap.h>
+
+#undef PULL_UP
+#undef PULL_ENA
+
+/* DM81xx mux bit defines */
+#define PULL_ENA		(0 << 3)  /* Pullup enabled  => 0 */
+#define PULL_DIS		(1 << 3)  /* Pullup disabled => 1 */
+#define PULL_DN			(0 << 4)
+#define PULL_UP			(1 << 4)
+
+#endif

-- 
2.56.0

Re: [PATCH 02/10] dt-bindings: pinctrl: Add devicetree bindings for DM816x SoC Pinctrl

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] dt-bindings: dm816x: PIN_INPUT/OUTPUT macros implicitly enable pulldowns
--

commit adcfa5381ee4b63a7366410a6458384ec5d3b10f
Author: Ettore Chimenti <ettore.chimenti@linaro.org>

dt-bindings: pinctrl: Add devicetree bindings for DM816x SoC Pinctrl

This commit adds devicetree bindings for TI DM816x SoC pinctrl configuration.
It uses the OMAP2/3 definitions but attempts to handle the inverted
pullup/down enable macros specific to this SoC.

> diff --git a/include/dt-bindings/pinctrl/dm816x.h b/include/dt-bindings/pinctrl/dm816x.h
> new file mode 100644
> index 0000000000000..15aa15bca9bd5
> --- /dev/null
> +++ b/include/dt-bindings/pinctrl/dm816x.h
> @@ -0,0 +1,20 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * This header provides constants specific to DM816X pinctrl bindings.
> + */
> +
> +#ifndef _DT_BINDINGS_PINCTRL_DM816X_H
> +#define _DT_BINDINGS_PINCTRL_DM816X_H
> +
> +#include <dt-bindings/pinctrl/omap.h>
> +
> +#undef PULL_UP
> +#undef PULL_ENA
> +
> +/* DM81xx mux bit defines */
> +#define PULL_ENA		(0 << 3)  /* Pullup enabled  => 0 */
> +#define PULL_DIS		(1 << 3)  /* Pullup disabled => 1 */

[Severity: High]
Does this implicitly enable pulldowns for all inputs and outputs? 

Because the DM816x SoC uses inverted pull-enable logic where bit 3 being 0
enables the pull resistor, inheriting the generic PIN_INPUT and PIN_OUTPUT
macros directly from omap.h will evaluate them with bit 3 as 0. 

This makes it difficult to configure floating inputs or plain outputs without
pulls using the standard macros. Should this header also #undef and redefine
PIN_INPUT and PIN_OUTPUT to bitwise-OR the PULL_DIS flag so that pulls are
disabled by default?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261016-patch-ektor5-dm8168-dts-v1-0-b4ce30217028@linaro.org?part=2

Re: [PATCH 02/10] dt-bindings: pinctrl: Add devicetree bindings for DM816x SoC Pinctrl

[Krzysztof Kozlowski]

On 16/10/2026 16:41, Ettore Chimenti wrote:
> Add devicetree bindings for TI DM816x SoC pinctrl configuration.
> Using same definition as OMAP2/3 except pullup/down enable macros, which
> are inverted in this SoC.
> 
> Signed-off-by: Ettore Chimenti <ettore.chimenti@linaro.org>
> ---
>  include/dt-bindings/pinctrl/dm816x.h | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/include/dt-bindings/pinctrl/dm816x.h b/include/dt-bindings/pinctrl/dm816x.h
> new file mode 100644
> index 000000000000..15aa15bca9bd
> --- /dev/null
> +++ b/include/dt-bindings/pinctrl/dm816x.h
> @@ -0,0 +1,20 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * This header provides constants specific to DM816X pinctrl bindings.
> + */
> +
> +#ifndef _DT_BINDINGS_PINCTRL_DM816X_H
> +#define _DT_BINDINGS_PINCTRL_DM816X_H
> +
> +#include <dt-bindings/pinctrl/omap.h>

I do not see this being used here, IWYU.

> +
> +#undef PULL_UP
> +#undef PULL_ENA

Why are you undefining other macros? That's not a easy to follow code.


> +
> +/* DM81xx mux bit defines */
> +#define PULL_ENA		(0 << 3)  /* Pullup enabled  => 0 */
> +#define PULL_DIS		(1 << 3)  /* Pullup disabled => 1 */
> +#define PULL_DN			(0 << 4)
> +#define PULL_UP			(1 << 4)

I do not see this used by drivers, so why do we need one more header?
What part of SW are you binding here?


Best regards,
Krzysztof

Re: [PATCH 02/10] dt-bindings: pinctrl: Add devicetree bindings for DM816x SoC Pinctrl

[Ettore Chimenti]

Hi Krzyszrof,

On Fri Oct 16, 2026 at 4:51 PM CEST, Krzysztof Kozlowski wrote:
> On 16/10/2026 16:41, Ettore Chimenti wrote:
>> Add devicetree bindings for TI DM816x SoC pinctrl configuration.
>> Using same definition as OMAP2/3 except pullup/down enable macros, which
>> are inverted in this SoC.
>> 
>> Signed-off-by: Ettore Chimenti <ettore.chimenti@linaro.org>
>> ---
>>  include/dt-bindings/pinctrl/dm816x.h | 20 ++++++++++++++++++++
>>  1 file changed, 20 insertions(+)
>> 
>> diff --git a/include/dt-bindings/pinctrl/dm816x.h b/include/dt-bindings/pinctrl/dm816x.h
>> new file mode 100644
>> index 000000000000..15aa15bca9bd
>> --- /dev/null
>> +++ b/include/dt-bindings/pinctrl/dm816x.h
>> @@ -0,0 +1,20 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
>> +/*
>> + * This header provides constants specific to DM816X pinctrl bindings.
>> + */
>> +
>> +#ifndef _DT_BINDINGS_PINCTRL_DM816X_H
>> +#define _DT_BINDINGS_PINCTRL_DM816X_H
>> +
>> +#include <dt-bindings/pinctrl/omap.h>
>
> I do not see this being used here, IWYU.
>
>> +
>> +#undef PULL_UP
>> +#undef PULL_ENA
>
> Why are you undefining other macros? That's not a easy to follow code.

Do you prefer to duplicate `omap.h` defines? Only the defines above do not
apply to DM816x.

>
>
>> +
>> +/* DM81xx mux bit defines */
>> +#define PULL_ENA		(0 << 3)  /* Pullup enabled  => 0 */
>> +#define PULL_DIS		(1 << 3)  /* Pullup disabled => 1 */
>> +#define PULL_DN			(0 << 4)
>> +#define PULL_UP			(1 << 4)
>
> I do not see this used by drivers, so why do we need one more header?
> What part of SW are you binding here?
>

I added those (DN/UP) because they are not defined in `omap.h`. It may be
convenient for future board upstreaming. I can drop those if undesired.

>
> Best regards,
> Krzysztof

Best regards,
Ettore

[PATCH 03/10] ARM: dts: omap: dm816x: use dedicated SoC pinctrl

[Ettore Chimenti]

In the TI Sitara DM816x SoCs, the pinctrl configuration macros are not
identical to OMAP2/3. They are actually inverted between Pullup/down
enabled and disabled (third bit in pinctrl registers). Using dedicated
DM816x pinctrl header to differentiate between the SoC families.

Tested-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Signed-off-by: Ettore Chimenti <ettore.chimenti@linaro.org>
---
 arch/arm/boot/dts/ti/omap/dm816x.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/ti/omap/dm816x.dtsi b/arch/arm/boot/dts/ti/omap/dm816x.dtsi
index ee0090f7aa64..de4d48babf77 100644
--- a/arch/arm/boot/dts/ti/omap/dm816x.dtsi
+++ b/arch/arm/boot/dts/ti/omap/dm816x.dtsi
@@ -3,7 +3,7 @@
 #include <dt-bindings/bus/ti-sysc.h>
 #include <dt-bindings/clock/dm816.h>
 #include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/omap.h>
+#include <dt-bindings/pinctrl/dm816x.h>
 
 / {
 	compatible = "ti,dm816";

-- 
2.56.0

Re: [PATCH 03/10] ARM: dts: omap: dm816x: use dedicated SoC pinctrl

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] pinctrl: dm816x API provides broken PIN_INPUT/PIN_OUTPUT macros and omits DT fixes
--

commit 8bc3ab0228d1fbf7757bd0740351d9face4c0e7c
Author: Ettore Chimenti <ettore.chimenti@linaro.org>

ARM: dts: omap: dm816x: use dedicated SoC pinctrl

In the TI Sitara DM816x SoCs, the pinctrl configuration macros are not
identical to OMAP2/3. They are actually inverted between Pullup/down
enabled and disabled (third bit in pinctrl registers). Using dedicated
DM816x pinctrl header to differentiate between the SoC families.

> diff --git a/arch/arm/boot/dts/ti/omap/dm816x.dtsi b/arch/arm/boot/dts/ti/omap/dm816x.dtsi
> index ee0090f7aa64e..de4d48babf778 100644
> --- a/arch/arm/boot/dts/ti/omap/dm816x.dtsi
> +++ b/arch/arm/boot/dts/ti/omap/dm816x.dtsi
> @@ -3,7 +3,7 @@
>  #include <dt-bindings/bus/ti-sysc.h>
>  #include <dt-bindings/clock/dm816.h>
>  #include <dt-bindings/gpio/gpio.h>
> -#include <dt-bindings/pinctrl/omap.h>
> +#include <dt-bindings/pinctrl/dm816x.h>

[Severity: Medium]
Since dm816x.h inherits macros from omap.h, will using PIN_INPUT or
PIN_OUTPUT unintentionally enable an active pull-down on DM816x?

include/dt-bindings/pinctrl/omap.h defines:
#define PIN_INPUT        INPUT_EN
#define PIN_OUTPUT       0

Because neither includes bit 3 (so it remains 0), and DM816x has inverted
logic where bit 3=0 enables the pull resistor, these macros now actively turn
on pull-downs. Should dm816x.h #undef and redefine PIN_INPUT and PIN_OUTPUT
to include PULL_DIS?

Similarly, does this inclusion leak inapplicable off-mode macros like
PIN_OFF_OUTPUT_HIGH into the DM816x namespace, where they might write garbage
to inapplicable padconf bits if used?

Additionally, while this commit changes the header to allow fixing the pull
logic, does this leave pins in arch/arm/boot/dts/ti/omap/dm8168-evm.dts with
unintended pull-downs?

For example, SPI_SCLK is defined without a pull flag:

arch/arm/boot/dts/ti/omap/dm8168-evm.dts:mcspi1_pins() {
    ...
    DM816X_IOPAD(0x0a94, MUX_MODE0)    /* SPI_SCLK */
    ...
}

Under the old OMAP rules, omitting PULL_ENA disabled the pull. But with the
new DM816x rules, omitting PULL_DIS leaves bit 3=0, which enables the pull.

While follow-up patches in the series fix the SD card pins, do other pins
like SPI_SCLK and SPI_SCS0 need to be updated to explicitly include PULL_DIS?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261016-patch-ektor5-dm8168-dts-v1-0-b4ce30217028@linaro.org?part=3

[PATCH 04/10] ARM: dts: omap: dm816x: Fix pinctrl range

[Ettore Chimenti]

From: Andrew Goodbody <andrew.goodbody@linaro.org>

The range of addresses accessed for the pinctrl module needs to be
extended to take account of the fixing of the size of the pinctrl
register to be 32 bits instead of 16 bits. So in order to allow the
final pin control register the address range must end on a 32 bit
boundary, not a 16 bit one.

Fixes: 86800ffe84055 ("ARM: dts: omap: dm816x: Correct pinctrl register")

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Christopher Obbard <christopher.obbard@linaro.org>
Tested-by: Christopher Obbard <christopher.obbard@linaro.org>
Signed-off-by: Ettore Chimenti <ettore.chimenti@linaro.org>
---
 arch/arm/boot/dts/ti/omap/dm816x.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/ti/omap/dm816x.dtsi b/arch/arm/boot/dts/ti/omap/dm816x.dtsi
index de4d48babf77..9c9d5e296e90 100644
--- a/arch/arm/boot/dts/ti/omap/dm816x.dtsi
+++ b/arch/arm/boot/dts/ti/omap/dm816x.dtsi
@@ -90,7 +90,7 @@ scrm: scrm@48140000 {
 
 			dm816x_pinmux: pinmux@800 {
 				compatible = "pinctrl-single";
-				reg = <0x800 0x50a>;
+				reg = <0x800 0x50c>;
 				#address-cells = <1>;
 				#size-cells = <0>;
 				#pinctrl-cells = <1>;

-- 
2.56.0

[PATCH 05/10] ARM: dts: omap: dm816x: refactor and align MMC node

[Ettore Chimenti]

From: Andrew Goodbody <andrew.goodbody@linaro.org>

Update the MMC node in the TI Sitara DM816x device tree to align with
the structure used in other similar SoCs. The changes include
refactoring the node to better describe the target module and its
sub-nodes.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Signed-off-by: Ettore Chimenti <ettore.chimenti@linaro.org>
---
 arch/arm/boot/dts/ti/omap/dm816x.dtsi | 33 +++++++++++++++++++++++++++------
 1 file changed, 27 insertions(+), 6 deletions(-)

diff --git a/arch/arm/boot/dts/ti/omap/dm816x.dtsi b/arch/arm/boot/dts/ti/omap/dm816x.dtsi
index 9c9d5e296e90..7f3ef3a00ab8 100644
--- a/arch/arm/boot/dts/ti/omap/dm816x.dtsi
+++ b/arch/arm/boot/dts/ti/omap/dm816x.dtsi
@@ -423,13 +423,34 @@ &edma 20 0 &edma 21 0
 				    "tx2", "rx2", "tx3", "rx3";
 		};
 
-		mmc1: mmc@48060000 {
-			compatible = "ti,omap4-hsmmc";
-			reg = <0x48060000 0x11000>;
+		mmc1_target: target-module@48060000 {
+			compatible = "ti,sysc-omap2", "ti,sysc";
 			ti,hwmods = "mmc1";
-			interrupts = <64>;
-			dmas = <&edma 24 0 &edma 25 0>;
-			dma-names = "tx", "rx";
+			reg = <0x48060000 0x4>,
+			      <0x48060110 0x4>,
+			      <0x48060114 0x4>;
+			reg-names = "rev", "sysc", "syss";
+			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
+					 SYSC_OMAP2_ENAWAKEUP |
+					 SYSC_OMAP2_SOFTRESET |
+					 SYSC_OMAP2_AUTOIDLE)>;
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+					<SYSC_IDLE_NO>,
+					<SYSC_IDLE_SMART>;
+			ti,syss-mask = <1>;
+			clocks = <&alwon_clkctrl DM816_MMC1_CLKCTRL 0>;
+			clock-names = "fck";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0x0 0x48060000 0x11000>;
+
+			mmc1: mmc@0 {
+				compatible = "ti,omap4-hsmmc";
+				reg = <0x0 0x11000>;
+				interrupts = <64>;
+				dmas = <&edma 24 0 &edma 25 0>;
+				dma-names = "tx", "rx";
+			};
 		};
 
 		timer1_target: target-module@4802e000 {

-- 
2.56.0

[PATCH 06/10] ARM: dts: omap: dm816x: Update USB node

[Ettore Chimenti]

From: Andrew Goodbody <andrew.goodbody@linaro.org>

USB node was not working correctly with DMA enabled as the supporting
code had been updated without updating this SoC's device tree. Bring the
device tree more up to date so that it works with DMA enabled.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Signed-off-by: Ettore Chimenti <ettore.chimenti@linaro.org>
---
 arch/arm/boot/dts/ti/omap/dm816x.dtsi | 41 +++++++++++++++++++++--------------
 1 file changed, 25 insertions(+), 16 deletions(-)

diff --git a/arch/arm/boot/dts/ti/omap/dm816x.dtsi b/arch/arm/boot/dts/ti/omap/dm816x.dtsi
index 7f3ef3a00ab8..5be9efc60785 100644
--- a/arch/arm/boot/dts/ti/omap/dm816x.dtsi
+++ b/arch/arm/boot/dts/ti/omap/dm816x.dtsi
@@ -574,18 +574,27 @@ uart3: serial@48024000 {
 		};
 
 		/* NOTE: USB needs a transceiver driver for phys to work */
-		usb: usb_otg_hs@47401000 {
-			compatible = "ti,am33xx-usb";
-			reg = <0x47401000 0x400000>;
-			ranges;
+		usb: target-module@47400000 {
+			compatible = "ti,sysc-omap4", "ti,sysc";
+			ti,hwmods = "usb_otg_hs";
+			reg = <0x47400000 0x4>,
+			      <0x47400010 0x4>;
+			reg-names = "rev", "sysc";
+			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
+			ti,sysc-midle = <SYSC_IDLE_FORCE>,
+					<SYSC_IDLE_SMART>;
+			ti,sysc-sidle = <SYSC_IDLE_SMART>;
+			ti,sysc-delay-us = <2>;
+			clocks = <&default_clkctrl DM816_USB_OTG_HS_CLKCTRL 0>;
+			clock-names = "fck";
 			#address-cells = <1>;
 			#size-cells = <1>;
-			ti,hwmods = "usb_otg_hs";
+			ranges = <0x0 0x47400000 0x8000>;
 
-			usb0: usb@47401000 {
+			usb0: usb@1000 {
 				compatible = "ti,musb-dm816";
-				reg = <0x47401400 0x400
-				       0x47401000 0x200>;
+				reg = <0x1400 0x400>,
+				      <0x1000 0x200>;
 				reg-names = "mc", "control";
 				interrupts = <18>;
 				interrupt-names = "mc";
@@ -622,10 +631,10 @@ &cppi41dma 11 1 &cppi41dma 12 1
 					"tx14", "tx15";
 			};
 
-			usb1: usb@47401800 {
+			usb1: usb@1800 {
 				compatible = "ti,musb-dm816";
-				reg = <0x47401c00 0x400
-				       0x47401800 0x200>;
+				reg = <0x1c00 0x400>,
+				      <0x1800 0x200>;
 				reg-names = "mc", "control";
 				interrupts = <19>;
 				interrupt-names = "mc";
@@ -662,12 +671,12 @@ &cppi41dma 26 1 &cppi41dma 27 1
 					"tx14", "tx15";
 			};
 
-			cppi41dma: dma-controller@47402000 {
+			cppi41dma: dma-controller@2000 {
 				compatible = "ti,am3359-cppi41";
-				reg = <0x47400000 0x1000>,
-				      <0x47402000 0x1000>,
-				      <0x47403000 0x1000>,
-				      <0x47404000 0x4000>;
+				reg =  <0x0000 0x1000>,
+				       <0x2000 0x1000>,
+				       <0x3000 0x1000>,
+				       <0x4000 0x4000>;
 				reg-names = "glue", "controller", "scheduler", "queuemgr";
 				interrupts = <17>;
 				interrupt-names = "glue";

-- 
2.56.0

Re: [PATCH 06/10] ARM: dts: omap: dm816x: Update USB node

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] dts: unit-address does not match the first address in the reg property
--

commit dbd2586a39796c2f0baed5e3349e527c7000f5a0
Author: Andrew Goodbody <andrew.goodbody@linaro.org>

ARM: dts: omap: dm816x: Update USB node

USB node was not working correctly with DMA enabled as the supporting
code had been updated without updating this SoC's device tree. Bring the
device tree more up to date so that it works with DMA enabled.

> diff --git a/arch/arm/boot/dts/ti/omap/dm816x.dtsi b/arch/arm/boot/dts/ti/omap/dm816x.dtsi
> index 7f3ef3a00ab86..5be9efc607855 100644
> --- a/arch/arm/boot/dts/ti/omap/dm816x.dtsi
> +++ b/arch/arm/boot/dts/ti/omap/dm816x.dtsi
[ ... ]
> @@ -574,18 +574,27 @@ uart3: serial@48024000 {
[ ... ]
> -			usb0: usb@47401000 {
> +			usb0: usb@1000 {
>  				compatible = "ti,musb-dm816";
> -				reg = <0x47401400 0x400
> -				       0x47401000 0x200>;
> +				reg = <0x1400 0x400>,
> +				      <0x1000 0x200>;

[Severity: Low]
Should the unit address match the first address in the reg property? The unit
address is @1000 but the first reg starts at 0x1400. Should this be usb@1400?

[ ... ]
> @@ -622,10 +631,10 @@ &cppi41dma 11 1 &cppi41dma 12 1
>  					"tx14", "tx15";
>  			};
>  
> -			usb1: usb@47401800 {
> +			usb1: usb@1800 {
>  				compatible = "ti,musb-dm816";
> -				reg = <0x47401c00 0x400
> -				       0x47401800 0x200>;
> +				reg = <0x1c00 0x400>,
> +				      <0x1800 0x200>;

[Severity: Low]
Does this node have a similar mismatch? The unit address is @1800 but the
first reg starts at 0x1c00. Should it be usb@1c00?

[ ... ]
> @@ -662,12 +671,12 @@ &cppi41dma 26 1 &cppi41dma 27 1
>  					"tx14", "tx15";
>  			};
>  
> -			cppi41dma: dma-controller@47402000 {
> +			cppi41dma: dma-controller@2000 {
>  				compatible = "ti,am3359-cppi41";
> -				reg = <0x47400000 0x1000>,
> -				      <0x47402000 0x1000>,
> -				      <0x47403000 0x1000>,
> -				      <0x47404000 0x4000>;
> +				reg =  <0x0000 0x1000>,
> +				       <0x2000 0x1000>,
> +				       <0x3000 0x1000>,
> +				       <0x4000 0x4000>;

[Severity: Low]
Is it expected for the unit address to be @2000 when the first reg starts at
0x0000? Should this be dma-controller@0?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261016-patch-ektor5-dm8168-dts-v1-0-b4ce30217028@linaro.org?part=6

[PATCH 07/10] ARM: omap: dm816x: Match up capability flags for USB

[Ettore Chimenti]

From: Andrew Goodbody <andrew.goodbody@linaro.org>

Fix a warning about flags and idle modes not being as expected
for the USB driver. Updating the capability flags for the USB controller
after updating the USB devicetree node.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Signed-off-by: Ettore Chimenti <ettore.chimenti@linaro.org>
---
 arch/arm/mach-omap2/omap_hwmod_81xx_data.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
index 2f55dc32e150..d2c20719c100 100644
--- a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
@@ -616,7 +616,7 @@ static struct omap_hwmod_class_sysconfig dm81xx_usbhsotg_sysc = {
 	.sysc_offs	= 0x10,
 	.srst_udelay	= 2,
 	.sysc_flags	= SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE |
-				SYSC_HAS_SOFTRESET,
+				SYSC_HAS_SOFTRESET | SYSC_HAS_RESET_STATUS,
 	.idlemodes	= SIDLE_SMART | MSTANDBY_FORCE | MSTANDBY_SMART,
 	.sysc_fields	= &omap_hwmod_sysc_type2,
 };

-- 
2.56.0

[PATCH 08/10] ARM: dts: omap: dm816x: Correct speed for sysclk5

[Ettore Chimenti]

From: Andrew Goodbody <andrew.goodbody@linaro.org>

The default code for setting up the clocks results in sysclk5 running at
1.6GHz whereas it is expected to run at half that ie 813MHz. Force the
divider to be /2 to achieve the 813MHz speed.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Signed-off-by: Ettore Chimenti <ettore.chimenti@linaro.org>
---
 arch/arm/boot/dts/ti/omap/dm816x-clocks.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/ti/omap/dm816x-clocks.dtsi b/arch/arm/boot/dts/ti/omap/dm816x-clocks.dtsi
index 76ebc6c3c3e5..cb990773b098 100644
--- a/arch/arm/boot/dts/ti/omap/dm816x-clocks.dtsi
+++ b/arch/arm/boot/dts/ti/omap/dm816x-clocks.dtsi
@@ -144,7 +144,7 @@ sysclk5_ck: sysclk5_ck@310 {
 		#clock-cells = <0>;
 		compatible = "ti,divider-clock";
 		clocks = <&sysclk4_ck>;
-		ti,max-div = <1>;
+		ti,dividers = <2>;
 		reg = <0x0310>;
 	};
 

-- 
2.56.0

Re: [PATCH 08/10] ARM: dts: omap: dm816x: Correct speed for sysclk5

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] clk: ti: divider mask resolves to 0 preventing hardware update
--

commit 010a738d1ba1df99c68c1c1fed6854e92365aa42
Author: Andrew Goodbody <andrew.goodbody@linaro.org>

ARM: dts: omap: dm816x: Correct speed for sysclk5

The commit forces sysclk5 to run at 813MHz by changing its divider
configuration from a maximum divider of 1 to a divider of 2.

> diff --git a/arch/arm/boot/dts/ti/omap/dm816x-clocks.dtsi b/arch/arm/boot/dts/ti/omap/dm816x-clocks.dtsi
> index 76ebc6c3c3e5e..cb990773b0985 100644
> --- a/arch/arm/boot/dts/ti/omap/dm816x-clocks.dtsi
> +++ b/arch/arm/boot/dts/ti/omap/dm816x-clocks.dtsi
> @@ -144,7 +144,7 @@ sysclk5_ck: sysclk5_ck@310 {
>  		#clock-cells = <0>;
>  		compatible = "ti,divider-clock";
>  		clocks = <&sysclk4_ck>;
> -		ti,max-div = <1>;
> +		ti,dividers = <2>;

[Severity: High]
Does this actually change the clock rate in the hardware register?

By providing a single-element array ti,dividers = <2>;, the divider value 2
maps to the array index 0.

In drivers/clk/ti/divider.c:ti_clk_get_div_table():

	table[valid_div].div = val;
	table[valid_div].val = i;

Since there is only one element, the maximum valid index (and maximum register
value) is capped at 0.

When the mask is calculated in drivers/clk/ti/divider.c:_setup_mask():

	divider->mask = (1 << fls(mask)) - 1;

A maximum register value of 0 results in the mask evaluating to 0.

Consequently, any attempt to update the rate in ti_clk_divider_set_rate()
becomes a no-op:

	val &= ~(divider->mask << divider->shift);
	val |= value << divider->shift;

With a mask of 0, the physical hardware register is not modified, leaving the
clock running at 1.6GHz while the software incorrectly believes it has been
set to 813MHz.

>  		reg = <0x0310>;
>  	};

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261016-patch-ektor5-dm8168-dts-v1-0-b4ce30217028@linaro.org?part=8

[PATCH 09/10] ARM: dts: omap: dm8168-evm: Correct SD card pinmux

[Ettore Chimenti]

From: Andrew Goodbody <andrew.goodbody@linaro.org>

The SD card lines use external pullups and so the internal pullups need
to be disabled so that they do not cause contention on the lines.
This bug was revealed by correcting the effective bit mask of
the pinctrl device. Use the correct macro for DM8168.

Also fix typo in comment SD_DAT2->SD_DAT3.

Fixes: 86800ffe84055 ("ARM: dts: omap: dm816x: Correct pinctrl register")

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Christopher Obbard <christopher.obbard@linaro.org>
Tested-by: Christopher Obbard <christopher.obbard@linaro.org>
[ettore.chimenti@linaro.org: squashed after fixing DM816x macros ]
Signed-off-by: Ettore Chimenti <ettore.chimenti@linaro.org>
---
 arch/arm/boot/dts/ti/omap/dm8168-evm.dts | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/arch/arm/boot/dts/ti/omap/dm8168-evm.dts b/arch/arm/boot/dts/ti/omap/dm8168-evm.dts
index 81450e15b889..a6d42766a496 100644
--- a/arch/arm/boot/dts/ti/omap/dm8168-evm.dts
+++ b/arch/arm/boot/dts/ti/omap/dm8168-evm.dts
@@ -45,13 +45,13 @@ DM816X_IOPAD(0x0aac, MUX_MODE0)			/* SPI_D1 */
 
 	mmc_pins: mmc-pins {
 		pinctrl-single,pins = <
-			DM816X_IOPAD(0x0a70, MUX_MODE0)			/* SD_POW */
-			DM816X_IOPAD(0x0a74, MUX_MODE0)			/* SD_CLK */
-			DM816X_IOPAD(0x0a78, MUX_MODE0)			/* SD_CMD */
-			DM816X_IOPAD(0x0a7C, MUX_MODE0)			/* SD_DAT0 */
-			DM816X_IOPAD(0x0a80, MUX_MODE0)			/* SD_DAT1 */
-			DM816X_IOPAD(0x0a84, MUX_MODE0)			/* SD_DAT2 */
-			DM816X_IOPAD(0x0a88, MUX_MODE0)			/* SD_DAT2 */
+			DM816X_IOPAD(0x0a70, PULL_DIS | MUX_MODE0)	/* SD_POW */
+			DM816X_IOPAD(0x0a74, PULL_DIS | MUX_MODE0)	/* SD_CLK */
+			DM816X_IOPAD(0x0a78, PULL_DIS | MUX_MODE0)	/* SD_CMD */
+			DM816X_IOPAD(0x0a7C, PULL_DIS | MUX_MODE0)	/* SD_DAT0 */
+			DM816X_IOPAD(0x0a80, PULL_DIS | MUX_MODE0)	/* SD_DAT1 */
+			DM816X_IOPAD(0x0a84, PULL_DIS | MUX_MODE0)	/* SD_DAT2 */
+			DM816X_IOPAD(0x0a88, PULL_DIS | MUX_MODE0)	/* SD_DAT3 */
 			DM816X_IOPAD(0x0a8c, MUX_MODE2)			/* GP1[7] */
 			DM816X_IOPAD(0x0a90, MUX_MODE2)			/* GP1[8] */
 		>;

-- 
2.56.0

[PATCH 10/10] ARM: dts: omap: dm8168-evm: enable MUSB multipoint support

[Ettore Chimenti]

From: Christopher Obbard <christopher.obbard@linaro.org>

The DM8168 USB controllers are used in host mode and must advertise
multipoint support to the MUSB core. Without this the kernel disables
external hub support and warns:

    musb-hdrc: kernel must disable external hubs, please fix the
	configuration

On the affected board this also prevents devices from enumerating
reliably, with descriptor reads failing with -EPROTO:

    usb 1-1: device descriptor read/all, error -71

Set mentor,multipoint to the default value of 1 for both MUSB instances.
With this enabled, USB devices enumerate successfully on the host ports.

Signed-off-by: Christopher Obbard <christopher.obbard@linaro.org>
Signed-off-by: Ettore Chimenti <ettore.chimenti@linaro.org>
---
 arch/arm/boot/dts/ti/omap/dm8168-evm.dts | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/arch/arm/boot/dts/ti/omap/dm8168-evm.dts b/arch/arm/boot/dts/ti/omap/dm8168-evm.dts
index a6d42766a496..4b4e4d850231 100644
--- a/arch/arm/boot/dts/ti/omap/dm8168-evm.dts
+++ b/arch/arm/boot/dts/ti/omap/dm8168-evm.dts
@@ -198,17 +198,14 @@ &mmc1 {
 	wp-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
 };
 
-/* At least dm8168-evm rev c won't support multipoint, later may */
 &usb0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&usb0_pins>;
-	mentor,multipoint = <0>;
 };
 
 &usb1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&usb1_pins>;
-	mentor,multipoint = <0>;
 };
 
 &sata {

-- 
2.56.0