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From: Yazen Ghannam <yazen.ghannam@amd.com>
To: <x86@kernel.org>, Tony Luck <tony.luck@intel.com>
Cc: <linux-kernel@vger.kernel.org>, <linux-edac@vger.kernel.org>,
	<Smita.KoralahalliChannabasappa@amd.com>,
	Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Subject: [PATCH v3 09/17] x86/mce: Do 'UNKNOWN' vendor check early
Date: Tue, 15 Apr 2025 14:55:04 +0000	[thread overview]
Message-ID: <20250415-wip-mca-updates-v3-9-8ffd9eb4aa56@amd.com> (raw)
In-Reply-To: <20250415-wip-mca-updates-v3-0-8ffd9eb4aa56@amd.com>

The 'UNKNOWN' vendor check is handled as a quirk that is run on each
online CPU. However, all CPUs are expected to have the same vendor.

Move the 'UNKNOWN' vendor check to the BSP-only init so it is done early
and once. Remove the unnecessary return value from the quirks check.

Reviewed-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Tested-by: Tony Luck <tony.luck@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---

Notes:
    Link:
    https://lore.kernel.org/r/20250213-wip-mca-updates-v2-9-3636547fe05f@amd.com
    
    v2->v3:
    * Add tags from Qiuxu and Tony.
    
    v1->v2:
    * New in v2.

 arch/x86/kernel/cpu/mce/core.c | 18 ++++++++----------
 1 file changed, 8 insertions(+), 10 deletions(-)

diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
index 444d006366fd..9dc9d672a7d1 100644
--- a/arch/x86/kernel/cpu/mce/core.c
+++ b/arch/x86/kernel/cpu/mce/core.c
@@ -1974,14 +1974,11 @@ static void apply_quirks_zhaoxin(struct cpuinfo_x86 *c)
 }
 
 /* Add per CPU specific workarounds here */
-static bool __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)
+static void __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)
 {
 	struct mca_config *cfg = &mca_cfg;
 
 	switch (c->x86_vendor) {
-	case X86_VENDOR_UNKNOWN:
-		pr_info("unknown CPU type - not enabling MCE support\n");
-		return false;
 	case X86_VENDOR_AMD:
 		apply_quirks_amd(c);
 		break;
@@ -1997,8 +1994,6 @@ static bool __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)
 		cfg->monarch_timeout = 0;
 	if (cfg->bootlog != 0)
 		cfg->panic_timeout = 30;
-
-	return true;
 }
 
 static bool __mcheck_cpu_ancient_init(struct cpuinfo_x86 *c)
@@ -2239,6 +2234,12 @@ void cpu_mca_init(struct cpuinfo_x86 *c)
 	if (!mce_available(c))
 		return;
 
+	if (c->x86_vendor == X86_VENDOR_UNKNOWN) {
+		mca_cfg.disabled = 1;
+		pr_info("unknown CPU type - not enabling MCE support\n");
+		return;
+	}
+
 	mce_flags.overflow_recov = cpu_feature_enabled(X86_FEATURE_OVERFLOW_RECOV);
 	mce_flags.succor	 = cpu_feature_enabled(X86_FEATURE_SUCCOR);
 	mce_flags.smca		 = cpu_feature_enabled(X86_FEATURE_SMCA);
@@ -2273,10 +2274,7 @@ void mcheck_cpu_init(struct cpuinfo_x86 *c)
 
 	__mcheck_cpu_cap_init();
 
-	if (!__mcheck_cpu_apply_quirks(c)) {
-		mca_cfg.disabled = 1;
-		return;
-	}
+	__mcheck_cpu_apply_quirks(c);
 
 	if (!mce_gen_pool_init()) {
 		mca_cfg.disabled = 1;

-- 
2.49.0


  parent reply	other threads:[~2025-04-15 14:55 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-15 14:54 [PATCH v3 00/17] AMD MCA interrupts rework Yazen Ghannam
2025-04-15 14:54 ` [PATCH v3 01/17] x86/mce: Don't remove sysfs if thresholding sysfs init fails Yazen Ghannam
2025-04-15 14:54 ` [PATCH v3 02/17] x86/mce/amd: Remove return value for mce_threshold_{create,remove}_device() Yazen Ghannam
2025-04-15 14:54 ` [PATCH v3 03/17] x86/mce/amd: Remove smca_banks_map Yazen Ghannam
2025-04-15 14:54 ` [PATCH v3 04/17] x86/mce/amd: Put list_head in threshold_bank Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 05/17] x86/mce: Cleanup bank processing on init Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 06/17] x86/mce: Remove __mcheck_cpu_init_early() Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 07/17] x86/mce: Define BSP-only init Yazen Ghannam
2025-04-17  2:18   ` Borislav Petkov
2025-05-01 17:07     ` Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 08/17] x86/mce: Define BSP-only SMCA init Yazen Ghannam
2025-04-17  9:52   ` Borislav Petkov
2025-05-01 17:12     ` Yazen Ghannam
2025-04-15 14:55 ` Yazen Ghannam [this message]
2025-04-15 14:55 ` [PATCH v3 10/17] x86/mce: Separate global and per-CPU quirks Yazen Ghannam
2025-04-17 12:16   ` Borislav Petkov
2025-05-01 17:23     ` Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 11/17] x86/mce: Move machine_check_poll() status checks to helper functions Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 12/17] x86/mce: Unify AMD THR handler with MCA Polling Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 13/17] x86/mce: Unify AMD DFR " Yazen Ghannam
2025-05-07  9:20   ` Borislav Petkov
2025-05-08 15:37     ` Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 14/17] x86/mce/amd: Enable interrupt vectors once per-CPU on SMCA systems Yazen Ghannam
2025-05-07 19:35   ` Borislav Petkov
2025-05-08 15:53     ` Yazen Ghannam
2025-05-09 14:08       ` Borislav Petkov
2025-05-12 15:34         ` Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 15/17] x86/mce/amd: Support SMCA Corrected Error Interrupt Yazen Ghannam
2025-05-09 19:37   ` Borislav Petkov
2025-05-12 15:35     ` Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 16/17] x86/mce: Handle AMD threshold interrupt storms Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 17/17] x86/mce: Restore poll settings after storm subsides Yazen Ghannam
2025-05-12  7:46   ` Borislav Petkov
2025-05-12 15:43     ` Yazen Ghannam
2025-05-12 15:53       ` Luck, Tony
2025-05-13 17:44         ` Yazen Ghannam
2025-05-13 17:55       ` Borislav Petkov
2025-05-13 21:06         ` Yazen Ghannam
2025-05-13 22:07           ` Luck, Tony
2025-05-14 14:34             ` Yazen Ghannam
2025-05-15 12:37               ` Borislav Petkov
2025-05-15 15:47                 ` Yazen Ghannam

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