From: Yazen Ghannam <yazen.ghannam@amd.com>
To: Borislav Petkov <bp@alien8.de>
Cc: x86@kernel.org, Tony Luck <tony.luck@intel.com>,
linux-kernel@vger.kernel.org, linux-edac@vger.kernel.org,
Smita.KoralahalliChannabasappa@amd.com,
Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Subject: Re: [PATCH v3 13/17] x86/mce: Unify AMD DFR handler with MCA Polling
Date: Thu, 8 May 2025 11:37:34 -0400 [thread overview]
Message-ID: <20250508153734.GA1939543@yaz-khff2.amd.com> (raw)
In-Reply-To: <20250507092042.GLaBsl6pczL50Qdr3e@fat_crate.local>
On Wed, May 07, 2025 at 11:20:42AM +0200, Borislav Petkov wrote:
> On Tue, Apr 15, 2025 at 02:55:08PM +0000, Yazen Ghannam wrote:
> > +static bool smca_should_log_poll_error(enum mcp_flags flags, struct mce_hw_err *err)
> > +{
> > + struct mce *m = &err->m;
> > +
> > + /*
> > + * If this is a deferred error found in MCA_STATUS, then clear
> > + * the redundant data from the MCA_DESTAT register.
> > + */
> > + if (m->status & MCI_STATUS_VAL) {
> > + if (m->status & MCI_STATUS_DEFERRED)
> > + mce_wrmsrq(MSR_AMD64_SMCA_MCx_DESTAT(m->bank), 0);
> > +
> > + return true;
> > + }
> > +
> > + /*
> > + * If the MCA_DESTAT register has valid data, then use
> > + * it as the status register.
> > + */
> > + m->status = mce_rdmsrq(MSR_AMD64_SMCA_MCx_DESTAT(m->bank));
> > +
>
> Superfluous newline.
>
Ack.
> > + if (!(m->status & MCI_STATUS_VAL))
> > + return false;
> > +
> > + /*
> > + * Gather all relevant data now and log the record before clearing
> > + * the deferred status register. This avoids needing to go back to
> > + * the polling function for these actions.
> > + */
> > + mce_read_aux(err, m->bank);
> > +
> > + if (m->status & MCI_STATUS_ADDRV)
> > + m->addr = mce_rdmsrq(MSR_AMD64_SMCA_MCx_DEADDR(m->bank));
> > +
> > + smca_extract_err_addr(m);
> > + m->severity = mce_severity(m, NULL, NULL, false);
> > +
> > + if (flags & MCP_QUEUE_LOG)
> > + mce_gen_pool_add(err);
> > + else
> > + mce_log(err);
>
> Except you have a function which is called "should log" which also does the
> logging.
>
> And you have that same logging being done in machine_check_poll().
>
> This code needs more designing.
>
Okay, will do.
Thanks,
Yazen
next prev parent reply other threads:[~2025-05-08 15:37 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-15 14:54 [PATCH v3 00/17] AMD MCA interrupts rework Yazen Ghannam
2025-04-15 14:54 ` [PATCH v3 01/17] x86/mce: Don't remove sysfs if thresholding sysfs init fails Yazen Ghannam
2025-04-15 14:54 ` [PATCH v3 02/17] x86/mce/amd: Remove return value for mce_threshold_{create,remove}_device() Yazen Ghannam
2025-04-15 14:54 ` [PATCH v3 03/17] x86/mce/amd: Remove smca_banks_map Yazen Ghannam
2025-04-15 14:54 ` [PATCH v3 04/17] x86/mce/amd: Put list_head in threshold_bank Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 05/17] x86/mce: Cleanup bank processing on init Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 06/17] x86/mce: Remove __mcheck_cpu_init_early() Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 07/17] x86/mce: Define BSP-only init Yazen Ghannam
2025-04-17 2:18 ` Borislav Petkov
2025-05-01 17:07 ` Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 08/17] x86/mce: Define BSP-only SMCA init Yazen Ghannam
2025-04-17 9:52 ` Borislav Petkov
2025-05-01 17:12 ` Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 09/17] x86/mce: Do 'UNKNOWN' vendor check early Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 10/17] x86/mce: Separate global and per-CPU quirks Yazen Ghannam
2025-04-17 12:16 ` Borislav Petkov
2025-05-01 17:23 ` Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 11/17] x86/mce: Move machine_check_poll() status checks to helper functions Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 12/17] x86/mce: Unify AMD THR handler with MCA Polling Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 13/17] x86/mce: Unify AMD DFR " Yazen Ghannam
2025-05-07 9:20 ` Borislav Petkov
2025-05-08 15:37 ` Yazen Ghannam [this message]
2025-04-15 14:55 ` [PATCH v3 14/17] x86/mce/amd: Enable interrupt vectors once per-CPU on SMCA systems Yazen Ghannam
2025-05-07 19:35 ` Borislav Petkov
2025-05-08 15:53 ` Yazen Ghannam
2025-05-09 14:08 ` Borislav Petkov
2025-05-12 15:34 ` Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 15/17] x86/mce/amd: Support SMCA Corrected Error Interrupt Yazen Ghannam
2025-05-09 19:37 ` Borislav Petkov
2025-05-12 15:35 ` Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 16/17] x86/mce: Handle AMD threshold interrupt storms Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 17/17] x86/mce: Restore poll settings after storm subsides Yazen Ghannam
2025-05-12 7:46 ` Borislav Petkov
2025-05-12 15:43 ` Yazen Ghannam
2025-05-12 15:53 ` Luck, Tony
2025-05-13 17:44 ` Yazen Ghannam
2025-05-13 17:55 ` Borislav Petkov
2025-05-13 21:06 ` Yazen Ghannam
2025-05-13 22:07 ` Luck, Tony
2025-05-14 14:34 ` Yazen Ghannam
2025-05-15 12:37 ` Borislav Petkov
2025-05-15 15:47 ` Yazen Ghannam
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