From: Yazen Ghannam <yazen.ghannam@amd.com>
To: "Luck, Tony" <tony.luck@intel.com>
Cc: Borislav Petkov <bp@alien8.de>,
x86@kernel.org, linux-kernel@vger.kernel.org,
linux-edac@vger.kernel.org,
Smita.KoralahalliChannabasappa@amd.com,
Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Subject: Re: [PATCH v3 17/17] x86/mce: Restore poll settings after storm subsides
Date: Tue, 13 May 2025 13:44:22 -0400 [thread overview]
Message-ID: <20250513174422.GB214682@yaz-khff2.amd.com> (raw)
In-Reply-To: <aCIZZIsee7roLlNZ@agluck-desk3>
On Mon, May 12, 2025 at 08:53:08AM -0700, Luck, Tony wrote:
> On Mon, May 12, 2025 at 11:43:15AM -0400, Yazen Ghannam wrote:
> > On Mon, May 12, 2025 at 09:46:16AM +0200, Borislav Petkov wrote:
> > > On Tue, Apr 15, 2025 at 02:55:12PM +0000, Yazen Ghannam wrote:
> > > > Users can disable MCA polling by setting the "ignore_ce" parameter or by
> > > > setting "check_interval=0". This tells the kernel to *not* start the MCE
> > > > timer on a CPU.
> > > >
> > > > During a CMCI storm, the MCE timer will be started with a fixed
> > > > interval.
>
> I think you just need some more words at the start of this second
> paragraph to avoid confusion when reading together with the previous
> one.
>
> Perhaps:
>
> If the user did not disable CMCI, then storms can occur. When these
> happen the MCE timer will be started ...
>
Yes, good point. I'll update the commit message.
Thanks,
Yazen
next prev parent reply other threads:[~2025-05-13 17:44 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-15 14:54 [PATCH v3 00/17] AMD MCA interrupts rework Yazen Ghannam
2025-04-15 14:54 ` [PATCH v3 01/17] x86/mce: Don't remove sysfs if thresholding sysfs init fails Yazen Ghannam
2025-04-15 14:54 ` [PATCH v3 02/17] x86/mce/amd: Remove return value for mce_threshold_{create,remove}_device() Yazen Ghannam
2025-04-15 14:54 ` [PATCH v3 03/17] x86/mce/amd: Remove smca_banks_map Yazen Ghannam
2025-04-15 14:54 ` [PATCH v3 04/17] x86/mce/amd: Put list_head in threshold_bank Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 05/17] x86/mce: Cleanup bank processing on init Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 06/17] x86/mce: Remove __mcheck_cpu_init_early() Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 07/17] x86/mce: Define BSP-only init Yazen Ghannam
2025-04-17 2:18 ` Borislav Petkov
2025-05-01 17:07 ` Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 08/17] x86/mce: Define BSP-only SMCA init Yazen Ghannam
2025-04-17 9:52 ` Borislav Petkov
2025-05-01 17:12 ` Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 09/17] x86/mce: Do 'UNKNOWN' vendor check early Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 10/17] x86/mce: Separate global and per-CPU quirks Yazen Ghannam
2025-04-17 12:16 ` Borislav Petkov
2025-05-01 17:23 ` Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 11/17] x86/mce: Move machine_check_poll() status checks to helper functions Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 12/17] x86/mce: Unify AMD THR handler with MCA Polling Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 13/17] x86/mce: Unify AMD DFR " Yazen Ghannam
2025-05-07 9:20 ` Borislav Petkov
2025-05-08 15:37 ` Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 14/17] x86/mce/amd: Enable interrupt vectors once per-CPU on SMCA systems Yazen Ghannam
2025-05-07 19:35 ` Borislav Petkov
2025-05-08 15:53 ` Yazen Ghannam
2025-05-09 14:08 ` Borislav Petkov
2025-05-12 15:34 ` Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 15/17] x86/mce/amd: Support SMCA Corrected Error Interrupt Yazen Ghannam
2025-05-09 19:37 ` Borislav Petkov
2025-05-12 15:35 ` Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 16/17] x86/mce: Handle AMD threshold interrupt storms Yazen Ghannam
2025-04-15 14:55 ` [PATCH v3 17/17] x86/mce: Restore poll settings after storm subsides Yazen Ghannam
2025-05-12 7:46 ` Borislav Petkov
2025-05-12 15:43 ` Yazen Ghannam
2025-05-12 15:53 ` Luck, Tony
2025-05-13 17:44 ` Yazen Ghannam [this message]
2025-05-13 17:55 ` Borislav Petkov
2025-05-13 21:06 ` Yazen Ghannam
2025-05-13 22:07 ` Luck, Tony
2025-05-14 14:34 ` Yazen Ghannam
2025-05-15 12:37 ` Borislav Petkov
2025-05-15 15:47 ` Yazen Ghannam
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