From: Vasant Hegde <vasant.hegde@amd.com>
To: <iommu@lists.linux.dev>, <joro@8bytes.org>
Cc: <suravee.suthikulpanit@amd.com>, <wei.huang2@amd.com>,
<jsnitsel@redhat.com>, <jgg@ziepe.ca>,
Vasant Hegde <vasant.hegde@amd.com>
Subject: [PATCH v2 05/16] iommu/amd/iommu_v2: Use protection_domain in struct device_state
Date: Fri, 28 Jul 2023 05:35:58 +0000 [thread overview]
Message-ID: <20230728053609.165183-6-vasant.hegde@amd.com> (raw)
In-Reply-To: <20230728053609.165183-1-vasant.hegde@amd.com>
Replace struct iommu_domain with struct protection_domain to simplify code
since the protection_domain contains AMD IOMMU specific information.
No functional changes intended.
Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
---
drivers/iommu/amd/iommu_v2.c | 38 ++++++++++++++++++++----------------
1 file changed, 21 insertions(+), 17 deletions(-)
diff --git a/drivers/iommu/amd/iommu_v2.c b/drivers/iommu/amd/iommu_v2.c
index c5825e0a6770..6a423928d5b5 100644
--- a/drivers/iommu/amd/iommu_v2.c
+++ b/drivers/iommu/amd/iommu_v2.c
@@ -55,7 +55,7 @@ struct device_state {
atomic_t count;
struct pci_dev *pdev;
struct pasid_state **states;
- struct iommu_domain *domain;
+ struct protection_domain *pdom;
int pasid_levels;
int max_pasids;
amd_iommu_invalid_ppr_cb inv_ppr_cb;
@@ -112,6 +112,7 @@ static struct device_state *get_device_state(u32 sbdf)
static void free_device_state(struct device_state *dev_state)
{
struct iommu_group *group;
+ struct iommu_domain *domain = &dev_state->pdom->domain;
/* Get rid of any remaining pasid states */
free_pasid_states(dev_state);
@@ -130,12 +131,12 @@ static void free_device_state(struct device_state *dev_state)
if (WARN_ON(!group))
return;
- iommu_detach_group(dev_state->domain, group);
+ iommu_detach_group(domain, group);
iommu_group_put(group);
/* Everything is down now, free the IOMMUv2 domain */
- iommu_domain_free(dev_state->domain);
+ iommu_domain_free(domain);
/* Finally get rid of the device-state */
kfree(dev_state);
@@ -269,9 +270,7 @@ static void put_pasid_state_wait(struct pasid_state *pasid_state)
static void unbind_pasid(struct pasid_state *pasid_state)
{
- struct iommu_domain *domain;
-
- domain = pasid_state->device_state->domain;
+ struct device_state *dev_state = pasid_state->device_state;
/*
* Mark pasid_state as invalid, no more faults will we added to the
@@ -283,7 +282,7 @@ static void unbind_pasid(struct pasid_state *pasid_state)
smp_wmb();
/* After this the device/pasid can't access the mm anymore */
- amd_iommu_domain_clear_gcr3(domain, pasid_state->pasid);
+ amd_iommu_domain_clear_gcr3(&dev_state->pdom->domain, pasid_state->pasid);
/* Make sure no more pending faults are in the queue */
flush_workqueue(iommu_wq);
@@ -369,10 +368,10 @@ static void mn_invalidate_range(struct mmu_notifier *mn,
dev_state = pasid_state->device_state;
if ((start ^ (end - 1)) < PAGE_SIZE)
- amd_iommu_flush_page(dev_state->domain, pasid_state->pasid,
+ amd_iommu_flush_page(&dev_state->pdom->domain, pasid_state->pasid,
start);
else
- amd_iommu_flush_tlb(dev_state->domain, pasid_state->pasid);
+ amd_iommu_flush_tlb(&dev_state->pdom->domain, pasid_state->pasid);
}
static void mn_release(struct mmu_notifier *mn, struct mm_struct *mm)
@@ -651,7 +650,7 @@ int amd_iommu_bind_pasid(struct pci_dev *pdev, u32 pasid,
if (ret)
goto out_unregister;
- ret = amd_iommu_domain_set_gcr3(dev_state->domain, pasid,
+ ret = amd_iommu_domain_set_gcr3(&dev_state->pdom->domain, pasid,
__pa(pasid_state->mm->pgd));
if (ret)
goto out_clear_state;
@@ -735,6 +734,7 @@ EXPORT_SYMBOL(amd_iommu_unbind_pasid);
int amd_iommu_init_device(struct pci_dev *pdev, int pasids)
{
+ struct iommu_domain *domain;
struct device_state *dev_state;
struct iommu_group *group;
unsigned long flags;
@@ -779,15 +779,19 @@ int amd_iommu_init_device(struct pci_dev *pdev, int pasids)
if (dev_state->states == NULL)
goto out_free_dev_state;
- dev_state->domain = iommu_domain_alloc(&pci_bus_type);
- if (dev_state->domain == NULL)
+ domain = iommu_domain_alloc(&pci_bus_type);
+ if (domain == NULL)
goto out_free_states;
+ /* Retrieve new protection_domain that has just been allocated */
+ dev_state->pdom = container_of(domain,
+ struct protection_domain, domain);
+
/* See iommu_is_default_domain() */
- dev_state->domain->type = IOMMU_DOMAIN_IDENTITY;
- amd_iommu_domain_direct_map(dev_state->domain);
+ domain->type = IOMMU_DOMAIN_IDENTITY;
+ amd_iommu_domain_direct_map(&dev_state->pdom->domain);
- ret = amd_iommu_domain_enable_v2(dev_state->domain, pasids);
+ ret = amd_iommu_domain_enable_v2(domain, pasids);
if (ret)
goto out_free_domain;
@@ -797,7 +801,7 @@ int amd_iommu_init_device(struct pci_dev *pdev, int pasids)
goto out_free_domain;
}
- ret = iommu_attach_group(dev_state->domain, group);
+ ret = iommu_attach_group(domain, group);
if (ret != 0)
goto out_drop_group;
@@ -821,7 +825,7 @@ int amd_iommu_init_device(struct pci_dev *pdev, int pasids)
iommu_group_put(group);
out_free_domain:
- iommu_domain_free(dev_state->domain);
+ iommu_domain_free(domain);
out_free_states:
free_page((unsigned long)dev_state->states);
--
2.31.1
next prev parent reply other threads:[~2023-07-28 5:38 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-28 5:35 [PATCH v2 00/16] iommu/amd: SVA Support (Part 1) - cleanup/refactoring Vasant Hegde
2023-07-28 5:35 ` [PATCH v2 01/16] iommu/amd: Remove unused amd_io_pgtable.pt_root variable Vasant Hegde
2023-07-28 13:17 ` Jason Gunthorpe
2023-07-28 5:35 ` [PATCH v2 02/16] iommu/amd: Consolidate timeout pre-define to amd_iommu_type.h Vasant Hegde
2023-07-28 13:48 ` Jason Gunthorpe
2023-07-28 5:35 ` [PATCH v2 03/16] iommu/amd: Consolidate logic to allocate protection domain Vasant Hegde
2023-07-28 13:49 ` Jason Gunthorpe
2023-07-28 5:35 ` [PATCH v2 04/16] iommu/amd: Refactor protection domain allocation code Vasant Hegde
2023-07-28 13:53 ` Jason Gunthorpe
2023-07-31 6:30 ` Vasant Hegde
2023-07-31 12:03 ` Jason Gunthorpe
2023-07-28 5:35 ` Vasant Hegde [this message]
2023-07-28 14:00 ` [PATCH v2 05/16] iommu/amd/iommu_v2: Use protection_domain in struct device_state Jason Gunthorpe
2023-07-28 5:35 ` [PATCH v2 06/16] iommu/amd: Introduce helper functions for managing GCR3 table Vasant Hegde
2023-07-28 14:09 ` Jason Gunthorpe
2023-07-31 10:40 ` Vasant Hegde
2023-07-28 5:36 ` [PATCH v2 07/16] iommu/amd: Use struct protection_domain in helper functions Vasant Hegde
2023-07-28 14:10 ` Jason Gunthorpe
2023-07-28 5:36 ` [PATCH v2 08/16] iommu/amd: Do not set amd_iommu_pgtable in pass-through mode Vasant Hegde
2023-07-28 14:11 ` Jason Gunthorpe
2023-07-31 6:35 ` Vasant Hegde
2023-07-28 5:36 ` [PATCH v2 09/16] iommu/amd: Miscellaneous clean up when free domain Vasant Hegde
2023-07-28 14:13 ` Jason Gunthorpe
2023-07-31 9:39 ` Vasant Hegde
2023-07-28 5:36 ` [PATCH v2 10/16] iommu/amd: Modify logic for checking GT and PPR features Vasant Hegde
2023-07-28 14:24 ` Jason Gunthorpe
2023-07-31 11:51 ` Vasant Hegde
2023-07-28 5:36 ` [PATCH v2 11/16] iommu/amd: Rename ats related variables Vasant Hegde
2023-07-28 14:27 ` Jason Gunthorpe
2023-07-31 9:15 ` Vasant Hegde
2023-07-28 5:36 ` [PATCH v2 12/16] iommu/amd: Add support for different types of PPR handler Vasant Hegde
2023-07-28 14:31 ` Jason Gunthorpe
2023-07-31 8:02 ` Vasant Hegde
2023-07-31 12:11 ` Jason Gunthorpe
2023-07-31 12:28 ` Vasant Hegde
2023-07-28 5:36 ` [PATCH v2 13/16] iommu/amd: Introduce iommu_dev_data.flags to track device capabilities Vasant Hegde
2023-07-28 14:38 ` Jason Gunthorpe
2023-07-31 7:57 ` Vasant Hegde
2023-07-31 12:08 ` Jason Gunthorpe
2023-08-04 6:40 ` Vasant Hegde
2023-07-28 5:36 ` [PATCH v2 14/16] iommu/amd: Enable device ATS/PASID/PRI capabilities independently Vasant Hegde
2023-07-28 14:40 ` Jason Gunthorpe
2023-07-28 5:36 ` [PATCH v2 15/16] iommu/amd: Initialize iommu_device->max_pasids Vasant Hegde
2023-07-28 14:46 ` Jason Gunthorpe
2023-07-31 7:03 ` Vasant Hegde
2023-07-31 12:07 ` Jason Gunthorpe
2023-07-31 16:04 ` Vasant Hegde
2023-07-28 5:36 ` [PATCH v2 16/16] iommu/amd: Simplify amd_iommu_device_info() Vasant Hegde
2023-07-28 14:47 ` Jason Gunthorpe
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230728053609.165183-6-vasant.hegde@amd.com \
--to=vasant.hegde@amd.com \
--cc=iommu@lists.linux.dev \
--cc=jgg@ziepe.ca \
--cc=joro@8bytes.org \
--cc=jsnitsel@redhat.com \
--cc=suravee.suthikulpanit@amd.com \
--cc=wei.huang2@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox