From: Jason Gunthorpe <jgg@ziepe.ca>
To: Vasant Hegde <vasant.hegde@amd.com>
Cc: iommu@lists.linux.dev, joro@8bytes.org,
suravee.suthikulpanit@amd.com, wei.huang2@amd.com,
jsnitsel@redhat.com
Subject: Re: [PATCH v2 10/16] iommu/amd: Modify logic for checking GT and PPR features
Date: Fri, 28 Jul 2023 11:24:46 -0300 [thread overview]
Message-ID: <ZMPPrkzm7KnxzLV1@ziepe.ca> (raw)
In-Reply-To: <20230728053609.165183-11-vasant.hegde@amd.com>
On Fri, Jul 28, 2023 at 05:36:03AM +0000, Vasant Hegde wrote:
> From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
>
> In order to support v2 page table, IOMMU driver need to check if the
> hardware can support Guest Translation (GT) and Peripheral Page Requet
> (PPR) features. Currently, IOMMU driver uses global (amd_iommu_v2_present)
> and per-iommu (struct amd_iommu.is_iommu_v2) variables to track the
> features. There variables area redundant since we could simply just check
> the global EFR mask.
>
> Therefore, replace it with a helper function with appropriate name.
>
> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
> Co-developed-by: Vasant Hegde <vasant.hegde@amd.com>
> Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
> ---
> drivers/iommu/amd/amd_iommu.h | 11 +++++++++++
> drivers/iommu/amd/amd_iommu_types.h | 9 ++++-----
> drivers/iommu/amd/init.c | 14 +-------------
> drivers/iommu/amd/iommu.c | 2 +-
> 4 files changed, 17 insertions(+), 19 deletions(-)
> diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
> index a0b0deb6fbcb..1f707944b23f 100644
> --- a/drivers/iommu/amd/iommu.c
> +++ b/drivers/iommu/amd/iommu.c
> @@ -392,7 +392,7 @@ static int iommu_init_device(struct amd_iommu *iommu, struct device *dev)
> */
> if ((iommu_default_passthrough() || !amd_iommu_force_isolation) &&
> dev_is_pci(dev) && pci_iommuv2_capable(to_pci_dev(dev))) {
> - dev_data->iommu_v2 = iommu->is_iommu_v2;
> + dev_data->iommu_v2 = amd_iommu_gt_ppr_supported();
This doesn't make alot of sense to me, we should not have global
functions and data in drivers. In this case I would expect the driver
to consult the amd_iommu linked to the struct device it is working on
to determine the capability.
Eg just directly test:
iommu_feature(iommu, FEATURE_GT) && iommu_feature(iommu, FEATURE_PPR)
And remove all the other copies of the iommu_v2
And arguably this can (eventually) be defered to an attach that
requires the gcr3 table.
Also, if the gcr3 table is supported or not should be entirely up to
the HW, policy inputs like "iommu_default_passthrough" and
"force_isolation" are nonsensical here..
Looking in the history this looks like a bodge to cover up the domain
type mismatch during allocation. We need to get to a point where the
device is known during domain allocation so the driver can provide a
v2 page table if the device could possibly use PASID and remove all
this hackery.
Jason
next prev parent reply other threads:[~2023-07-28 14:24 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-28 5:35 [PATCH v2 00/16] iommu/amd: SVA Support (Part 1) - cleanup/refactoring Vasant Hegde
2023-07-28 5:35 ` [PATCH v2 01/16] iommu/amd: Remove unused amd_io_pgtable.pt_root variable Vasant Hegde
2023-07-28 13:17 ` Jason Gunthorpe
2023-07-28 5:35 ` [PATCH v2 02/16] iommu/amd: Consolidate timeout pre-define to amd_iommu_type.h Vasant Hegde
2023-07-28 13:48 ` Jason Gunthorpe
2023-07-28 5:35 ` [PATCH v2 03/16] iommu/amd: Consolidate logic to allocate protection domain Vasant Hegde
2023-07-28 13:49 ` Jason Gunthorpe
2023-07-28 5:35 ` [PATCH v2 04/16] iommu/amd: Refactor protection domain allocation code Vasant Hegde
2023-07-28 13:53 ` Jason Gunthorpe
2023-07-31 6:30 ` Vasant Hegde
2023-07-31 12:03 ` Jason Gunthorpe
2023-07-28 5:35 ` [PATCH v2 05/16] iommu/amd/iommu_v2: Use protection_domain in struct device_state Vasant Hegde
2023-07-28 14:00 ` Jason Gunthorpe
2023-07-28 5:35 ` [PATCH v2 06/16] iommu/amd: Introduce helper functions for managing GCR3 table Vasant Hegde
2023-07-28 14:09 ` Jason Gunthorpe
2023-07-31 10:40 ` Vasant Hegde
2023-07-28 5:36 ` [PATCH v2 07/16] iommu/amd: Use struct protection_domain in helper functions Vasant Hegde
2023-07-28 14:10 ` Jason Gunthorpe
2023-07-28 5:36 ` [PATCH v2 08/16] iommu/amd: Do not set amd_iommu_pgtable in pass-through mode Vasant Hegde
2023-07-28 14:11 ` Jason Gunthorpe
2023-07-31 6:35 ` Vasant Hegde
2023-07-28 5:36 ` [PATCH v2 09/16] iommu/amd: Miscellaneous clean up when free domain Vasant Hegde
2023-07-28 14:13 ` Jason Gunthorpe
2023-07-31 9:39 ` Vasant Hegde
2023-07-28 5:36 ` [PATCH v2 10/16] iommu/amd: Modify logic for checking GT and PPR features Vasant Hegde
2023-07-28 14:24 ` Jason Gunthorpe [this message]
2023-07-31 11:51 ` Vasant Hegde
2023-07-28 5:36 ` [PATCH v2 11/16] iommu/amd: Rename ats related variables Vasant Hegde
2023-07-28 14:27 ` Jason Gunthorpe
2023-07-31 9:15 ` Vasant Hegde
2023-07-28 5:36 ` [PATCH v2 12/16] iommu/amd: Add support for different types of PPR handler Vasant Hegde
2023-07-28 14:31 ` Jason Gunthorpe
2023-07-31 8:02 ` Vasant Hegde
2023-07-31 12:11 ` Jason Gunthorpe
2023-07-31 12:28 ` Vasant Hegde
2023-07-28 5:36 ` [PATCH v2 13/16] iommu/amd: Introduce iommu_dev_data.flags to track device capabilities Vasant Hegde
2023-07-28 14:38 ` Jason Gunthorpe
2023-07-31 7:57 ` Vasant Hegde
2023-07-31 12:08 ` Jason Gunthorpe
2023-08-04 6:40 ` Vasant Hegde
2023-07-28 5:36 ` [PATCH v2 14/16] iommu/amd: Enable device ATS/PASID/PRI capabilities independently Vasant Hegde
2023-07-28 14:40 ` Jason Gunthorpe
2023-07-28 5:36 ` [PATCH v2 15/16] iommu/amd: Initialize iommu_device->max_pasids Vasant Hegde
2023-07-28 14:46 ` Jason Gunthorpe
2023-07-31 7:03 ` Vasant Hegde
2023-07-31 12:07 ` Jason Gunthorpe
2023-07-31 16:04 ` Vasant Hegde
2023-07-28 5:36 ` [PATCH v2 16/16] iommu/amd: Simplify amd_iommu_device_info() Vasant Hegde
2023-07-28 14:47 ` Jason Gunthorpe
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