From: Jason Gunthorpe <jgg@ziepe.ca>
To: Vasant Hegde <vasant.hegde@amd.com>
Cc: iommu@lists.linux.dev, joro@8bytes.org,
suravee.suthikulpanit@amd.com, wei.huang2@amd.com,
jsnitsel@redhat.com
Subject: Re: [PATCH v2 11/16] iommu/amd: Rename ats related variables
Date: Fri, 28 Jul 2023 11:27:19 -0300 [thread overview]
Message-ID: <ZMPQR+Cx3q5jf04X@ziepe.ca> (raw)
In-Reply-To: <20230728053609.165183-12-vasant.hegde@amd.com>
On Fri, Jul 28, 2023 at 05:36:04AM +0000, Vasant Hegde wrote:
> Remove nested structure and make it as 'ats_{enable/qdep}'.
>
> No functional changes intended.
>
> Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
> ---
> drivers/iommu/amd/amd_iommu_types.h | 6 ++----
> drivers/iommu/amd/iommu.c | 26 +++++++++++++-------------
> 2 files changed, 15 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
> index bbb5ac4f0d39..a066f375ba87 100644
> --- a/drivers/iommu/amd/amd_iommu_types.h
> +++ b/drivers/iommu/amd/amd_iommu_types.h
> @@ -816,10 +816,8 @@ struct iommu_dev_data {
> struct device *dev;
> u16 devid; /* PCI Device ID */
> bool iommu_v2; /* Device can make use of IOMMUv2 */
> - struct {
> - bool enabled;
> - int qdep;
> - } ats; /* ATS state */
> + int ats_qdep;
> + bool ats_enabled; /* ATS state */
> bool pri_tlp; /* PASID TLB required for
> PPR completions */
> bool use_vapic; /* Enable device to use vapic mode */
Linus does not like lists of bools like this, you should try to write
it as
u8 ats_enabled:1;
u8 pri_tlp:1;
etc
Otherwise it looks good
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Jason
next prev parent reply other threads:[~2023-07-28 14:27 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-28 5:35 [PATCH v2 00/16] iommu/amd: SVA Support (Part 1) - cleanup/refactoring Vasant Hegde
2023-07-28 5:35 ` [PATCH v2 01/16] iommu/amd: Remove unused amd_io_pgtable.pt_root variable Vasant Hegde
2023-07-28 13:17 ` Jason Gunthorpe
2023-07-28 5:35 ` [PATCH v2 02/16] iommu/amd: Consolidate timeout pre-define to amd_iommu_type.h Vasant Hegde
2023-07-28 13:48 ` Jason Gunthorpe
2023-07-28 5:35 ` [PATCH v2 03/16] iommu/amd: Consolidate logic to allocate protection domain Vasant Hegde
2023-07-28 13:49 ` Jason Gunthorpe
2023-07-28 5:35 ` [PATCH v2 04/16] iommu/amd: Refactor protection domain allocation code Vasant Hegde
2023-07-28 13:53 ` Jason Gunthorpe
2023-07-31 6:30 ` Vasant Hegde
2023-07-31 12:03 ` Jason Gunthorpe
2023-07-28 5:35 ` [PATCH v2 05/16] iommu/amd/iommu_v2: Use protection_domain in struct device_state Vasant Hegde
2023-07-28 14:00 ` Jason Gunthorpe
2023-07-28 5:35 ` [PATCH v2 06/16] iommu/amd: Introduce helper functions for managing GCR3 table Vasant Hegde
2023-07-28 14:09 ` Jason Gunthorpe
2023-07-31 10:40 ` Vasant Hegde
2023-07-28 5:36 ` [PATCH v2 07/16] iommu/amd: Use struct protection_domain in helper functions Vasant Hegde
2023-07-28 14:10 ` Jason Gunthorpe
2023-07-28 5:36 ` [PATCH v2 08/16] iommu/amd: Do not set amd_iommu_pgtable in pass-through mode Vasant Hegde
2023-07-28 14:11 ` Jason Gunthorpe
2023-07-31 6:35 ` Vasant Hegde
2023-07-28 5:36 ` [PATCH v2 09/16] iommu/amd: Miscellaneous clean up when free domain Vasant Hegde
2023-07-28 14:13 ` Jason Gunthorpe
2023-07-31 9:39 ` Vasant Hegde
2023-07-28 5:36 ` [PATCH v2 10/16] iommu/amd: Modify logic for checking GT and PPR features Vasant Hegde
2023-07-28 14:24 ` Jason Gunthorpe
2023-07-31 11:51 ` Vasant Hegde
2023-07-28 5:36 ` [PATCH v2 11/16] iommu/amd: Rename ats related variables Vasant Hegde
2023-07-28 14:27 ` Jason Gunthorpe [this message]
2023-07-31 9:15 ` Vasant Hegde
2023-07-28 5:36 ` [PATCH v2 12/16] iommu/amd: Add support for different types of PPR handler Vasant Hegde
2023-07-28 14:31 ` Jason Gunthorpe
2023-07-31 8:02 ` Vasant Hegde
2023-07-31 12:11 ` Jason Gunthorpe
2023-07-31 12:28 ` Vasant Hegde
2023-07-28 5:36 ` [PATCH v2 13/16] iommu/amd: Introduce iommu_dev_data.flags to track device capabilities Vasant Hegde
2023-07-28 14:38 ` Jason Gunthorpe
2023-07-31 7:57 ` Vasant Hegde
2023-07-31 12:08 ` Jason Gunthorpe
2023-08-04 6:40 ` Vasant Hegde
2023-07-28 5:36 ` [PATCH v2 14/16] iommu/amd: Enable device ATS/PASID/PRI capabilities independently Vasant Hegde
2023-07-28 14:40 ` Jason Gunthorpe
2023-07-28 5:36 ` [PATCH v2 15/16] iommu/amd: Initialize iommu_device->max_pasids Vasant Hegde
2023-07-28 14:46 ` Jason Gunthorpe
2023-07-31 7:03 ` Vasant Hegde
2023-07-31 12:07 ` Jason Gunthorpe
2023-07-31 16:04 ` Vasant Hegde
2023-07-28 5:36 ` [PATCH v2 16/16] iommu/amd: Simplify amd_iommu_device_info() Vasant Hegde
2023-07-28 14:47 ` Jason Gunthorpe
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ZMPQR+Cx3q5jf04X@ziepe.ca \
--to=jgg@ziepe.ca \
--cc=iommu@lists.linux.dev \
--cc=joro@8bytes.org \
--cc=jsnitsel@redhat.com \
--cc=suravee.suthikulpanit@amd.com \
--cc=vasant.hegde@amd.com \
--cc=wei.huang2@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox