From: Vasant Hegde <vasant.hegde@amd.com>
To: <iommu@lists.linux.dev>, <joro@8bytes.org>
Cc: <suravee.suthikulpanit@amd.com>, <wei.huang2@amd.com>,
<jsnitsel@redhat.com>, <jgg@ziepe.ca>,
Vasant Hegde <vasant.hegde@amd.com>
Subject: [PATCH v2 01/10] iommu/amd: Use struct protection_domain in helper functions
Date: Wed, 16 Aug 2023 17:40:22 +0000 [thread overview]
Message-ID: <20230816174031.634453-2-vasant.hegde@amd.com> (raw)
In-Reply-To: <20230816174031.634453-1-vasant.hegde@amd.com>
From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
To simplify the unnecessary use of container_of() on the struct
iommu_domain to get the container structure.
No functional changes intended.
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Co-developed-by: Vasant Hegde <vasant.hegde@amd.com>
Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
---
drivers/iommu/amd/amd_iommu.h | 13 +++++++++----
drivers/iommu/amd/io_pgtable_v2.c | 8 ++++----
drivers/iommu/amd/iommu.c | 18 ++++--------------
3 files changed, 17 insertions(+), 22 deletions(-)
diff --git a/drivers/iommu/amd/amd_iommu.h b/drivers/iommu/amd/amd_iommu.h
index 8b586effbefc..87739d95ea8b 100644
--- a/drivers/iommu/amd/amd_iommu.h
+++ b/drivers/iommu/amd/amd_iommu.h
@@ -55,15 +55,15 @@ int amd_iommu_pc_set_reg(struct amd_iommu *iommu, u8 bank, u8 cntr,
int amd_iommu_pdev_enable_cap_pri(struct pci_dev *pdev);
void amd_iommu_pdev_disable_cap_pri(struct pci_dev *pdev);
-int amd_iommu_flush_page(struct iommu_domain *dom, u32 pasid, u64 address);
+int amd_iommu_flush_page(struct protection_domain *domain, u32 pasid, u64 address);
void amd_iommu_update_and_flush_device_table(struct protection_domain *domain);
void amd_iommu_domain_update(struct protection_domain *domain);
void amd_iommu_domain_flush_complete(struct protection_domain *domain);
void amd_iommu_domain_flush_tlb_pde(struct protection_domain *domain);
-int amd_iommu_flush_tlb(struct iommu_domain *dom, u32 pasid);
-int amd_iommu_domain_set_gcr3(struct iommu_domain *dom, u32 pasid,
+int amd_iommu_flush_tlb(struct protection_domain *domain, u32 pasid);
+int amd_iommu_domain_set_gcr3(struct protection_domain *domain, u32 pasid,
unsigned long cr3);
-int amd_iommu_domain_clear_gcr3(struct iommu_domain *dom, u32 pasid);
+int amd_iommu_domain_clear_gcr3(struct protection_domain *domain, u32 pasid);
#ifdef CONFIG_IRQ_REMAP
int amd_iommu_create_irq_domain(struct amd_iommu *iommu);
@@ -147,6 +147,11 @@ static inline void *alloc_pgtable_page(int nid, gfp_t gfp)
return page ? page_address(page) : NULL;
}
+static inline struct protection_domain *to_pdomain(struct iommu_domain *dom)
+{
+ return container_of(dom, struct protection_domain, domain);
+}
+
bool translation_pre_enabled(struct amd_iommu *iommu);
bool amd_iommu_is_attach_deferred(struct device *dev);
int __init add_special_device(u8 type, u8 id, u32 *devid, bool cmd_line);
diff --git a/drivers/iommu/amd/io_pgtable_v2.c b/drivers/iommu/amd/io_pgtable_v2.c
index f818a7e254d4..c17cda83bca5 100644
--- a/drivers/iommu/amd/io_pgtable_v2.c
+++ b/drivers/iommu/amd/io_pgtable_v2.c
@@ -274,9 +274,9 @@ static int iommu_v2_map_pages(struct io_pgtable_ops *ops, unsigned long iova,
out:
if (updated) {
if (count > 1)
- amd_iommu_flush_tlb(&pdom->domain, 0);
+ amd_iommu_flush_tlb(pdom, 0);
else
- amd_iommu_flush_page(&pdom->domain, 0, o_iova);
+ amd_iommu_flush_page(pdom, 0, o_iova);
}
if (mapped)
@@ -364,7 +364,7 @@ static void v2_free_pgtable(struct io_pgtable *iop)
return;
/* Clear gcr3 entry */
- amd_iommu_domain_clear_gcr3(&pdom->domain, 0);
+ amd_iommu_domain_clear_gcr3(pdom, 0);
/* Make changes visible to IOMMUs */
amd_iommu_domain_update(pdom);
@@ -384,7 +384,7 @@ static struct io_pgtable *v2_alloc_pgtable(struct io_pgtable_cfg *cfg, void *coo
if (!pgtable->pgd)
return NULL;
- ret = amd_iommu_domain_set_gcr3(&pdom->domain, 0, iommu_virt_to_phys(pgtable->pgd));
+ ret = amd_iommu_domain_set_gcr3(pdom, 0, iommu_virt_to_phys(pgtable->pgd));
if (ret)
goto err_free_pgd;
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index 8e4f52d8bc9d..fca6e6ceeef3 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -173,11 +173,6 @@ static struct amd_iommu *rlookup_amd_iommu(struct device *dev)
return __rlookup_amd_iommu(seg, PCI_SBDF_TO_DEVID(devid));
}
-static struct protection_domain *to_pdomain(struct iommu_domain *dom)
-{
- return container_of(dom, struct protection_domain, domain);
-}
-
static struct iommu_dev_data *alloc_dev_data(struct amd_iommu *iommu, u16 devid)
{
struct iommu_dev_data *dev_data;
@@ -2592,10 +2587,8 @@ static int __amd_iommu_flush_page(struct protection_domain *domain, u32 pasid,
return __flush_pasid(domain, pasid, address, false);
}
-int amd_iommu_flush_page(struct iommu_domain *dom, u32 pasid,
- u64 address)
+int amd_iommu_flush_page(struct protection_domain *domain, u32 pasid, u64 address)
{
- struct protection_domain *domain = to_pdomain(dom);
unsigned long flags;
int ret;
@@ -2612,9 +2605,8 @@ static int __amd_iommu_flush_tlb(struct protection_domain *domain, u32 pasid)
true);
}
-int amd_iommu_flush_tlb(struct iommu_domain *dom, u32 pasid)
+int amd_iommu_flush_tlb(struct protection_domain *domain, u32 pasid)
{
- struct protection_domain *domain = to_pdomain(dom);
unsigned long flags;
int ret;
@@ -2690,10 +2682,9 @@ static int __clear_gcr3(struct protection_domain *domain, u32 pasid)
return __amd_iommu_flush_tlb(domain, pasid);
}
-int amd_iommu_domain_set_gcr3(struct iommu_domain *dom, u32 pasid,
+int amd_iommu_domain_set_gcr3(struct protection_domain *domain, u32 pasid,
unsigned long cr3)
{
- struct protection_domain *domain = to_pdomain(dom);
unsigned long flags;
int ret;
@@ -2704,9 +2695,8 @@ int amd_iommu_domain_set_gcr3(struct iommu_domain *dom, u32 pasid,
return ret;
}
-int amd_iommu_domain_clear_gcr3(struct iommu_domain *dom, u32 pasid)
+int amd_iommu_domain_clear_gcr3(struct protection_domain *domain, u32 pasid)
{
- struct protection_domain *domain = to_pdomain(dom);
unsigned long flags;
int ret;
--
2.31.1
next prev parent reply other threads:[~2023-08-16 17:41 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-16 17:40 [PATCH v2 00/10] iommu/amd: SVA Support (part 3) - refactor support for GCR3 table Vasant Hegde
2023-08-16 17:40 ` Vasant Hegde [this message]
2023-08-23 16:42 ` [PATCH v2 01/10] iommu/amd: Use struct protection_domain in helper functions Jason Gunthorpe
2023-08-24 6:12 ` Vasant Hegde
2023-08-16 17:40 ` [PATCH v2 02/10] iommu/amd: Introduce get_amd_iommu_from_dev() Vasant Hegde
2023-09-13 14:42 ` Jason Gunthorpe
2023-09-14 8:21 ` Vasant Hegde
2023-08-16 17:40 ` [PATCH v2 03/10] iommu/amd: Introduce struct protection_domain.pd_mode Vasant Hegde
2023-09-13 14:42 ` Jason Gunthorpe
2023-08-16 17:40 ` [PATCH v2 04/10] iommu/amd: Introduce per-device GCR3 table Vasant Hegde
2023-09-13 14:43 ` Jason Gunthorpe
2023-09-14 8:24 ` Vasant Hegde
2023-08-16 17:40 ` [PATCH v2 05/10] iommu/amd: Use protection_domain.flags to check page table mode Vasant Hegde
2023-09-13 14:43 ` Jason Gunthorpe
2023-08-16 17:40 ` [PATCH v2 06/10] iommu/amd: Refactor helper function for setting / clearing GCR3 Vasant Hegde
2023-09-13 15:12 ` Jason Gunthorpe
2023-09-27 6:21 ` Vasant Hegde
2023-09-27 16:45 ` Jason Gunthorpe
2023-10-10 6:02 ` Vasant Hegde
2023-10-10 14:38 ` Jason Gunthorpe
2023-10-13 15:45 ` Vasant Hegde
2023-10-13 16:01 ` Jason Gunthorpe
2023-08-16 17:40 ` [PATCH v2 07/10] iommu/amd: Refactor helper function for attaching / detaching device Vasant Hegde
2023-08-16 17:40 ` [PATCH v2 08/10] iommu/amd: Refactor protection_domain helper functions Vasant Hegde
2023-08-16 17:40 ` [PATCH v2 09/10] iommu/amd: Refactor GCR3 table " Vasant Hegde
2023-08-16 17:40 ` [PATCH v2 10/10] iommu/amd: Remove unused GCR3 table parameters from struct protection_domain Vasant Hegde
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