[PATCH v1 00/10] Enhance UFS Mediatek Driver

[PATCH v1 00/10] Enhance UFS Mediatek Driver

[peter.wang]

From: Peter Wang <peter.wang@mediatek.com>

Improves the UFS Mediatek driver by fixing runtime suspend
deadlocks, correcting clock scaling with PM QoS, and adjusting
power management flows. It addresses shutdown/suspend race 
conditions, enables MCQ mode interrupts, and removes redundant
functions. Support for new platforms is added with the 
MMIO_OTSD_CTRL register, and MT6991 performance is optimized
with MRTT and random improvements. These changes collectively 
enhance driver performance, stability, and compatibility.

Peter Wang (8):
  ufs: host: mediatek: Fix runtime suspend error deadlock
  ufs: host: mediatek: Correct clock scaling with PM QoS flow
  ufs: host: mediatek: Adjust clock scaling for PM flow
  ufs: host: mediatek: Handle clock scaling for high gear in PM flow
  ufs: host: mediatek: Adjust sync length for FASTAUTO mode
  ufs: host: mediatek: Fix shutdown/suspend race condition
  ufs: host: mediatek: Remove duplicate function
  ufs: host: mediatek: Add support for new platform with MMIO_OTSD_CTR

Alice Chao (1):
  ufs: host: mediatek: Enable interrupts for MCQ mode

Naomi Chu (1):
  ufs: host: mediatek: Support new feature for MT6991

 drivers/ufs/core/ufs-sysfs.c    |   3 +-
 drivers/ufs/core/ufshcd-priv.h  |   5 --
 drivers/ufs/core/ufshcd.c       |  18 +----
 drivers/ufs/host/ufs-mediatek.c | 134 ++++++++++++++++++++++++++------
 drivers/ufs/host/ufs-mediatek.h |   7 ++
 include/ufs/ufshcd.h            |  20 +++++
 include/ufs/unipro.h            |   7 +-
 7 files changed, 150 insertions(+), 44 deletions(-)

-- 
2.45.2

[PATCH v1 01/10] ufs: host: mediatek: Fix runtime suspend error deadlock

[peter.wang]

From: Peter Wang <peter.wang@mediatek.com>

Fix the deadlock issue during runtime suspend by checking
the error handler's progress. If the error handler is active,
break the runtime suspend process by returning -EAGAIN.
This approach prevents potential deadlocks when acquiring
runtime PM and enhances system stability.

Signed-off-by: Peter Wang <peter.wang@mediatek.com>
---
 drivers/ufs/core/ufshcd.c       | 12 ------------
 drivers/ufs/host/ufs-mediatek.c | 12 +++++++++---
 include/ufs/ufshcd.h            | 12 ++++++++++++
 3 files changed, 21 insertions(+), 15 deletions(-)

diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c
index c9eb89dccd1e..c7a12748e479 100644
--- a/drivers/ufs/core/ufshcd.c
+++ b/drivers/ufs/core/ufshcd.c
@@ -214,11 +214,6 @@ static const char *const ufshcd_state_name[] = {
 	[UFSHCD_STATE_EH_SCHEDULED_NON_FATAL]	= "eh_non_fatal",
 };
 
-/* UFSHCD error handling flags */
-enum {
-	UFSHCD_EH_IN_PROGRESS = (1 << 0),
-};
-
 /* UFSHCD UIC layer error flags */
 enum {
 	UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
@@ -230,13 +225,6 @@ enum {
 	UFSHCD_UIC_PA_GENERIC_ERROR = (1 << 6), /* Generic PA error */
 };
 
-#define ufshcd_set_eh_in_progress(h) \
-	((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
-#define ufshcd_eh_in_progress(h) \
-	((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
-#define ufshcd_clear_eh_in_progress(h) \
-	((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
-
 const struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
 	[UFS_PM_LVL_0] = {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
 	[UFS_PM_LVL_1] = {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 758a393a9de1..b1797386668c 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -1746,9 +1746,15 @@ static int ufs_mtk_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op,
 	struct arm_smccc_res res;
 
 	if (status == PRE_CHANGE) {
-		if (ufshcd_is_auto_hibern8_supported(hba))
-			return ufs_mtk_auto_hibern8_disable(hba);
-		return 0;
+		if (!ufshcd_is_auto_hibern8_supported(hba))
+			return 0;
+		err = ufs_mtk_auto_hibern8_disable(hba);
+
+		/* May trigger EH work without exiting hibern8 error */
+		if (ufshcd_eh_in_progress(hba))
+			return -EAGAIN;
+		else
+			return err;
 	}
 
 	if (ufshcd_is_link_hibern8(hba)) {
diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h
index ea0021f067c9..45e2ca65de90 100644
--- a/include/ufs/ufshcd.h
+++ b/include/ufs/ufshcd.h
@@ -97,6 +97,11 @@ enum uic_link_state {
 	UIC_LINK_BROKEN_STATE	= 3, /* Link is in broken state */
 };
 
+/* UFSHCD error handling flags */
+enum {
+	UFSHCD_EH_IN_PROGRESS = (1 << 0),
+};
+
 #define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
 #define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
 				    UIC_LINK_ACTIVE_STATE)
@@ -129,6 +134,13 @@ enum uic_link_state {
 #define ufshcd_is_ufs_dev_deepsleep(h) \
 	((h)->curr_dev_pwr_mode == UFS_DEEPSLEEP_PWR_MODE)
 
+#define ufshcd_set_eh_in_progress(h) \
+	((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
+#define ufshcd_eh_in_progress(h) \
+	((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
+#define ufshcd_clear_eh_in_progress(h) \
+	((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
+
 /*
  * UFS Power management levels.
  * Each level is in increasing order of power savings, except DeepSleep
-- 
2.45.2

Re: [PATCH v1 01/10] ufs: host: mediatek: Fix runtime suspend error deadlock

[Bart Van Assche]

On 9/18/25 3:36 AM, peter.wang@mediatek.com wrote:
> Fix the deadlock issue during runtime suspend by checking
> the error handler's progress. If the error handler is active,
> break the runtime suspend process by returning -EAGAIN.
> This approach prevents potential deadlocks when acquiring
> runtime PM and enhances system stability.

"enhances system stability" sounds like marketing language to me. Please
provide a root-cause analysis and also explain why this change is only
required for the MediaTek driver and not for any other UFS host drivers.

> diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
> index 758a393a9de1..b1797386668c 100644
> --- a/drivers/ufs/host/ufs-mediatek.c
> +++ b/drivers/ufs/host/ufs-mediatek.c
> @@ -1746,9 +1746,15 @@ static int ufs_mtk_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op,
>   	struct arm_smccc_res res;
>   
>   	if (status == PRE_CHANGE) {
> -		if (ufshcd_is_auto_hibern8_supported(hba))
> -			return ufs_mtk_auto_hibern8_disable(hba);
> -		return 0;
> +		if (!ufshcd_is_auto_hibern8_supported(hba))
> +			return 0;
> +		err = ufs_mtk_auto_hibern8_disable(hba);
> +
> +		/* May trigger EH work without exiting hibern8 error */
> +		if (ufshcd_eh_in_progress(hba))
> +			return -EAGAIN;
> +		else
> +			return err;
>   	}
>   
>   	if (ufshcd_is_link_hibern8(hba)) {

How can ufs_mtk_suspend() be called while the error handler is in
progress? ufshcd_err_handler() disables RPM before it sets the
UFSHCD_EH_IN_PROGRESS flag.

> diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h
> index ea0021f067c9..45e2ca65de90 100644
> --- a/include/ufs/ufshcd.h
> +++ b/include/ufs/ufshcd.h
> @@ -97,6 +97,11 @@ enum uic_link_state {
>   	UIC_LINK_BROKEN_STATE	= 3, /* Link is in broken state */
>   };
>   
> +/* UFSHCD error handling flags */
> +enum {
> +	UFSHCD_EH_IN_PROGRESS = (1 << 0),
> +};
> +
>   #define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
>   #define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
>   				    UIC_LINK_ACTIVE_STATE)
> @@ -129,6 +134,13 @@ enum uic_link_state {
>   #define ufshcd_is_ufs_dev_deepsleep(h) \
>   	((h)->curr_dev_pwr_mode == UFS_DEEPSLEEP_PWR_MODE)
>   
> +#define ufshcd_set_eh_in_progress(h) \
> +	((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
> +#define ufshcd_eh_in_progress(h) \
> +	((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
> +#define ufshcd_clear_eh_in_progress(h) \
> +	((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)

The UFSHCD_EH_IN_PROGRESS definition and also the
ufshcd_set_eh_in_progress() and ufshcd_clear_eh_in_progress()
definitions must remain in the UFS core private code. Please do not move
these definitions into the include/ufs/ufshcd.h header file.

Thanks,

Bart.

Re: [PATCH v1 01/10] ufs: host: mediatek: Fix runtime suspend error deadlock

[Peter Wang (王信友)]

On Thu, 2025-09-18 at 11:27 -0700, Bart Van Assche wrote:
> On 9/18/25 3:36 AM, peter.wang@mediatek.com wrote:
> > Fix the deadlock issue during runtime suspend by checking
> > the error handler's progress. If the error handler is active,
> > break the runtime suspend process by returning -EAGAIN.
> > This approach prevents potential deadlocks when acquiring
> > runtime PM and enhances system stability.
> 
> "enhances system stability" sounds like marketing language to me.
> Please
> provide a root-cause analysis and also explain why this change is
> only
> required for the MediaTek driver and not for any other UFS host
> drivers.
> 

Hi Bart,

Apologies, I’m not sure how to express this in a way that
doesn’t sound like marketing language. But this patch is 
indeed meant to enhance system stability, and the reason 
is quite trivial.

An error occurred during the suspend process, causing IO to hang.
This is because the error handler (eh) work is waiting for
resume, while the suspend work is waiting for the error handler 
to finish before sending SSU.


> > diff --git a/drivers/ufs/host/ufs-mediatek.c
> > b/drivers/ufs/host/ufs-mediatek.c
> > index 758a393a9de1..b1797386668c 100644
> > --- a/drivers/ufs/host/ufs-mediatek.c
> > +++ b/drivers/ufs/host/ufs-mediatek.c
> > @@ -1746,9 +1746,15 @@ static int ufs_mtk_suspend(struct ufs_hba
> > *hba, enum ufs_pm_op pm_op,
> >       struct arm_smccc_res res;
> > 
> >       if (status == PRE_CHANGE) {
> > -             if (ufshcd_is_auto_hibern8_supported(hba))
> > -                     return ufs_mtk_auto_hibern8_disable(hba);
> > -             return 0;
> > +             if (!ufshcd_is_auto_hibern8_supported(hba))
> > +                     return 0;
> > +             err = ufs_mtk_auto_hibern8_disable(hba);
> > +
> > +             /* May trigger EH work without exiting hibern8 error
> > */
> > +             if (ufshcd_eh_in_progress(hba))
> > +                     return -EAGAIN;
> > +             else
> > +                     return err;
> >       }
> > 
> >       if (ufshcd_is_link_hibern8(hba)) {
> 
> How can ufs_mtk_suspend() be called while the error handler is in
> progress? ufshcd_err_handler() disables RPM before it sets the
> UFSHCD_EH_IN_PROGRESS flag.
> 

This error is triggered by ufs_mtk_auto_hibern8_disable,
As the comment description
/* May trigger EH work without exiting hibern8 error */
so it could happen during the suspend period.


> 
> The UFSHCD_EH_IN_PROGRESS definition and also the
> ufshcd_set_eh_in_progress() and ufshcd_clear_eh_in_progress()
> definitions must remain in the UFS core private code. Please do not
> move
> these definitions into the include/ufs/ufshcd.h header file.
> 
> Thanks,
> 
> Bart.


Do you think we should check ufshcd_eh_in_progress in 
__ufshcd_wl_suspend? I'm not sure, because we don't see this 
error on all UFS hosts — the vendor suspend operations 
(ufshcd_vops_suspend) could be different.

Thanks.
Peter

Re: [PATCH v1 01/10] ufs: host: mediatek: Fix runtime suspend error deadlock

[Bart Van Assche]

On 9/19/25 1:11 AM, Peter Wang (王信友) wrote:
> An error occurred during the suspend process, causing IO to hang.
> This is because the error handler (eh) work is waiting for
> resume, while the suspend work is waiting for the error handler
> to finish before sending SSU.

If the suspend callback waits for error handling to finish and the
error handler waits until resuming has finished, isn't this an issue
that can occur for any UFS host controller and hence that should be
fixed in the UFSHCI driver core rather than in one host driver only?

Why is the hba->pm_op_in_progress variable not sufficient to prevent
this deadlock? Should this code perhaps be moved from
ufshcd_eh_host_reset_handler() into ufshcd_err_handler()?

	/*
	 * If runtime PM sent SSU and got a timeout, scsi_error_handler is
	 * stuck in this function waiting for flush_work(&hba->eh_work). And
	 * ufshcd_err_handler(eh_work) is stuck waiting for runtime PM. Do
	 * ufshcd_link_recovery instead of eh_work to prevent deadlock.
	 */
	if (hba->pm_op_in_progress) {
		if (ufshcd_link_recovery(hba))
			err = FAILED;

		return err;
	}

>> How can ufs_mtk_suspend() be called while the error handler is in
>> progress? ufshcd_err_handler() disables RPM before it sets the
>> UFSHCD_EH_IN_PROGRESS flag.
> 
> This error is triggered by ufs_mtk_auto_hibern8_disable,
> As the comment description
> /* May trigger EH work without exiting hibern8 error */
> so it could happen during the suspend period.

That source code comment is confusing me, especially the "without
exiting hibern8 error" part. Do you really want to say that the device
is in a hibernation error state and remains in a hibernation error
state?

>> The UFSHCD_EH_IN_PROGRESS definition and also the
>> ufshcd_set_eh_in_progress() and ufshcd_clear_eh_in_progress()
>> definitions must remain in the UFS core private code. Please do not
>> move
>> these definitions into the include/ufs/ufshcd.h header file.
> 
> Do you think we should check ufshcd_eh_in_progress in
> __ufshcd_wl_suspend? I'm not sure, because we don't see this
> error on all UFS hosts — the vendor suspend operations
> (ufshcd_vops_suspend) could be different.

Why is auto-hibernation disabled during suspend? As far as I know the
UFSHCI standard allows to keep auto-hibernation enabled during suspend.

Thanks,

Bart.

Re: [PATCH v1 01/10] ufs: host: mediatek: Fix runtime suspend error deadlock

[Peter Wang (王信友)]

On Fri, 2025-09-19 at 13:57 -0700, Bart Van Assche wrote
> 
> If the suspend callback waits for error handling to finish and the
> error handler waits until resuming has finished, isn't this an issue
> that can occur for any UFS host controller and hence that should be
> fixed in the UFSHCI driver core rather than in one host driver only?
> 
> Why is the hba->pm_op_in_progress variable not sufficient to prevent
> this deadlock? Should this code perhaps be moved from
> ufshcd_eh_host_reset_handler() into ufshcd_err_handler()?
> 
>         /*
>          * If runtime PM sent SSU and got a timeout,
> scsi_error_handler is
>          * stuck in this function waiting for flush_work(&hba-
> >eh_work). And
>          * ufshcd_err_handler(eh_work) is stuck waiting for runtime
> PM. Do
>          * ufshcd_link_recovery instead of eh_work to prevent
> deadlock.
>          */
>         if (hba->pm_op_in_progress) {
>                 if (ufshcd_link_recovery(hba))
>                         err = FAILED;
> 
>                 return err;
>         }
> 

Hi Bart,

Okay, you prefer to check pm_op_in_progress before getting 
runtime PM, like below patch? 
If yes, I will remove this patch and check this in ufs core.

@@ -6625,6 +6625,11 @@ static void ufshcd_err_handler(struct
work_struct *work)
        }
        spin_unlock_irqrestore(hba->host->host_lock, flags);

+       if (hba->pm_op_in_progress) {
+               ufshcd_link_recovery(hba);
+               return;
+       }
+
        ufshcd_err_handling_prepare(hba);


> > > How can ufs_mtk_suspend() be called while the error handler is in
> > > progress? ufshcd_err_handler() disables RPM before it sets the
> > > UFSHCD_EH_IN_PROGRESS flag.
> > 
> > This error is triggered by ufs_mtk_auto_hibern8_disable,
> > As the comment description
> > /* May trigger EH work without exiting hibern8 error */
> > so it could happen during the suspend period.
> 
> That source code comment is confusing me, especially the "without
> exiting hibern8 error" part. Do you really want to say that the
> device
> is in a hibernation error state and remains in a hibernation error
> state?
> 

No, it just means that when exiting hibernate,
err = ufs_mtk_auto_hibern8_disable(hba);
err could be 0.
But the UIC error could be triggered by an interrupt.


> > > The UFSHCD_EH_IN_PROGRESS definition and also the
> > > ufshcd_set_eh_in_progress() and ufshcd_clear_eh_in_progress()
> > > definitions must remain in the UFS core private code. Please do
> > > not
> > > move
> > > these definitions into the include/ufs/ufshcd.h header file.
> > 
> > Do you think we should check ufshcd_eh_in_progress in
> > __ufshcd_wl_suspend? I'm not sure, because we don't see this
> > error on all UFS hosts — the vendor suspend operations
> > (ufshcd_vops_suspend) could be different.
> 
> Why is auto-hibernation disabled during suspend? As far as I know the
> UFSHCI standard allows to keep auto-hibernation enabled during
> suspend.
> 
> Thanks,
> 
> Bart.


This is a limitation of MediaTek’s SoC.
If auto-hibernate is triggered concurrently with manual
hibernate, it may cause errors. Therefore, we disable 
auto-hibernate before issuing a manual hibernate command.

Thanks.
Peter

Re: [PATCH v1 01/10] ufs: host: mediatek: Fix runtime suspend error deadlock

[Bart Van Assche]

On 9/22/25 1:37 AM, Peter Wang (王信友) wrote:
> Okay, you prefer to check pm_op_in_progress before getting
> runtime PM, like below patch?
> If yes, I will remove this patch and check this in ufs core.
> 
> @@ -6625,6 +6625,11 @@ static void ufshcd_err_handler(struct
> work_struct *work)
>          }
>          spin_unlock_irqrestore(hba->host->host_lock, flags);
> 
> +       if (hba->pm_op_in_progress) {
> +               ufshcd_link_recovery(hba);
> +               return;
> +       }
> +
>          ufshcd_err_handling_prepare(hba);

Yes, the above change is what I prefer. Please note that I haven't
tested this change myself.
>>>> The UFSHCD_EH_IN_PROGRESS definition and also the
>>>> ufshcd_set_eh_in_progress() and ufshcd_clear_eh_in_progress()
>>>> definitions must remain in the UFS core private code. Please do
>>>> not
>>>> move
>>>> these definitions into the include/ufs/ufshcd.h header file.
>>>
>>> Do you think we should check ufshcd_eh_in_progress in
>>> __ufshcd_wl_suspend? I'm not sure, because we don't see this
>>> error on all UFS hosts — the vendor suspend operations
>>> (ufshcd_vops_suspend) could be different.
>>
>> Why is auto-hibernation disabled during suspend? As far as I know the
>> UFSHCI standard allows to keep auto-hibernation enabled during
>> suspend.
> 
> This is a limitation of MediaTek’s SoC.
> If auto-hibernate is triggered concurrently with manual
> hibernate, it may cause errors. Therefore, we disable
> auto-hibernate before issuing a manual hibernate command.

How about adding a comment that explains this?

Thanks,

Bart.

Re: [PATCH v1 01/10] ufs: host: mediatek: Fix runtime suspend error deadlock

[Peter Wang (王信友)]

On Mon, 2025-09-22 at 11:27 -0700, Bart Van Assche wrote:
> 
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
> 
> > 
> > @@ -6625,6 +6625,11 @@ static void ufshcd_err_handler(struct
> > work_struct *work)
> >          }
> >          spin_unlock_irqrestore(hba->host->host_lock, flags);
> > 
> > +       if (hba->pm_op_in_progress) {
> > +               ufshcd_link_recovery(hba);
> > +               return;
> > +       }
> > +
> >          ufshcd_err_handling_prepare(hba);
> 
> Yes, the above change is what I prefer. Please note that I haven't
> tested this change myself.
> > > > 
> > 
> > This is a limitation of MediaTek’s SoC.
> > If auto-hibernate is triggered concurrently with manual
> > hibernate, it may cause errors. Therefore, we disable
> > auto-hibernate before issuing a manual hibernate command.
> 
> How about adding a comment that explains this?
> 
> Thanks,
> 
> Bart.

Hi Bart,

Okay, I will submit another patch and include this comment.

Thanks
Peter

[PATCH v1 02/10] ufs: host: mediatek: Correct clock scaling with PM QoS flow

[peter.wang]

From: Peter Wang <peter.wang@mediatek.com>

Correct clock scaling with PM QoS during suspend and resume.
Ensure PM QoS is released during suspend if scaling up and
re-applied after resume. This prevents performance issues
and maintains proper power management.

Signed-off-by: Peter Wang <peter.wang@mediatek.com>
---
 drivers/ufs/core/ufshcd.c       |  3 ++-
 drivers/ufs/host/ufs-mediatek.c | 10 ++++++++++
 include/ufs/ufshcd.h            |  1 +
 3 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c
index c7a12748e479..4e0de3a6d9b6 100644
--- a/drivers/ufs/core/ufshcd.c
+++ b/drivers/ufs/core/ufshcd.c
@@ -1063,13 +1063,14 @@ void ufshcd_pm_qos_exit(struct ufs_hba *hba)
  * @hba: per adapter instance
  * @on: If True, vote for perf PM QoS mode otherwise power save mode
  */
-static void ufshcd_pm_qos_update(struct ufs_hba *hba, bool on)
+void ufshcd_pm_qos_update(struct ufs_hba *hba, bool on)
 {
 	if (!hba->pm_qos_enabled)
 		return;
 
 	cpu_latency_qos_update_request(&hba->pm_qos_req, on ? 0 : PM_QOS_DEFAULT_VALUE);
 }
+EXPORT_SYMBOL_GPL(ufshcd_pm_qos_update);
 
 /**
  * ufshcd_set_clk_freq - set UFS controller clock frequencies
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index b1797386668c..e3d8e0fdbbe3 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -1744,6 +1744,7 @@ static int ufs_mtk_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op,
 {
 	int err;
 	struct arm_smccc_res res;
+	struct ufs_mtk_host *host = ufshcd_get_variant(hba);
 
 	if (status == PRE_CHANGE) {
 		if (!ufshcd_is_auto_hibern8_supported(hba))
@@ -1779,6 +1780,10 @@ static int ufs_mtk_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op,
 
 	ufs_mtk_sram_pwr_ctrl(false, res);
 
+	/* Release pm_qos if in scale-up mode during suspend */
+	if (ufshcd_is_clkscaling_supported(hba) && (host->clk_scale_up))
+		ufshcd_pm_qos_update(hba, false);
+
 	return 0;
 fail:
 	/*
@@ -1794,6 +1799,7 @@ static int ufs_mtk_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
 {
 	int err;
 	struct arm_smccc_res res;
+	struct ufs_mtk_host *host = ufshcd_get_variant(hba);
 
 	if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL)
 		ufs_mtk_dev_vreg_set_lpm(hba, false);
@@ -1804,6 +1810,10 @@ static int ufs_mtk_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
 	if (err)
 		goto fail;
 
+	/* Request pm_qos if in scale-up mode after resume */
+	if (ufshcd_is_clkscaling_supported(hba) && (host->clk_scale_up))
+		ufshcd_pm_qos_update(hba, true);
+
 	if (ufshcd_is_link_hibern8(hba)) {
 		err = ufs_mtk_link_set_hpm(hba);
 		if (err)
diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h
index 45e2ca65de90..a6ed7aa59533 100644
--- a/include/ufs/ufshcd.h
+++ b/include/ufs/ufshcd.h
@@ -1495,5 +1495,6 @@ int ufshcd_write_ee_control(struct ufs_hba *hba);
 int ufshcd_update_ee_control(struct ufs_hba *hba, u16 *mask,
 			     const u16 *other_mask, u16 set, u16 clr);
 void ufshcd_force_error_recovery(struct ufs_hba *hba);
+void ufshcd_pm_qos_update(struct ufs_hba *hba, bool on);
 
 #endif /* End of Header */
-- 
2.45.2

Re: [PATCH v1 02/10] ufs: host: mediatek: Correct clock scaling with PM QoS flow

[Bart Van Assche]

On 9/18/25 3:36 AM, peter.wang@mediatek.com wrote:
> Correct clock scaling with PM QoS during suspend and resume.
> Ensure PM QoS is released during suspend if scaling up and
> re-applied after resume. This prevents performance issues
> and maintains proper power management.

Is this issue related in any way to the MediaTek UFS host driver? If
not, please change this patch into a patch for the UFS core driver such
that this issue is fixed for all UFS host drivers at once.

Thanks,

Bart.

Re: [PATCH v1 02/10] ufs: host: mediatek: Correct clock scaling with PM QoS flow

[Peter Wang (王信友)]

On Thu, 2025-09-18 at 11:30 -0700, Bart Van Assche wrote:
> On 9/18/25 3:36 AM, peter.wang@mediatek.com wrote:
> > Correct clock scaling with PM QoS during suspend and resume.
> > Ensure PM QoS is released during suspend if scaling up and
> > re-applied after resume. This prevents performance issues
> > and maintains proper power management.
> 
> Is this issue related in any way to the MediaTek UFS host driver? If
> not, please change this patch into a patch for the UFS core driver
> such
> that this issue is fixed for all UFS host drivers at once.
> 
> Thanks,
> 
> Bart.


Hi Bart,

Yes, this is a MediaTek-specific test which disables clock scaling
and keeps the power mode in high gear.
So, I don't think this patch should be applied to the ufshcd core.

Thanks.
Peter

Re: [PATCH v1 02/10] ufs: host: mediatek: Correct clock scaling with PM QoS flow

[Bart Van Assche]

On 9/19/25 1:11 AM, Peter Wang (王信友) wrote:
> On Thu, 2025-09-18 at 11:30 -0700, Bart Van Assche wrote:
>> On 9/18/25 3:36 AM, peter.wang@mediatek.com wrote:
>> > Correct clock scaling with PM QoS during suspend and resume.
>> > Ensure PM QoS is released during suspend if scaling up and
>> > re-applied after resume. This prevents performance issues
>> > and maintains proper power management.
>> 
>> Is this issue related in any way to the MediaTek UFS host driver? If
>> not, please change this patch into a patch for the UFS core driver
>> such
>> that this issue is fixed for all UFS host drivers at once.
>
> Yes, this is a MediaTek-specific test which disables clock scaling
> and keeps the power mode in high gear.
> So, I don't think this patch should be applied to the ufshcd core.

Hmm ... it is not clear to me why this change is specific to MediaTek
host controllers. Please move the code changes in this patch from the
MediaTek driver into the UFSHCI driver core.

Additionally, why is this change necessary? Suspend and resume should
happen quickly. Does removing CPU latency QoS requests during suspend
and resume really save power? Has the power impact of this patch been
measured?

Thanks,

Bart.

Re: [PATCH v1 02/10] ufs: host: mediatek: Correct clock scaling with PM QoS flow

[Peter Wang (王信友)]

On Fri, 2025-09-19 at 14:02 -0700, Bart Van Assche wrote:
> 
> Hmm ... it is not clear to me why this change is specific to MediaTek
> host controllers. Please move the code changes in this patch from the
> MediaTek driver into the UFSHCI driver core.
> 
> Additionally, why is this change necessary? Suspend and resume should
> happen quickly. Does removing CPU latency QoS requests during suspend
> and resume really save power? Has the power impact of this patch been
> measured?
> 
> Thanks,
> 
> Bart.


Hi Bart,

No, it does not affect power, it affects performance after resume.
After suspend, the UFS core always releases pm_qos, so power is not a
concern.
https://elixir.bootlin.com/linux/v6.16.8/source/drivers/ufs/core/ufshcd.c#L10169

However, after resume, pm_qos is not re-acquired if it was released
during the previous suspend. Therefore, if we set the gear to a high 
value for performance, this could be impacted. But in the UFS core,
the gear should be set to low during suspend, so there is no need to 
re-acquire pm_qos after resume.

Thansk.
Peter

Re: [PATCH v1 02/10] ufs: host: mediatek: Correct clock scaling with PM QoS flow

[Bart Van Assche]

On 9/22/25 1:39 AM, Peter Wang (王信友) wrote:
> However, after resume, pm_qos is not re-acquired if it was released
> during the previous suspend. Therefore, if we set the gear to a high
> value for performance, this could be impacted. But in the UFS core,
> the gear should be set to low during suspend, so there is no need to
> re-acquire pm_qos after resume.

Hi Peter,

Thanks for the clarification, this is appreciated.

However, the following is not yet clear to me:
(1) Why this change is necessary.
(2) Why this change has been implemented in the MediaTek driver instead
     of the UFS core.

Thanks,

Bart.

Re: [PATCH v1 02/10] ufs: host: mediatek: Correct clock scaling with PM QoS flow

[Peter Wang (王信友)]

On Mon, 2025-09-22 at 12:21 -0700, Bart Van Assche wrote:
> 
> Hi Peter,
> 
> Thanks for the clarification, this is appreciated.
> 
> However, the following is not yet clear to me:
> (1) Why this change is necessary.
> 
Hi Bart,

Because if mediatek disable clock scaling (clk_scaling.is_enabled = 0) 
and keep in high gear, the performance will drop after resume.

> (2) Why this change has been implemented in the MediaTek driver
> instead
>      of the UFS core.
> 

Because I’m not sure if other platforms might have such special use
cases
—supporting clock scaling but then disabling it.

Thanks
Peter



> Thanks,
> 
> Bart.
> 

[PATCH v1 03/10] ufs: host: mediatek: Adjust clock scaling for PM flow

[peter.wang]

From: Peter Wang <peter.wang@mediatek.com>

Adjust clock scaling during suspend and resume in the UFS
Mediatek driver. Ensure that the clock scales down during
suspend if it was scaled up, and scales up again after resume.
This adjustment maintains proper power management.

Signed-off-by: Peter Wang <peter.wang@mediatek.com>
---
 drivers/ufs/host/ufs-mediatek.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index e3d8e0fdbbe3..f445bc720a5e 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -1780,9 +1780,11 @@ static int ufs_mtk_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op,
 
 	ufs_mtk_sram_pwr_ctrl(false, res);
 
-	/* Release pm_qos if in scale-up mode during suspend */
-	if (ufshcd_is_clkscaling_supported(hba) && (host->clk_scale_up))
+	/* Release pm_qos/clk if in scale-up mode during suspend */
+	if (ufshcd_is_clkscaling_supported(hba) && (host->clk_scale_up)) {
 		ufshcd_pm_qos_update(hba, false);
+		_ufs_mtk_clk_scale(hba, false);
+	}
 
 	return 0;
 fail:
@@ -1810,9 +1812,11 @@ static int ufs_mtk_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
 	if (err)
 		goto fail;
 
-	/* Request pm_qos if in scale-up mode after resume */
-	if (ufshcd_is_clkscaling_supported(hba) && (host->clk_scale_up))
+	/* Request pm_qos/clk if in scale-up mode after resume */
+	if (ufshcd_is_clkscaling_supported(hba) && (host->clk_scale_up)) {
 		ufshcd_pm_qos_update(hba, true);
+		_ufs_mtk_clk_scale(hba, true);
+	}
 
 	if (ufshcd_is_link_hibern8(hba)) {
 		err = ufs_mtk_link_set_hpm(hba);
-- 
2.45.2

[PATCH v1 04/10] ufs: host: mediatek: Handle clock scaling for high gear in PM flow

[peter.wang]

From: Peter Wang <peter.wang@mediatek.com>

Add clock scaling down for power management flow in the UFS
Mediatek driver. If clock scaling is disabled and fixed in
high gear, ensure the clock scales down during suspend and
scales up again after resume to support high gear.
This adjustment maintains proper power management.

Signed-off-by: Peter Wang <peter.wang@mediatek.com>
---
 drivers/ufs/host/ufs-mediatek.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index f445bc720a5e..d9026a9afe17 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -1784,6 +1784,9 @@ static int ufs_mtk_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op,
 	if (ufshcd_is_clkscaling_supported(hba) && (host->clk_scale_up)) {
 		ufshcd_pm_qos_update(hba, false);
 		_ufs_mtk_clk_scale(hba, false);
+	} else if ((!ufshcd_is_clkscaling_supported(hba) &&
+		    hba->pwr_info.gear_rx >= UFS_HS_G5)) {
+		_ufs_mtk_clk_scale(hba, false);
 	}
 
 	return 0;
@@ -1816,6 +1819,9 @@ static int ufs_mtk_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
 	if (ufshcd_is_clkscaling_supported(hba) && (host->clk_scale_up)) {
 		ufshcd_pm_qos_update(hba, true);
 		_ufs_mtk_clk_scale(hba, true);
+	} else if ((!ufshcd_is_clkscaling_supported(hba) &&
+		    hba->pwr_info.gear_rx >= UFS_HS_G5)) {
+		_ufs_mtk_clk_scale(hba, true);
 	}
 
 	if (ufshcd_is_link_hibern8(hba)) {
-- 
2.45.2

[PATCH v1 05/10] ufs: host: mediatek: Adjust sync length for FASTAUTO mode

[peter.wang]

From: Peter Wang <peter.wang@mediatek.com>

Set the sync length for FASTAUTO G1 mode in the UFS Mediatek
driver. This ensures the sync length meets minimum values
for high-speed gears, improving stability during power mode
changes.

Signed-off-by: Peter Wang <peter.wang@mediatek.com>
---
 drivers/ufs/host/ufs-mediatek.c | 32 ++++++++++++++++++++++++++++++++
 include/ufs/unipro.h            |  7 ++++++-
 2 files changed, 38 insertions(+), 1 deletion(-)

diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index d9026a9afe17..851a4d839631 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -1332,6 +1332,36 @@ static bool ufs_mtk_pmc_via_fastauto(struct ufs_hba *hba,
 	return true;
 }
 
+static void ufs_mtk_adjust_sync_length(struct ufs_hba *hba)
+{
+	int i;
+	u32 value;
+	u32 cnt, att, min;
+	struct attr_min {
+		u32 attr;
+		u32 min_value;
+	} pa_min_sync_length[] = {
+		{PA_TXHSG1SYNCLENGTH, 0x48},
+		{PA_TXHSG2SYNCLENGTH, 0x48},
+		{PA_TXHSG3SYNCLENGTH, 0x48},
+		{PA_TXHSG4SYNCLENGTH, 0x48},
+		{PA_TXHSG5SYNCLENGTH, 0x48}
+	};
+
+	cnt = sizeof(pa_min_sync_length) / sizeof(struct attr_min);
+	for (i = 0; i < cnt; i++) {
+		att = pa_min_sync_length[i].attr;
+		min = pa_min_sync_length[i].min_value;
+		ufshcd_dme_get(hba, UIC_ARG_MIB(att), &value);
+		if (value < min)
+			ufshcd_dme_set(hba, UIC_ARG_MIB(att), min);
+
+		ufshcd_dme_peer_get(hba, UIC_ARG_MIB(att), &value);
+		if (value < min)
+			ufshcd_dme_peer_set(hba, UIC_ARG_MIB(att), min);
+	}
+}
+
 static int ufs_mtk_pre_pwr_change(struct ufs_hba *hba,
 				const struct ufs_pa_layer_attr *dev_max_params,
 				struct ufs_pa_layer_attr *dev_req_params)
@@ -1355,6 +1385,8 @@ static int ufs_mtk_pre_pwr_change(struct ufs_hba *hba,
 	}
 
 	if (ufs_mtk_pmc_via_fastauto(hba, dev_req_params)) {
+		ufs_mtk_adjust_sync_length(hba);
+
 		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), true);
 		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), UFS_HS_G1);
 
diff --git a/include/ufs/unipro.h b/include/ufs/unipro.h
index 360e1245fb40..498ec9028b3c 100644
--- a/include/ufs/unipro.h
+++ b/include/ufs/unipro.h
@@ -111,6 +111,9 @@
 #define PA_TXLINKSTARTUPHS	0x1544
 #define PA_AVAILRXDATALANES	0x1540
 #define PA_MINRXTRAILINGCLOCKS	0x1543
+#define PA_TXHSG1SYNCLENGTH	0x1552
+#define PA_TXHSG2SYNCLENGTH	0x1554
+#define PA_TXHSG3SYNCLENGTH	0x1556
 #define PA_LOCAL_TX_LCC_ENABLE	0x155E
 #define PA_ACTIVETXDATALANES	0x1560
 #define PA_CONNECTEDTXDATALANES	0x1561
@@ -160,7 +163,9 @@
 #define PA_PACPFRAMECOUNT	0x15C0
 #define PA_PACPERRORCOUNT	0x15C1
 #define PA_PHYTESTCONTROL	0x15C2
-#define PA_TXHSADAPTTYPE       0x15D4
+#define PA_TXHSG4SYNCLENGTH	0x15D0
+#define PA_TXHSADAPTTYPE	0x15D4
+#define PA_TXHSG5SYNCLENGTH	0x15D6
 
 /* Adpat type for PA_TXHSADAPTTYPE attribute */
 #define PA_REFRESH_ADAPT       0x00
-- 
2.45.2

Re: [PATCH v1 05/10] ufs: host: mediatek: Adjust sync length for FASTAUTO mode

[Bart Van Assche]

On 9/18/25 3:36 AM, peter.wang@mediatek.com wrote:
> @@ -160,7 +163,9 @@
>   #define PA_PACPFRAMECOUNT	0x15C0
>   #define PA_PACPERRORCOUNT	0x15C1
>   #define PA_PHYTESTCONTROL	0x15C2
> -#define PA_TXHSADAPTTYPE       0x15D4
> +#define PA_TXHSG4SYNCLENGTH	0x15D0
> +#define PA_TXHSADAPTTYPE	0x15D4
> +#define PA_TXHSG5SYNCLENGTH	0x15D6
>   
>   /* Adpat type for PA_TXHSADAPTTYPE attribute */
>   #define PA_REFRESH_ADAPT       0x00

The "#define PA_TXHSADAPTTYPE	0x15D4" line shouldn't have been
changed. It seems like this patch changes the whitespace before the
"0x"?

Thanks,

Bart.

Re: [PATCH v1 05/10] ufs: host: mediatek: Adjust sync length for FASTAUTO mode

[Peter Wang (王信友)]

On Thu, 2025-09-18 at 12:28 -0700, Bart Van Assche wrote:
> On 9/18/25 3:36 AM, peter.wang@mediatek.com wrote:
> > @@ -160,7 +163,9 @@
> >   #define PA_PACPFRAMECOUNT   0x15C0
> >   #define PA_PACPERRORCOUNT   0x15C1
> >   #define PA_PHYTESTCONTROL   0x15C2
> > -#define PA_TXHSADAPTTYPE       0x15D4
> > +#define PA_TXHSG4SYNCLENGTH  0x15D0
> > +#define PA_TXHSADAPTTYPE     0x15D4
> > +#define PA_TXHSG5SYNCLENGTH  0x15D6
> > 
> >   /* Adpat type for PA_TXHSADAPTTYPE attribute */
> >   #define PA_REFRESH_ADAPT       0x00
> 
> The "#define PA_TXHSADAPTTYPE   0x15D4" line shouldn't have been
> changed. It seems like this patch changes the whitespace before the
> "0x"?
> 
> Thanks,
> 
> Bart.

Hi Bart,

Yes, the alignment was different from the other definitions,
so I changed the spaces to tabs for consistency. 
The content itself was not modified.

Thanks.
Peter

[PATCH v1 06/10] ufs: host: mediatek: Enable interrupts for MCQ mode

[peter.wang]

From: Alice Chao <alice.chao@mediatek.com>

Enable interrupts in MCQ mode before making the host
operational in the UFS Mediatek driver. This ensures proper
handling of task request completions and error conditions.

Signed-off-by: Peter Wang <peter.wang@mediatek.com>
Signed-off-by: Alice Chao <alice.chao@mediatek.com>
Reviewed-by: Peter Wang <peter.wang@mediatek.com>
---
 drivers/ufs/core/ufshcd.c       | 3 ++-
 drivers/ufs/host/ufs-mediatek.c | 2 ++
 drivers/ufs/host/ufs-mediatek.h | 3 +++
 include/ufs/ufshcd.h            | 1 +
 4 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c
index 4e0de3a6d9b6..4893838764ae 100644
--- a/drivers/ufs/core/ufshcd.c
+++ b/drivers/ufs/core/ufshcd.c
@@ -357,7 +357,7 @@ EXPORT_SYMBOL_GPL(ufshcd_disable_irq);
  * @hba: per adapter instance
  * @intrs: interrupt bits
  */
-static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
+void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
 {
 	u32 old_val = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
 	u32 new_val = old_val | intrs;
@@ -365,6 +365,7 @@ static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
 	if (new_val != old_val)
 		ufshcd_writel(hba, new_val, REG_INTERRUPT_ENABLE);
 }
+EXPORT_SYMBOL_GPL(ufshcd_enable_intr);
 
 /**
  * ufshcd_disable_intr - disable interrupts
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 851a4d839631..18ce985970f3 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -1683,6 +1683,8 @@ static int ufs_mtk_link_set_hpm(struct ufs_hba *hba)
 
 	if (hba->mcq_enabled) {
 		ufs_mtk_config_mcq(hba, false);
+		/* Enable required interrupts */
+		ufshcd_enable_intr(hba, UFSHCD_ENABLE_MTK_MCQ_INTRS);
 		ufshcd_mcq_make_queues_operational(hba);
 		ufshcd_mcq_config_mac(hba, hba->nutrs);
 		ufshcd_mcq_enable(hba);
diff --git a/drivers/ufs/host/ufs-mediatek.h b/drivers/ufs/host/ufs-mediatek.h
index dfbf78bd8664..73ab67448e87 100644
--- a/drivers/ufs/host/ufs-mediatek.h
+++ b/drivers/ufs/host/ufs-mediatek.h
@@ -14,6 +14,9 @@
 #define UFSHCD_MAX_Q_NR 8
 #define MTK_MCQ_INVALID_IRQ	0xFFFF
 
+#define UFSHCD_ENABLE_MTK_MCQ_INTRS	\
+				(UTP_TASK_REQ_COMPL | UFSHCD_ERROR_MASK)
+
 /* REG_UFS_MMIO_OPT_CTRL_0 160h */
 #define EHS_EN                  BIT(0)
 #define PFM_IMPV                BIT(1)
diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h
index a6ed7aa59533..109cbb36c02d 100644
--- a/include/ufs/ufshcd.h
+++ b/include/ufs/ufshcd.h
@@ -1496,5 +1496,6 @@ int ufshcd_update_ee_control(struct ufs_hba *hba, u16 *mask,
 			     const u16 *other_mask, u16 set, u16 clr);
 void ufshcd_force_error_recovery(struct ufs_hba *hba);
 void ufshcd_pm_qos_update(struct ufs_hba *hba, bool on);
+void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs);
 
 #endif /* End of Header */
-- 
2.45.2

Re: [PATCH v1 06/10] ufs: host: mediatek: Enable interrupts for MCQ mode

[Bart Van Assche]

On 9/18/25 3:36 AM, peter.wang@mediatek.com wrote:
> Enable interrupts in MCQ mode before making the host
> operational in the UFS Mediatek driver. This ensures proper
> handling of task request completions and error conditions.

All interrupt enable / disable code should occur in the UFS core driver.
Please do not add any code in host drivers that manipulates the
interrupt status.

Additionally, the above patch description doesn't make it clear what
makes the MediaTek driver different from other drivers and why only the
MediaTek driver needs this change.

Thanks,

Bart.

Re: [PATCH v1 06/10] ufs: host: mediatek: Enable interrupts for MCQ mode

[Peter Wang (王信友)]

On Thu, 2025-09-18 at 11:34 -0700, Bart Van Assche wrote:
> On 9/18/25 3:36 AM, peter.wang@mediatek.com wrote:
> > Enable interrupts in MCQ mode before making the host
> > operational in the UFS Mediatek driver. This ensures proper
> > handling of task request completions and error conditions.
> 
> All interrupt enable / disable code should occur in the UFS core
> driver.
> Please do not add any code in host drivers that manipulates the
> interrupt status.
> 

Hi Bart,

Because ufshcd_make_hba_operational only enables UFSHCD_ENABLE_INTRS,
there are no MCQ-related interrupts enabled.
MCQ interrupts are only enabled in ufshcd_config_mcq.
So, should we also add these MCQ interrupts in
ufshcd_make_hba_operational?


> Additionally, the above patch description doesn't make it clear what
> makes the MediaTek driver different from other drivers and why only
> the
> MediaTek driver needs this change.
> 
> Thanks,
> 
> Bart.


This is a confidential design by MediaTek, so we are unable
to share further details. We apologize for the inconvenience.

Thanks.
Peter

Re: [PATCH v1 06/10] ufs: host: mediatek: Enable interrupts for MCQ mode

[Bart Van Assche]

On 9/19/25 1:14 AM, Peter Wang (王信友) wrote:
> On Thu, 2025-09-18 at 11:34 -0700, Bart Van Assche wrote:
>> Additionally, the above patch description doesn't make it clear what
>> makes the MediaTek driver different from other drivers and why only
>> the
>> MediaTek driver needs this change.
> 
> This is a confidential design by MediaTek, so we are unable
> to share further details. We apologize for the inconvenience.

Having taken a closer look at this patch, the only reason I can think of
why interrupts are re-enabled from a .resume callback is a workaround
for a controller bug. Please consider adding a quirk and moving the code
that reenables interrupts into the UFSHCI core instead of exporting the
ufshcd_enable_intr() function. I'm concerned that exporting
ufshcd_enable_intr() would make the UFSHCI driver much harder to
maintain than necessary, especially if this would lead to concurrent
writes to the REG_INTERRUPT_ENABLE register.

Thanks,

Bart.

Re: [PATCH v1 06/10] ufs: host: mediatek: Enable interrupts for MCQ mode

[Peter Wang (王信友)]

On Fri, 2025-09-19 at 14:09 -0700, Bart Van Assche wrote:
> 
> Having taken a closer look at this patch, the only reason I can think
> of
> why interrupts are re-enabled from a .resume callback is a workaround
> for a controller bug. Please consider adding a quirk and moving the
> code
> that reenables interrupts into the UFSHCI core instead of exporting
> the
> ufshcd_enable_intr() function. I'm concerned that exporting
> ufshcd_enable_intr() would make the UFSHCI driver much harder to
> maintain than necessary, especially if this would lead to concurrent
> writes to the REG_INTERRUPT_ENABLE register.
> 
> Thanks,
> 
> Bart.

Hi Bart,

If it were a bug, I would say it’s a MediaTek SoC limitation :)
But it’s definitely not a bug or a limitation.
Honestly, it’s our low power technology, which requires a 
software flow to re-enable IRQ after resume.

So, maybe re-enabling MCQ IRQs the same way as legacy IRQs 
in ufshcd_make_hba_operational would be better.
What do you think? like below patch

@@ -355,9 +355,15 @@ EXPORT_SYMBOL_GPL(ufshcd_mcq_poll_cqe_lock);
 void ufshcd_mcq_make_queues_operational(struct ufs_hba *hba)
 {
        struct ufs_hw_queue *hwq;
+       u32 intrs;
        u16 qsize;
        int i;

+       intrs = UFSHCD_ENABLE_MCQ_INTRS;
+       if (hba->quirks & UFSHCD_QUIRK_MCQ_BROKEN_INTR)
+               intrs &= ~MCQ_CQ_EVENT_STATUS;
+       ufshcd_enable_intr(hba, intrs);
+
        for (i = 0; i < hba->nr_hw_queues; i++) {

Thansk.
Peter

Re: [PATCH v1 06/10] ufs: host: mediatek: Enable interrupts for MCQ mode

[Bart Van Assche]

On 9/22/25 1:41 AM, Peter Wang (王信友) wrote:
> So, maybe re-enabling MCQ IRQs the same way as legacy IRQs
> in ufshcd_make_hba_operational would be better.
> What do you think? like below patch
> 
> @@ -355,9 +355,15 @@ EXPORT_SYMBOL_GPL(ufshcd_mcq_poll_cqe_lock);
>   void ufshcd_mcq_make_queues_operational(struct ufs_hba *hba)
>   {
>          struct ufs_hw_queue *hwq;
> +       u32 intrs;
>          u16 qsize;
>          int i;
> 
> +       intrs = UFSHCD_ENABLE_MCQ_INTRS;
> +       if (hba->quirks & UFSHCD_QUIRK_MCQ_BROKEN_INTR)
> +               intrs &= ~MCQ_CQ_EVENT_STATUS;
> +       ufshcd_enable_intr(hba, intrs);
> +
>          for (i = 0; i < hba->nr_hw_queues; i++) {

Thanks, this looks better to me.

If an ufshcd_enable_intr() call is added in 
ufshcd_mcq_make_queues_operational(), shouldn't the ufshcd_enable_intr()
call be removed from ufshcd_config_mcq()?

Thanks,

Bart.

Re: [PATCH v1 06/10] ufs: host: mediatek: Enable interrupts for MCQ mode

[Peter Wang (王信友)]

On Mon, 2025-09-22 at 12:26 -0700, Bart Van Assche wrote:
> > < hba->nr_hw_queues; i++) {
> 
> Thanks, this looks better to me.
> 
> If an ufshcd_enable_intr() call is added in
> ufshcd_mcq_make_queues_operational(), shouldn't the
> ufshcd_enable_intr()
> call be removed from ufshcd_config_mcq()?
> 
> Thanks,
> 
> Bart.

Hi Bart,

Yes, it should be removed as well.
I will submit another patch for this.

Thanks
Peter

[PATCH v1 07/10] ufs: host: mediatek: Fix shutdown/suspend race condition

[peter.wang]

From: Peter Wang <peter.wang@mediatek.com>

Address a race condition between shutdown and suspend
operations in the UFS Mediatek driver. Before entering
suspend, check if a shutdown is in progress to prevent
conflicts and ensure system stability.

Signed-off-by: Peter Wang <peter.wang@mediatek.com>
---
 drivers/ufs/core/ufshcd-priv.h  | 5 -----
 drivers/ufs/host/ufs-mediatek.c | 6 ++++++
 include/ufs/ufshcd.h            | 5 +++++
 3 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/drivers/ufs/core/ufshcd-priv.h b/drivers/ufs/core/ufshcd-priv.h
index d0a2c963a27d..3ab50ece5abf 100644
--- a/drivers/ufs/core/ufshcd-priv.h
+++ b/drivers/ufs/core/ufshcd-priv.h
@@ -6,11 +6,6 @@
 #include <linux/pm_runtime.h>
 #include <ufs/ufshcd.h>
 
-static inline bool ufshcd_is_user_access_allowed(struct ufs_hba *hba)
-{
-	return !hba->shutting_down;
-}
-
 void ufshcd_schedule_eh_work(struct ufs_hba *hba);
 
 static inline bool ufshcd_keep_autobkops_enabled_except_suspend(
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 18ce985970f3..c56c85b55ba4 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -2433,6 +2433,12 @@ static int ufs_mtk_system_suspend(struct device *dev)
 	struct arm_smccc_res res;
 	int ret;
 
+	/* Check if shutting down */
+	if (!ufshcd_is_user_access_allowed(hba)) {
+		ret = -EBUSY;
+		goto out;
+	}
+
 	ret = ufshcd_system_suspend(dev);
 	if (ret)
 		goto out;
diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h
index 109cbb36c02d..7df475ebd06d 100644
--- a/include/ufs/ufshcd.h
+++ b/include/ufs/ufshcd.h
@@ -1436,6 +1436,11 @@ static inline int ufshcd_disable_host_tx_lcc(struct ufs_hba *hba)
 	return ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0);
 }
 
+static inline bool ufshcd_is_user_access_allowed(struct ufs_hba *hba)
+{
+	return !hba->shutting_down;
+}
+
 void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit);
 void ufshcd_fixup_dev_quirks(struct ufs_hba *hba,
 			     const struct ufs_dev_quirk *fixups);
-- 
2.45.2

Re: [PATCH v1 07/10] ufs: host: mediatek: Fix shutdown/suspend race condition

[Bart Van Assche]

On 9/18/25 3:36 AM, peter.wang@mediatek.com wrote:
> diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h
> index 109cbb36c02d..7df475ebd06d 100644
> --- a/include/ufs/ufshcd.h
> +++ b/include/ufs/ufshcd.h
> @@ -1436,6 +1436,11 @@ static inline int ufshcd_disable_host_tx_lcc(struct ufs_hba *hba)
>   	return ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0);
>   }
>   
> +static inline bool ufshcd_is_user_access_allowed(struct ufs_hba *hba)
> +{
> +	return !hba->shutting_down;
> +}
> +

Please do not move the ufshcd_is_user_access_allowed() definition - I'd
like to remove this function. Please either use hba->shutting_down
directly or add a .shutdown callback in ufs_mtk_pltform.

Thanks,

Bart.

Re: [PATCH v1 07/10] ufs: host: mediatek: Fix shutdown/suspend race condition

[Peter Wang (王信友)]

On Thu, 2025-09-18 at 11:39 -0700, Bart Van Assche wrote:
> On 9/18/25 3:36 AM, peter.wang@mediatek.com wrote:
> > diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h
> > index 109cbb36c02d..7df475ebd06d 100644
> > --- a/include/ufs/ufshcd.h
> > +++ b/include/ufs/ufshcd.h
> > @@ -1436,6 +1436,11 @@ static inline int
> > ufshcd_disable_host_tx_lcc(struct ufs_hba *hba)
> >       return ufshcd_dme_set(hba,
> > UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0);
> >   }
> > 
> > +static inline bool ufshcd_is_user_access_allowed(struct ufs_hba
> > *hba)
> > +{
> > +     return !hba->shutting_down;
> > +}
> > +
> 
> Please do not move the ufshcd_is_user_access_allowed() definition -
> I'd
> like to remove this function. Please either use hba->shutting_down
> directly or add a .shutdown callback in ufs_mtk_pltform.
> 
> Thanks,
> 
> Bart.

Hi Bart,

Okay, I will use hba->shutting_down directly.
By the way, could I know the reason why you want to
remove ufshcd_is_user_access_allowed?

Thanks.
Peter

Re: [PATCH v1 07/10] ufs: host: mediatek: Fix shutdown/suspend race condition

[Bart Van Assche]

On 9/19/25 1:15 AM, Peter Wang (王信友) wrote:
> By the way, could I know the reason why you want to
> remove ufshcd_is_user_access_allowed?

The name of that function is longer than its implementation.
Hence, code readability will probably improve if calls to that
function are replaced with the body of that function.

Thanks,

Bart.

[PATCH v1 08/10] ufs: host: mediatek: Remove duplicate function

[peter.wang]

From: Peter Wang <peter.wang@mediatek.com>

Remove the duplicate ufs_mtk_us_to_ahit function in the UFS
Mediatek driver and export the existing ufshcd_us_to_ahit
function for shared use. This change reduces redundancy
and maintains consistency across the codebase.

Signed-off-by: Peter Wang <peter.wang@mediatek.com>
---
 drivers/ufs/core/ufs-sysfs.c    |  3 ++-
 drivers/ufs/host/ufs-mediatek.c | 14 +-------------
 include/ufs/ufshcd.h            |  1 +
 3 files changed, 4 insertions(+), 14 deletions(-)

diff --git a/drivers/ufs/core/ufs-sysfs.c b/drivers/ufs/core/ufs-sysfs.c
index 4bd7d491e3c5..0fb236ce7f4c 100644
--- a/drivers/ufs/core/ufs-sysfs.c
+++ b/drivers/ufs/core/ufs-sysfs.c
@@ -235,7 +235,7 @@ static int ufshcd_ahit_to_us(u32 ahit)
 }
 
 /* Convert microseconds to Auto-Hibernate Idle Timer register value */
-static u32 ufshcd_us_to_ahit(unsigned int timer)
+u32 ufshcd_us_to_ahit(unsigned int timer)
 {
 	unsigned int scale;
 
@@ -245,6 +245,7 @@ static u32 ufshcd_us_to_ahit(unsigned int timer)
 	return FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, timer) |
 	       FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, scale);
 }
+EXPORT_SYMBOL_GPL(ufshcd_us_to_ahit);
 
 static int ufshcd_read_hci_reg(struct ufs_hba *hba, u32 *val, unsigned int reg)
 {
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index c56c85b55ba4..5aa42b8caa3b 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -1109,18 +1109,6 @@ static void ufs_mtk_setup_clk_gating(struct ufs_hba *hba)
 	}
 }
 
-/* Convert microseconds to Auto-Hibernate Idle Timer register value */
-static u32 ufs_mtk_us_to_ahit(unsigned int timer)
-{
-	unsigned int scale;
-
-	for (scale = 0; timer > UFSHCI_AHIBERN8_TIMER_MASK; ++scale)
-		timer /= UFSHCI_AHIBERN8_SCALE_FACTOR;
-
-	return FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, timer) |
-	       FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, scale);
-}
-
 static void ufs_mtk_fix_ahit(struct ufs_hba *hba)
 {
 	unsigned int us;
@@ -1143,7 +1131,7 @@ static void ufs_mtk_fix_ahit(struct ufs_hba *hba)
 			break;
 		}
 
-		hba->ahit = ufs_mtk_us_to_ahit(us);
+		hba->ahit = ufshcd_us_to_ahit(us);
 	}
 
 	ufs_mtk_setup_clk_gating(hba);
diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h
index 7df475ebd06d..27a88f0966ac 100644
--- a/include/ufs/ufshcd.h
+++ b/include/ufs/ufshcd.h
@@ -1502,5 +1502,6 @@ int ufshcd_update_ee_control(struct ufs_hba *hba, u16 *mask,
 void ufshcd_force_error_recovery(struct ufs_hba *hba);
 void ufshcd_pm_qos_update(struct ufs_hba *hba, bool on);
 void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs);
+u32 ufshcd_us_to_ahit(unsigned int timer);
 
 #endif /* End of Header */
-- 
2.45.2

Re: [PATCH v1 08/10] ufs: host: mediatek: Remove duplicate function

[Bart Van Assche]

On 9/18/25 3:36 AM, peter.wang@mediatek.com wrote:
> Remove the duplicate ufs_mtk_us_to_ahit function in the UFS
> Mediatek driver and export the existing ufshcd_us_to_ahit
> function for shared use. This change reduces redundancy
> and maintains consistency across the codebase.

Reviewed-by: Bart Van Assche <bvanassche@acm.org>

[PATCH v1 09/10] ufs: host: mediatek: Add support for new platform with MMIO_OTSD_CTR

[peter.wang]

From: Peter Wang <peter.wang@mediatek.com>

Introduce support for a new UFS Mediatek platform by adding
the REG_UFS_UFS_MMIO_OTSD_CTRL register. This update includes
checks for legacy platforms and uses the new register to
replace debug selection and handle specific operations.
The changes ensure compatibility across different hardware
versions and prevent potential issues with debug usage on
newer platforms.

Additional updates include error logging improvements
during link setup for newer and legacy platforms, ensuring
proper event logging and debugging.

Signed-off-by: Peter Wang <peter.wang@mediatek.com>
---
 drivers/ufs/host/ufs-mediatek.c | 42 +++++++++++++++++++++++++++------
 drivers/ufs/host/ufs-mediatek.h |  1 +
 2 files changed, 36 insertions(+), 7 deletions(-)

diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 5aa42b8caa3b..0cc372e0ac75 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -280,6 +280,9 @@ static int ufs_mtk_hce_enable_notify(struct ufs_hba *hba,
 			      ufshcd_readl(hba, REG_UFS_XOUFS_CTRL) | 0x80,
 			      REG_UFS_XOUFS_CTRL);
 
+		if (host->legacy_ip_ver)
+			return 0;
+
 		/* DDR_EN setting */
 		if (host->ip_ver >= IP_VER_MT6989) {
 			ufshcd_rmwl(hba, UFS_MASK(0x7FFF, 8),
@@ -405,7 +408,7 @@ static void ufs_mtk_dbg_sel(struct ufs_hba *hba)
 {
 	struct ufs_mtk_host *host = ufshcd_get_variant(hba);
 
-	if (((host->ip_ver >> 16) & 0xFF) >= 0x36) {
+	if (!host->legacy_ip_ver && host->ip_ver >= IP_VER_MT6983) {
 		ufshcd_writel(hba, 0x820820, REG_UFS_DEBUG_SEL);
 		ufshcd_writel(hba, 0x0, REG_UFS_DEBUG_SEL_B0);
 		ufshcd_writel(hba, 0x55555555, REG_UFS_DEBUG_SEL_B1);
@@ -422,6 +425,7 @@ static int ufs_mtk_wait_idle_state(struct ufs_hba *hba,
 	u64 timeout, time_checked;
 	u32 val, sm;
 	bool wait_idle;
+	struct ufs_mtk_host *host = ufshcd_get_variant(hba);
 
 	/* cannot use plain ktime_get() in suspend */
 	timeout = ktime_get_mono_fast_ns() + retry_ms * 1000000UL;
@@ -432,8 +436,13 @@ static int ufs_mtk_wait_idle_state(struct ufs_hba *hba,
 
 	do {
 		time_checked = ktime_get_mono_fast_ns();
-		ufs_mtk_dbg_sel(hba);
-		val = ufshcd_readl(hba, REG_UFS_PROBE);
+		if (host->legacy_ip_ver || host->ip_ver < IP_VER_MT6899) {
+			ufs_mtk_dbg_sel(hba);
+			val = ufshcd_readl(hba, REG_UFS_PROBE);
+		} else {
+			val = ufshcd_readl(hba, REG_UFS_UFS_MMIO_OTSD_CTRL);
+			val = val >> 16;
+		}
 
 		sm = val & 0x1f;
 
@@ -465,13 +474,20 @@ static int ufs_mtk_wait_link_state(struct ufs_hba *hba, u32 state,
 {
 	ktime_t timeout, time_checked;
 	u32 val;
+	struct ufs_mtk_host *host = ufshcd_get_variant(hba);
 
 	timeout = ktime_add_ms(ktime_get(), max_wait_ms);
 	do {
 		time_checked = ktime_get();
-		ufs_mtk_dbg_sel(hba);
-		val = ufshcd_readl(hba, REG_UFS_PROBE);
-		val = val >> 28;
+
+		if (host->legacy_ip_ver || host->ip_ver < IP_VER_MT6899) {
+			ufs_mtk_dbg_sel(hba);
+			val = ufshcd_readl(hba, REG_UFS_PROBE);
+			val = val >> 28;
+		} else {
+			val = ufshcd_readl(hba, REG_UFS_UFS_MMIO_OTSD_CTRL);
+			val = val >> 24;
+		}
 
 		if (val == state)
 			return 0;
@@ -1639,14 +1655,26 @@ static int ufs_mtk_device_reset(struct ufs_hba *hba)
 static int ufs_mtk_link_set_hpm(struct ufs_hba *hba)
 {
 	int err;
+	u32 val;
+	struct ufs_mtk_host *host = ufshcd_get_variant(hba);
 
 	err = ufshcd_hba_enable(hba);
 	if (err)
 		return err;
 
 	err = ufs_mtk_unipro_set_lpm(hba, false);
-	if (err)
+	if (err) {
+		if (host->ip_ver < IP_VER_MT6899) {
+			ufs_mtk_dbg_sel(hba);
+			val = ufshcd_readl(hba, REG_UFS_PROBE);
+		} else {
+			val = ufshcd_readl(hba, REG_UFS_UFS_MMIO_OTSD_CTRL);
+		}
+		ufshcd_update_evt_hist(hba, UFS_EVT_RESUME_ERR, (u32)val);
+		val = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
+		ufshcd_update_evt_hist(hba, UFS_EVT_RESUME_ERR, (u32)val);
 		return err;
+	}
 
 	err = ufshcd_uic_hibern8_exit(hba);
 	if (err)
diff --git a/drivers/ufs/host/ufs-mediatek.h b/drivers/ufs/host/ufs-mediatek.h
index 73ab67448e87..32687dd12527 100644
--- a/drivers/ufs/host/ufs-mediatek.h
+++ b/drivers/ufs/host/ufs-mediatek.h
@@ -31,6 +31,7 @@
  */
 #define REG_UFS_XOUFS_CTRL          0x140
 #define REG_UFS_REFCLK_CTRL         0x144
+#define REG_UFS_UFS_MMIO_OTSD_CTRL  0x14C
 #define REG_UFS_MMIO_OPT_CTRL_0     0x160
 #define REG_UFS_EXTREG              0x2100
 #define REG_UFS_MPHYCTRL            0x2200
-- 
2.45.2

[PATCH v1 10/10] ufs: host: mediatek: Support new feature for MT6991

[peter.wang]

From: Naomi Chu <naomi.chu@mediatek.com>

Add support for the MT6991 platform by enabling MRTT settings
and random performance improvements. These enhancements aim
to optimize performance and efficiency on the MT6991 hardware.

Enable multi-Round Trip Time (MRTT) for improved data handling.
Enable random performance improvement features to boost
overall system responsiveness.

Signed-off-by: Peter Wang <peter.wang@mediatek.com>
Signed-off-by: Naomi Chu <naomi.chu@mediatek.com>
Reviewed-by: Peter Wang <peter.wang@mediatek.com>
---
 drivers/ufs/host/ufs-mediatek.c | 6 ++++++
 drivers/ufs/host/ufs-mediatek.h | 3 +++
 2 files changed, 9 insertions(+)

diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 0cc372e0ac75..f62f08cdfcbc 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -289,6 +289,12 @@ static int ufs_mtk_hce_enable_notify(struct ufs_hba *hba,
 				0x453000, REG_UFS_MMIO_OPT_CTRL_0);
 		}
 
+		if (host->ip_ver >= IP_VER_MT6991_A0) {
+			/* Enable multi-rtt */
+			ufshcd_rmwl(hba, MRTT_EN, MRTT_EN, REG_UFS_MMIO_OPT_CTRL_0);
+			/* Enable random performance improvement */
+			ufshcd_rmwl(hba, RDN_PFM_IMPV_DIS, 0, REG_UFS_MMIO_OPT_CTRL_0);
+		}
 	}
 
 	return 0;
diff --git a/drivers/ufs/host/ufs-mediatek.h b/drivers/ufs/host/ufs-mediatek.h
index 32687dd12527..db9f21ef481c 100644
--- a/drivers/ufs/host/ufs-mediatek.h
+++ b/drivers/ufs/host/ufs-mediatek.h
@@ -23,6 +23,9 @@
 #define MCQ_MULTI_INTR_EN       BIT(2)
 #define MCQ_CMB_INTR_EN         BIT(3)
 #define MCQ_AH8                 BIT(4)
+#define MON_EN                  BIT(5)
+#define MRTT_EN                 BIT(25)
+#define RDN_PFM_IMPV_DIS        BIT(28)
 
 #define MCQ_INTR_EN_MSK         (MCQ_MULTI_INTR_EN | MCQ_CMB_INTR_EN)
 
-- 
2.45.2

Re: [PATCH v1 10/10] ufs: host: mediatek: Support new feature for MT6991

[Bart Van Assche]

On 9/18/25 3:36 AM, peter.wang@mediatek.com wrote:
> Enable random performance improvement features to boost
> overall system responsiveness.

I think that you meant "random I/O performance improvement" instead
of "random performance improvement".

Thanks,

Bart.

Re: [PATCH v1 10/10] ufs: host: mediatek: Support new feature for MT6991

[Peter Wang (王信友)]

On Thu, 2025-09-18 at 12:32 -0700, Bart Van Assche wrote:
> On 9/18/25 3:36 AM, peter.wang@mediatek.com wrote:
> > Enable random performance improvement features to boost
> > overall system responsiveness.
> 
> I think that you meant "random I/O performance improvement" instead
> of "random performance improvement".
> 
> Thanks,
> 
> Bart.


Hi Bart,

Yes, you are correct. Sorry, since this is a storage patch,
I often omit "IO" in casual conversation.
I will correct it in the next version.


Thanks.
Peter