From: "CK Hu (胡俊光)" <ck.hu@mediatek.com>
To: "robh@kernel.org" <robh@kernel.org>,
"krzk+dt@kernel.org" <krzk+dt@kernel.org>,
"Paul-pl Chen (陳柏霖)" <Paul-pl.Chen@mediatek.com>,
"conor+dt@kernel.org" <conor+dt@kernel.org>,
"AngeloGioacchino Del Regno"
<angelogioacchino.delregno@collabora.com>,
"chunkuang.hu@kernel.org" <chunkuang.hu@kernel.org>
Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"Xiandong Wang (王先冬)" <Xiandong.Wang@mediatek.com>,
"Jason-JH Lin (林睿祥)" <Jason-JH.Lin@mediatek.com>,
"Singo Chang (張興國)" <Singo.Chang@mediatek.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>,
Project_Global_Chrome_Upstream_Group
<Project_Global_Chrome_Upstream_Group@mediatek.com>,
"treapking@chromium.org" <treapking@chromium.org>,
"Nancy Lin (林欣螢)" <Nancy.Lin@mediatek.com>,
"linux-mediatek@lists.infradead.org"
<linux-mediatek@lists.infradead.org>,
"Sunny Shen (沈姍姍)" <Sunny.Shen@mediatek.com>,
"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
"Sirius Wang (王皓昱)" <Sirius.Wang@mediatek.com>,
"matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
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<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v3 11/17] drm/mediatek: drm/mediatek: Export OVL ignore pixel alpha function
Date: Tue, 17 Jun 2025 06:06:55 +0000 [thread overview]
Message-ID: <5fc19e0e92ab9e68da097077367f0a9b5b59a343.camel@mediatek.com> (raw)
In-Reply-To: <20250515093454.1729720-12-paul-pl.chen@mediatek.com>
On Thu, 2025-05-15 at 17:34 +0800, paul-pl.chen wrote:
> From: Nancy Lin <nancy.lin@mediatek.com>
>
> For the new BLENDER component, the OVL ignore pixel alpha logic
> should be exported as a function and reused it.
>
> Signed-off-by: Nancy Lin <nancy.lin@mediatek.com>
> Signed-off-by: Paul-pl Chen <paul-pl.chen@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 24 ++++++++++++++++++++++--
> drivers/gpu/drm/mediatek/mtk_disp_ovl.h | 1 +
> 2 files changed, 23 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> index a516b7c82b5a..747898a574da 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> @@ -211,6 +211,23 @@ void mtk_ovl_disable_vblank(struct device *dev)
> writel_relaxed(0x0, ovl->regs + DISP_REG_OVL_INTEN);
> }
>
> +bool mtk_ovl_is_ignore_pixel_alpha(struct mtk_plane_state *state, unsigned int blend_mode)
> +{
> + if (!state->base.fb)
> + return false;
> + /*
> + * Although the alpha channel can be ignored, CONST_BLD must be enabled
> + * for XRGB format, otherwise OVL will still read the value from memory.
> + * For RGB888 related formats, whether CONST_BLD is enabled or not won't
> + * affect the result. Therefore we use !has_alpha as the condition.
> + */
> +
> + if (blend_mode == DRM_MODE_BLEND_PIXEL_NONE || !state->base.fb->format->has_alpha)
> + return true;
> +
> + return false;
> +}
> +
> u32 mtk_ovl_get_blend_modes(struct device *dev)
> {
> struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);
> @@ -539,7 +556,7 @@ void mtk_ovl_layer_config(struct device *dev, unsigned int idx,
> unsigned int rotation = pending->rotation;
> unsigned int offset = (pending->y << 16) | pending->x;
> unsigned int src_size = (pending->height << 16) | pending->width;
> - unsigned int blend_mode = state->base.pixel_blend_mode;
> + unsigned int blend_mode = mtk_ovl_get_blend_mode(state, ovl->data->blend_modes);
I would like previous patch is about color format and this patch is about alpha blend.
You add mtk_ovl_get_blend_mode() in previous patch.
So remove mtk_ovl_get_blend_mode() in previous patch and add it in this patch.
In original design, blend_mode is only changed in mtk_ovl_format_convert(),
but this patch chagne blend_mode in mtk_ovl_layer_config().
In order to keep original behavior,
In below, where using blend_mode is chagned to use state->base.pixel_blend_mode,
so it's not necessary to have a variable blend_mode.
Regards,
CK
> unsigned int ignore_pixel_alpha = 0;
> unsigned int con;
>
> @@ -557,7 +574,7 @@ void mtk_ovl_layer_config(struct device *dev, unsigned int idx,
> * For blend_modes supported SoCs, always enable alpha blending.
> * For blend_modes unsupported SoCs, enable alpha blending when has_alpha is set.
> */
> - if (blend_mode || state->base.fb->format->has_alpha)
> + if (state->base.pixel_blend_mode || state->base.fb->format->has_alpha)
> con |= OVL_CON_AEN;
> }
>
> @@ -584,6 +601,9 @@ void mtk_ovl_layer_config(struct device *dev, unsigned int idx,
>
> mtk_ddp_write_relaxed(cmdq_pkt, con, &ovl->cmdq_reg, ovl->regs,
> DISP_REG_OVL_CON(idx));
> +
> + if (mtk_ovl_is_ignore_pixel_alpha(state, blend_mode))
> + ignore_pixel_alpha = OVL_CONST_BLEND;
> mtk_ddp_write_relaxed(cmdq_pkt, pitch_lsb | ignore_pixel_alpha,
> &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_PITCH(idx));
> mtk_ddp_write_relaxed(cmdq_pkt, src_size, &ovl->cmdq_reg, ovl->regs,
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.h b/drivers/gpu/drm/mediatek/mtk_disp_ovl.h
> index 3f7d7d54479d..431567538eb5 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.h
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.h
> @@ -20,6 +20,7 @@ extern const u32 mt8195_ovl_formats[];
> extern const size_t mt8195_ovl_formats_len;
>
> bool mtk_ovl_is_10bit_rgb(unsigned int fmt);
> +bool mtk_ovl_is_ignore_pixel_alpha(struct mtk_plane_state *state, unsigned int blend_mode);
> unsigned int mtk_ovl_get_blend_mode(struct mtk_plane_state *state, unsigned int blend_modes);
> unsigned int mtk_ovl_fmt_convert(unsigned int fmt, unsigned int blend_mode,
> bool fmt_rgb565_is_0, bool color_convert,
next prev parent reply other threads:[~2025-06-17 6:13 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-15 9:34 [PATCH v3 00/17] Add MediaTek SoC DRM support for MT8196 paul-pl.chen
2025-05-15 9:34 ` [PATCH v3 01/17] dt-bindings: soc: mediatek: add mutex yaml " paul-pl.chen
2025-05-15 9:34 ` [PATCH v3 02/17] dt-bindings: display: mediatek: add EXDMA " paul-pl.chen
2025-05-15 10:48 ` Rob Herring (Arm)
2025-06-26 9:10 ` CK Hu (胡俊光)
2025-05-15 9:34 ` [PATCH v3 03/17] dt-bindings: display: mediatek: add BLENDER " paul-pl.chen
2025-05-19 6:41 ` Krzysztof Kozlowski
2025-05-15 9:34 ` [PATCH v3 04/17] dt-bindings: display: mediatek: add OUTPROC " paul-pl.chen
2025-05-19 6:43 ` Krzysztof Kozlowski
2025-05-15 9:34 ` [PATCH v3 05/17] soc: mediatek: Add runtime PM and top clocks and async controls for MMSYS paul-pl.chen
2025-05-15 9:34 ` [PATCH v3 06/17] soc: mediatek: add mmsys support for MT8196 paul-pl.chen
2025-05-15 9:34 ` [PATCH v3 07/17] soc: mediatek: mutex: Reused the switch case for SOF ID paul-pl.chen
2025-05-15 9:34 ` [PATCH v3 08/17] soc: mediatek: mutex: refactor SOF settings for output components paul-pl.chen
2025-05-15 9:34 ` [PATCH v3 09/17] soc: mediatek: mutex: add mutex support for MT8196 paul-pl.chen
2025-05-15 9:34 ` [PATCH v3 10/17] drm/mediatek: Export OVL formats definitions and format conversion API paul-pl.chen
2025-06-17 5:43 ` CK Hu (胡俊光)
2025-06-17 6:47 ` CK Hu (胡俊光)
2025-05-15 9:34 ` [PATCH v3 11/17] drm/mediatek: drm/mediatek: Export OVL ignore pixel alpha function paul-pl.chen
2025-06-17 6:06 ` CK Hu (胡俊光) [this message]
2025-05-15 9:34 ` [PATCH v3 12/17] drm/mediatek: add EXDMA support for MT8196 paul-pl.chen
2025-06-17 9:17 ` CK Hu (胡俊光)
2025-07-04 6:26 ` Paul-pl Chen (陳柏霖)
2025-05-15 9:34 ` [PATCH v3 13/17] drm/mediatek: add BLENDER " paul-pl.chen
2025-06-18 6:40 ` CK Hu (胡俊光)
2025-07-04 6:36 ` Paul-pl Chen (陳柏霖)
2025-05-15 9:34 ` [PATCH v3 14/17] drm/mediatek: add OUTPROC " paul-pl.chen
2025-06-18 8:23 ` CK Hu (胡俊光)
2025-07-04 7:24 ` Paul-pl Chen (陳柏霖)
2025-05-15 9:34 ` [PATCH v3 15/17] drm/mediatek: add ovlsys_adaptor " paul-pl.chen
2025-05-16 6:34 ` kernel test robot
2025-06-24 5:46 ` CK Hu (胡俊光)
2025-05-15 9:34 ` [PATCH v3 16/17] drm/mediatek: Add support for multiple mmsys in the one mediatek-drm driver paul-pl.chen
2025-05-16 7:36 ` kernel test robot
2025-06-24 5:49 ` CK Hu (胡俊光)
2025-05-15 9:34 ` [PATCH v3 17/17] drm/mediatek: Add support for MT8196 multiple mmsys paul-pl.chen
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