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From: "Paul-pl Chen (陳柏霖)" <Paul-pl.Chen@mediatek.com>
To: "CK Hu (胡俊光)" <ck.hu@mediatek.com>,
	"robh@kernel.org" <robh@kernel.org>,
	"krzk+dt@kernel.org" <krzk+dt@kernel.org>,
	"conor+dt@kernel.org" <conor+dt@kernel.org>,
	"chunkuang.hu@kernel.org" <chunkuang.hu@kernel.org>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>
Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"Xiandong Wang (王先冬)" <Xiandong.Wang@mediatek.com>,
	"Jason-JH Lin (林睿祥)" <Jason-JH.Lin@mediatek.com>,
	"Singo Chang (張興國)" <Singo.Chang@mediatek.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	Project_Global_Chrome_Upstream_Group
	<Project_Global_Chrome_Upstream_Group@mediatek.com>,
	"treapking@chromium.org" <treapking@chromium.org>,
	"Nancy Lin (林欣螢)" <Nancy.Lin@mediatek.com>,
	"linux-mediatek@lists.infradead.org"
	<linux-mediatek@lists.infradead.org>,
	"Sunny Shen (沈姍姍)" <Sunny.Shen@mediatek.com>,
	"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
	"Sirius Wang (王皓昱)" <Sirius.Wang@mediatek.com>,
	"matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v3 14/17] drm/mediatek: add OUTPROC support for MT8196
Date: Fri, 4 Jul 2025 07:24:40 +0000	[thread overview]
Message-ID: <a05242578fab11f76873e39129066b58c2a0a126.camel@mediatek.com> (raw)
In-Reply-To: <778e9796ed50d8f9aaf11b6f1fa1f19386eb71d6.camel@mediatek.com>

On Wed, 2025-06-18 at 08:23 +0000, CK Hu (胡俊光) wrote:
> On Thu, 2025-05-15 at 17:34 +0800, paul-pl.chen wrote:
> > From: Nancy Lin <nancy.lin@mediatek.com>
> > 
> > OUTPROC handles the post-stage of pixel processing in
> > the overlapping procedure.OUTPROC manages pixels for
> > gamma correction and ensures that pixel values are
> > within the correct range.
> > 
> > Signed-off-by: Nancy Lin <nancy.lin@mediatek.com>
> > Signed-off-by: Paul-pl Chen <paul-pl.chen@mediatek.com>
> > ---
> 
> [snip]
> 
> > +void mtk_disp_outproc_config(struct device *dev, unsigned int w,
> > +			     unsigned int h, unsigned int
> > vrefresh,
> > +			     unsigned int bpc, struct cmdq_pkt
> > *cmdq_pkt)
> > +{
> > +	struct mtk_disp_outproc *priv = dev_get_drvdata(dev);
> > +	u32 tmp;
> > +
> > +	dev_dbg(dev, "%s-w:%d, h:%d\n", __func__, w, h);
> > +
> > +	writel((h << 16) | w, priv->regs +
> > DISP_REG_OVL_OUTPROC_ROI_SIZE);
> > +
> > +	tmp = readl(priv->regs +
> > DISP_REG_OVL_OUTPROC_DATAPATH_CON);
> > +	tmp = (tmp & ~OVL_OUTPROC_DATAPATH_CON_OUTPUT_CLAMP) |
> > +		  (OVL_OUTPROC_DATAPATH_CON_OUTPUT_CLAMP &
> > OVL_OUTPROC_DATAPATH_CON_OUTPUT_CLAMP);
> 
> This would simplified as
> 
> tmp |= OVL_OUTPROC_DATAPATH_CON_OUTPUT_CLAMP;
> 

OK, I will refine the code to simplify this part.

> > +	writel(tmp, priv->regs +
> > DISP_REG_OVL_OUTPROC_DATAPATH_CON);
> > +}
> > +
> > +void mtk_disp_outproc_start(struct device *dev)
> > +{
> > +	struct mtk_disp_outproc *priv = dev_get_drvdata(dev);
> > +	unsigned int tmp;
> > +
> > +	tmp = readl(priv->regs +
> > DISP_REG_OVL_OUTPROC_SHADOW_CTRL);
> > +	tmp = tmp | OVL_OUTPROC_BYPASS_SHADOW;
> 
> tmp |= OVL_OUTPROC_BYPASS_SHADOW;

Understood, I will refine the code to simplify this part.
> 
> > +	writel(tmp, priv->regs +
> > DISP_REG_OVL_OUTPROC_SHADOW_CTRL);
> > +
> > +	writel(0, priv->regs + DISP_REG_OVL_OUTPROC_INTSTA);
> 
> To align OVL driver, clear interrupt status in enable_vblank()
> function.
> 
> 

Understood, I will refine the code and move 
"the clear interrupt status" to function of enable_vblank().
> > +
> > +	tmp = readl(priv->regs + DISP_REG_OVL_OUTPROC_EN);
> > +	tmp = (tmp & ~OVL_OUTPROC_OVL_EN) | (OVL_OUTPROC_OVL_EN &
> > OVL_OUTPROC_OVL_EN);
> 
> This would be simplified as
> 
> tmp |= OVL_OUTPROC_OVL_EN;
> 

Understood, I will simplify the code. 

> One question. In mtk_disp_outproc_stop(), you overwrite the whole
> register of  DISP_REG_OVL_OUTPROC_EN.
> Why here not overwrite the whole register?
> 
> Regards,
> CK
> 
Hi Ck, I will perform an experiment to verify this part.

Best, Paul 
> > +	writel(tmp, priv->regs + DISP_REG_OVL_OUTPROC_EN);
> > +}
> > +
> > +void mtk_disp_outproc_stop(struct device *dev)
> > +{
> > +	struct mtk_disp_outproc *priv = dev_get_drvdata(dev);
> > +
> > +	writel(0, priv->regs + DISP_REG_OVL_OUTPROC_EN);
> > +	writel(OVL_OUTPROC_RST, priv->regs +
> > DISP_REG_OVL_OUTPROC_RST);
> > +	writel(0, priv->regs + DISP_REG_OVL_OUTPROC_RST);
> > +}
> > +
> 


  reply	other threads:[~2025-07-04  7:27 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-15  9:34 [PATCH v3 00/17] Add MediaTek SoC DRM support for MT8196 paul-pl.chen
2025-05-15  9:34 ` [PATCH v3 01/17] dt-bindings: soc: mediatek: add mutex yaml " paul-pl.chen
2025-05-15  9:34 ` [PATCH v3 02/17] dt-bindings: display: mediatek: add EXDMA " paul-pl.chen
2025-05-15 10:48   ` Rob Herring (Arm)
2025-06-26  9:10   ` CK Hu (胡俊光)
2025-05-15  9:34 ` [PATCH v3 03/17] dt-bindings: display: mediatek: add BLENDER " paul-pl.chen
2025-05-19  6:41   ` Krzysztof Kozlowski
2025-05-15  9:34 ` [PATCH v3 04/17] dt-bindings: display: mediatek: add OUTPROC " paul-pl.chen
2025-05-19  6:43   ` Krzysztof Kozlowski
2025-05-15  9:34 ` [PATCH v3 05/17] soc: mediatek: Add runtime PM and top clocks and async controls for MMSYS paul-pl.chen
2025-05-15  9:34 ` [PATCH v3 06/17] soc: mediatek: add mmsys support for MT8196 paul-pl.chen
2025-05-15  9:34 ` [PATCH v3 07/17] soc: mediatek: mutex: Reused the switch case for SOF ID paul-pl.chen
2025-05-15  9:34 ` [PATCH v3 08/17] soc: mediatek: mutex: refactor SOF settings for output components paul-pl.chen
2025-05-15  9:34 ` [PATCH v3 09/17] soc: mediatek: mutex: add mutex support for MT8196 paul-pl.chen
2025-05-15  9:34 ` [PATCH v3 10/17] drm/mediatek: Export OVL formats definitions and format conversion API paul-pl.chen
2025-06-17  5:43   ` CK Hu (胡俊光)
2025-06-17  6:47     ` CK Hu (胡俊光)
2025-05-15  9:34 ` [PATCH v3 11/17] drm/mediatek: drm/mediatek: Export OVL ignore pixel alpha function paul-pl.chen
2025-06-17  6:06   ` CK Hu (胡俊光)
2025-05-15  9:34 ` [PATCH v3 12/17] drm/mediatek: add EXDMA support for MT8196 paul-pl.chen
2025-06-17  9:17   ` CK Hu (胡俊光)
2025-07-04  6:26     ` Paul-pl Chen (陳柏霖)
2025-05-15  9:34 ` [PATCH v3 13/17] drm/mediatek: add BLENDER " paul-pl.chen
2025-06-18  6:40   ` CK Hu (胡俊光)
2025-07-04  6:36     ` Paul-pl Chen (陳柏霖)
2025-05-15  9:34 ` [PATCH v3 14/17] drm/mediatek: add OUTPROC " paul-pl.chen
2025-06-18  8:23   ` CK Hu (胡俊光)
2025-07-04  7:24     ` Paul-pl Chen (陳柏霖) [this message]
2025-05-15  9:34 ` [PATCH v3 15/17] drm/mediatek: add ovlsys_adaptor " paul-pl.chen
2025-05-16  6:34   ` kernel test robot
2025-06-24  5:46   ` CK Hu (胡俊光)
2025-05-15  9:34 ` [PATCH v3 16/17] drm/mediatek: Add support for multiple mmsys in the one mediatek-drm driver paul-pl.chen
2025-05-16  7:36   ` kernel test robot
2025-06-24  5:49   ` CK Hu (胡俊光)
2025-05-15  9:34 ` [PATCH v3 17/17] drm/mediatek: Add support for MT8196 multiple mmsys paul-pl.chen

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