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From: "CK Hu (胡俊光)" <ck.hu@mediatek.com>
To: "robh@kernel.org" <robh@kernel.org>,
	"krzk+dt@kernel.org" <krzk+dt@kernel.org>,
	"Paul-pl Chen (陳柏霖)" <Paul-pl.Chen@mediatek.com>,
	"conor+dt@kernel.org" <conor+dt@kernel.org>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>,
	"chunkuang.hu@kernel.org" <chunkuang.hu@kernel.org>
Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"Xiandong Wang (王先冬)" <Xiandong.Wang@mediatek.com>,
	"Jason-JH Lin (林睿祥)" <Jason-JH.Lin@mediatek.com>,
	"Singo Chang (張興國)" <Singo.Chang@mediatek.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	Project_Global_Chrome_Upstream_Group
	<Project_Global_Chrome_Upstream_Group@mediatek.com>,
	"treapking@chromium.org" <treapking@chromium.org>,
	"Nancy Lin (林欣螢)" <Nancy.Lin@mediatek.com>,
	"linux-mediatek@lists.infradead.org"
	<linux-mediatek@lists.infradead.org>,
	"Sunny Shen (沈姍姍)" <Sunny.Shen@mediatek.com>,
	"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
	"Sirius Wang (王皓昱)" <Sirius.Wang@mediatek.com>,
	"matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v3 15/17] drm/mediatek: add ovlsys_adaptor support for MT8196
Date: Tue, 24 Jun 2025 05:46:38 +0000	[thread overview]
Message-ID: <7496d541fd2c2b6ff6db0e920f7fb65fec735ecb.camel@mediatek.com> (raw)
In-Reply-To: <20250515093454.1729720-16-paul-pl.chen@mediatek.com>

On Thu, 2025-05-15 at 17:34 +0800, paul-pl.chen wrote:
> From: Nancy Lin <nancy.lin@mediatek.com>
> 
> Ovlsys_adaptor is an encapsulated module designed to
> simplify the DRM control flow. This module is composed
> of 20 EXDMAs, 20 BLENDERs, and 12 OUTPROCs.
> Two EXDMAs merge into one layer, allowing the module
> to support 20 layers for 3 display paths.
> Ovlsys_adaptor driver is integrated within the
> mtk_ddp_comp framework.
> 
> Signed-off-by: Nancy Lin <nancy.lin@mediatek.com>
> Signed-off-by: Paul-pl Chen <paul-pl.chen@mediatek.com>
> ---

[snip]

> +
> +int mtk_ovlsys_adaptor_power_on(struct device *dev)
> +{
> +	struct mtk_disp_ovlsys_adaptor *priv = dev_get_drvdata(dev);
> +	struct device *comp;
> +	int ret = 0;

int ret;

> +	int i;
> +
> +	for (i = 0; i < priv->path_size; i++) {
> +		comp = priv->ovl_adaptor_comp[priv->path[i]];
> +		if (!comp || get_type(priv->path[i]) != OVLSYS_ADAPTOR_TYPE_EXDMA)
> +			continue;
> +
> +		ret = pm_runtime_get_sync(comp);
> +		if (ret < 0) {
> +			dev_err(dev, "Failed to enable power domain %d, err %d\n", i, ret);
> +			goto pwr_err;
> +		}
> +	}
> +
> +	return ret;

return 0;

> +
> +pwr_err:
> +	while (--i >= 0) {
> +		comp = priv->ovl_adaptor_comp[i];
> +		if (!comp || get_type(priv->path[i]) != OVLSYS_ADAPTOR_TYPE_EXDMA)
> +			continue;
> +
> +		pm_runtime_put(priv->ovl_adaptor_comp[i]);
> +	}
> +
> +	return ret;
> +}
> +

[snip]

> +
> +void mtk_ovlsys_adaptor_layer_config(struct device *dev, unsigned int idx,
> +				     struct mtk_plane_state *state,
> +				     struct cmdq_pkt *cmdq_pkt)
> +{
> +	struct mtk_plane_pending_state *pending = &state->pending;
> +	struct mtk_disp_ovlsys_adaptor *priv = dev_get_drvdata(dev);
> +	struct device *exdma;
> +	struct device *blender;
> +	const struct drm_format_info *fmt_info = drm_format_info(pending->format);
> +
> +	DRM_DEV_DEBUG_DRIVER(dev, "idx:%d enable:%d fmt:0x%x addr:0x%pad fb_w:%d {%d,%d,%d,%d}\n",
> +			     idx, pending->enable, pending->format,
> +			     &pending->addr, (pending->pitch / fmt_info->cpp[0]),
> +			     pending->x, pending->y, pending->width, pending->height);
> +
> +	exdma = priv->ovl_adaptor_comp[priv->path[idx * 2]];
> +	if (!exdma) {
> +		dev_err(dev, "%s: exdma%d comp not found\n", __func__, idx);
> +		return;
> +	}
> +
> +	blender = priv->ovl_adaptor_comp[priv->path[idx * 2 + 1]];
> +	if (!blender) {
> +		dev_err(dev, "%s: blender%d comp not found\n", __func__, idx);
> +		return;
> +	}
> +
> +	if (pending->height == 0 || pending->width == 0 ||
> +	    pending->x > OVLSYS_ADAPTOR_DRIVER_DATA_MAX_SIZE ||
> +	    pending->y > OVLSYS_ADAPTOR_DRIVER_DATA_MAX_SIZE)
> +		pending->enable = false;

In ovl_adaptor, it does not modify this.
And mtk_ethdr_layer_config() would check this again.
So align this behavior.

> +
> +	mtk_disp_exdma_layer_config(exdma, state, cmdq_pkt);
> +	mtk_disp_blender_layer_config(blender, state, cmdq_pkt);
> +}
> +
> +void mtk_ovlsys_adaptor_config(struct device *dev, unsigned int w,
> +			       unsigned int h, unsigned int vrefresh,
> +			       unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
> +{
> +	struct mtk_disp_ovlsys_adaptor *priv = dev_get_drvdata(dev);
> +	int i;
> +	int blender_idx = 0;
> +
> +	for (i = 0; i < priv->path_size; i++) {
> +		if (get_type(priv->path[i]) == OVLSYS_ADAPTOR_TYPE_BLENDER) {
> +			blender_idx++;
> +
> +			mtk_disp_blender_config(priv->ovl_adaptor_comp[priv->path[i]], w, h,
> +						vrefresh, bpc, blender_idx == priv->layer_nr,
> +						blender_idx == 1, cmdq_pkt);
> +		} else if (get_type(priv->path[i]) == OVLSYS_ADAPTOR_TYPE_OUTPROC) {
> +			mtk_disp_outproc_config(priv->ovl_adaptor_comp[priv->path[i]], w, h,
> +						vrefresh, bpc, cmdq_pkt);
> +		}
> +	}

for (i = 0; i < priv->layer_nr; i++)
	mtk_disp_blender_config(priv->ovl_adaptor_comp[priv->path[i * 2 + 1]], w, h,
				vrefresh, bpc, i == (priv->layer_nr - 1),
				i == 0, cmdq_pkt);

mtk_disp_outproc_config(priv->ovl_adaptor_comp[priv->path[i * 2]], w, h,
			vrefresh, bpc, cmdq_pkt);

> +}
> +
> +int mtk_ovlsys_adaptor_layer_check(struct device *dev,
> +				   unsigned int idx,
> +				   struct mtk_plane_state *mtk_state)
> +{
> +	struct drm_plane_state *state = &mtk_state->base;
> +
> +	/* Check if any unsupported rotation is set */
> +	if (state->rotation & ~DRM_MODE_ROTATE_0)
> +		return -EINVAL;
> +
> +	return 0;
> +}
> +
> 

[snip]

> +
> +void mtk_ovlsys_adaptor_stop(struct device *dev)
> +{
> +	struct mtk_disp_ovlsys_adaptor *priv = dev_get_drvdata(dev);
> +	int i;
> +
> +	for (i = 0; i < (priv->path_size - 1); i += 2) {
> +		mtk_disp_exdma_start(priv->ovl_adaptor_comp[priv->path[i]], NULL);

mtk_disp_exdma_stop()

> +		mtk_disp_blender_start(priv->ovl_adaptor_comp[priv->path[i + 1]], NULL);

mtk_disp_blender_stop()

> +	}
> +
> +	mtk_disp_outproc_start(priv->ovl_adaptor_comp[priv->path[i]]);

mtk_disp_outproc_stop()

> +}
> +
> +int mtk_ovlsys_adaptor_clk_enable(struct device *dev)
> +{
> +	struct mtk_disp_ovlsys_adaptor *priv = dev_get_drvdata(dev);
> +	struct device *comp;
> +	int ret = 0;

int ret;

> +	int i;
> +
> +	for (i = 0; i < priv->path_size; i++) {
> +		comp = priv->ovl_adaptor_comp[priv->path[i]];
> +		if (!comp)

I'm curious about why this happen?
If this would not happen, remove this.

> +			continue;
> +
> +		if (get_type(priv->path[i]) == OVLSYS_ADAPTOR_TYPE_EXDMA)
> +			ret = mtk_disp_exdma_clk_enable(comp);
> +		else if (get_type(priv->path[i]) == OVLSYS_ADAPTOR_TYPE_BLENDER)
> +			ret = mtk_disp_blender_clk_enable(comp);
> +		else
> +			ret = mtk_disp_outproc_clk_enable(comp);
> +
> +		if (ret) {
> +			dev_err(dev, "Failed to enable clock %d, err %d\n", i, ret);
> +			goto clk_err;
> +		}
> +	}
> +
> +	return ret;

return 0;

> +
> +clk_err:
> +	while (--i >= 0) {
> +		comp = priv->ovl_adaptor_comp[priv->path[i]];
> +		if (!comp)
> +			continue;
> +
> +		if (get_type(priv->path[i]) == OVLSYS_ADAPTOR_TYPE_EXDMA)
> +			mtk_disp_exdma_clk_disable(comp);
> +		else if (get_type(priv->path[i]) == OVLSYS_ADAPTOR_TYPE_BLENDER)
> +			mtk_disp_blender_clk_disable(comp);
> +		else
> +			mtk_disp_outproc_clk_disable(comp);
> +	}
> +
> +	return ret;
> +}
> +
> +void mtk_ovlsys_adaptor_clk_disable(struct device *dev)
> +{
> +	struct mtk_disp_ovlsys_adaptor *priv = dev_get_drvdata(dev);
> +	struct device *comp;
> +	int i;
> +
> +	for (i = 0; i < priv->path_size; i++) {
> +		comp = priv->ovl_adaptor_comp[priv->path[i]];
> +		if (!comp)
> +			continue;
> +
> +		if (get_type(priv->path[i]) == OVLSYS_ADAPTOR_TYPE_EXDMA)
> +			mtk_disp_exdma_clk_disable(comp);
> +		else if (get_type(priv->path[i]) == OVLSYS_ADAPTOR_TYPE_BLENDER)
> +			mtk_disp_blender_clk_disable(comp);
> +		else
> +			mtk_disp_outproc_clk_disable(comp);
> +	}
> +}
> +

[snip]

> +
> +static int mtk_disp_ovlsys_adaptor_master_bind(struct device *dev)
> +{
> +	struct mtk_disp_ovlsys_adaptor *priv = dev_get_drvdata(dev);
> +	int ret, i;
> +
> +	ret = component_bind_all(dev, priv->mmsys_dev);
> +
> +	if (ret)
> +		return dev_err_probe(dev, ret, "component_bind_all failed!\n");
> +
> +	priv->children_bound = true;
> +	priv->layer_nr = 0;

priv->layer_nr = priv->path_size / 2;

Regards,
CK

> +
> +	for (i = 0; i < priv->path_size; i++)
> +		if (comp_matches[priv->path[i]].type == OVLSYS_ADAPTOR_TYPE_BLENDER)
> +			priv->layer_nr++;
> +
> +	return 0;
> +}
> +


  parent reply	other threads:[~2025-06-24  5:49 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-15  9:34 [PATCH v3 00/17] Add MediaTek SoC DRM support for MT8196 paul-pl.chen
2025-05-15  9:34 ` [PATCH v3 01/17] dt-bindings: soc: mediatek: add mutex yaml " paul-pl.chen
2025-05-15  9:34 ` [PATCH v3 02/17] dt-bindings: display: mediatek: add EXDMA " paul-pl.chen
2025-05-15 10:48   ` Rob Herring (Arm)
2025-06-26  9:10   ` CK Hu (胡俊光)
2025-05-15  9:34 ` [PATCH v3 03/17] dt-bindings: display: mediatek: add BLENDER " paul-pl.chen
2025-05-19  6:41   ` Krzysztof Kozlowski
2025-05-15  9:34 ` [PATCH v3 04/17] dt-bindings: display: mediatek: add OUTPROC " paul-pl.chen
2025-05-19  6:43   ` Krzysztof Kozlowski
2025-05-15  9:34 ` [PATCH v3 05/17] soc: mediatek: Add runtime PM and top clocks and async controls for MMSYS paul-pl.chen
2025-05-15  9:34 ` [PATCH v3 06/17] soc: mediatek: add mmsys support for MT8196 paul-pl.chen
2025-05-15  9:34 ` [PATCH v3 07/17] soc: mediatek: mutex: Reused the switch case for SOF ID paul-pl.chen
2025-05-15  9:34 ` [PATCH v3 08/17] soc: mediatek: mutex: refactor SOF settings for output components paul-pl.chen
2025-05-15  9:34 ` [PATCH v3 09/17] soc: mediatek: mutex: add mutex support for MT8196 paul-pl.chen
2025-05-15  9:34 ` [PATCH v3 10/17] drm/mediatek: Export OVL formats definitions and format conversion API paul-pl.chen
2025-06-17  5:43   ` CK Hu (胡俊光)
2025-06-17  6:47     ` CK Hu (胡俊光)
2025-05-15  9:34 ` [PATCH v3 11/17] drm/mediatek: drm/mediatek: Export OVL ignore pixel alpha function paul-pl.chen
2025-06-17  6:06   ` CK Hu (胡俊光)
2025-05-15  9:34 ` [PATCH v3 12/17] drm/mediatek: add EXDMA support for MT8196 paul-pl.chen
2025-06-17  9:17   ` CK Hu (胡俊光)
2025-07-04  6:26     ` Paul-pl Chen (陳柏霖)
2025-05-15  9:34 ` [PATCH v3 13/17] drm/mediatek: add BLENDER " paul-pl.chen
2025-06-18  6:40   ` CK Hu (胡俊光)
2025-07-04  6:36     ` Paul-pl Chen (陳柏霖)
2025-05-15  9:34 ` [PATCH v3 14/17] drm/mediatek: add OUTPROC " paul-pl.chen
2025-06-18  8:23   ` CK Hu (胡俊光)
2025-07-04  7:24     ` Paul-pl Chen (陳柏霖)
2025-05-15  9:34 ` [PATCH v3 15/17] drm/mediatek: add ovlsys_adaptor " paul-pl.chen
2025-05-16  6:34   ` kernel test robot
2025-06-24  5:46   ` CK Hu (胡俊光) [this message]
2025-05-15  9:34 ` [PATCH v3 16/17] drm/mediatek: Add support for multiple mmsys in the one mediatek-drm driver paul-pl.chen
2025-05-16  7:36   ` kernel test robot
2025-06-24  5:49   ` CK Hu (胡俊光)
2025-05-15  9:34 ` [PATCH v3 17/17] drm/mediatek: Add support for MT8196 multiple mmsys paul-pl.chen

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