From: James Hogan <james.hogan@imgtec.com>
To: "Maciej W. Rozycki" <macro@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>, <linux-mips@linux-mips.org>
Subject: Re: [PATCH 3/4] MIPS16e2: Report ASE presence in /proc/cpuinfo
Date: Mon, 3 Jul 2017 21:23:23 +0100 [thread overview]
Message-ID: <20170703202323.GM31455@jhogan-linux.le.imgtec.org> (raw)
In-Reply-To: <alpine.DEB.2.00.1705230230220.2590@tp.orcam.me.uk>
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On Tue, May 23, 2017 at 01:39:23PM +0100, Maciej W. Rozycki wrote:
> Signed-off-by: Maciej W. Rozycki <macro@imgtec.com>
> ---
> Submitted third in the series so that the presence of "mips16e2" in
> /proc/cpuinfo not only indicates the hardware feature, but our correct
> unaligned emulation as well.
This should be mentioned in the commit description (not the 3rd in the
series bit, the "it indicates both the hw feature and unaligned
emulation" bit).
Otherwise
Reivewed-by: James Hogan <james.hogan@imgtec.com>
Cheers
James
>
> There's a `checkpatch.pl' error reported for the unusual formatting,
> however it is consistent with surrounding code and I do not think we
> want to make this statement an oddball.
>
> Maciej
>
> linux-mips16e2-ase-report.diff
> Index: linux-sfr-test/arch/mips/kernel/proc.c
> ===================================================================
> --- linux-sfr-test.orig/arch/mips/kernel/proc.c 2017-05-22 22:42:16.000000000 +0100
> +++ linux-sfr-test/arch/mips/kernel/proc.c 2017-05-22 22:56:31.000000000 +0100
> @@ -109,6 +109,7 @@ static int show_cpuinfo(struct seq_file
>
> seq_printf(m, "ASEs implemented\t:");
> if (cpu_has_mips16) seq_printf(m, "%s", " mips16");
> + if (cpu_has_mips16e2) seq_printf(m, "%s", " mips16e2");
> if (cpu_has_mdmx) seq_printf(m, "%s", " mdmx");
> if (cpu_has_mips3d) seq_printf(m, "%s", " mips3d");
> if (cpu_has_smartmips) seq_printf(m, "%s", " smartmips");
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WARNING: multiple messages have this Message-ID (diff)
From: James Hogan <james.hogan@imgtec.com>
To: "Maciej W. Rozycki" <macro@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>, linux-mips@linux-mips.org
Subject: Re: [PATCH 3/4] MIPS16e2: Report ASE presence in /proc/cpuinfo
Date: Mon, 3 Jul 2017 21:23:23 +0100 [thread overview]
Message-ID: <20170703202323.GM31455@jhogan-linux.le.imgtec.org> (raw)
Message-ID: <20170703202323.uRGBlg32Ekk9JUs7lhAV1UM1KcAN0JaCP4m2oGIAiOA@z> (raw)
In-Reply-To: <alpine.DEB.2.00.1705230230220.2590@tp.orcam.me.uk>
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On Tue, May 23, 2017 at 01:39:23PM +0100, Maciej W. Rozycki wrote:
> Signed-off-by: Maciej W. Rozycki <macro@imgtec.com>
> ---
> Submitted third in the series so that the presence of "mips16e2" in
> /proc/cpuinfo not only indicates the hardware feature, but our correct
> unaligned emulation as well.
This should be mentioned in the commit description (not the 3rd in the
series bit, the "it indicates both the hw feature and unaligned
emulation" bit).
Otherwise
Reivewed-by: James Hogan <james.hogan@imgtec.com>
Cheers
James
>
> There's a `checkpatch.pl' error reported for the unusual formatting,
> however it is consistent with surrounding code and I do not think we
> want to make this statement an oddball.
>
> Maciej
>
> linux-mips16e2-ase-report.diff
> Index: linux-sfr-test/arch/mips/kernel/proc.c
> ===================================================================
> --- linux-sfr-test.orig/arch/mips/kernel/proc.c 2017-05-22 22:42:16.000000000 +0100
> +++ linux-sfr-test/arch/mips/kernel/proc.c 2017-05-22 22:56:31.000000000 +0100
> @@ -109,6 +109,7 @@ static int show_cpuinfo(struct seq_file
>
> seq_printf(m, "ASEs implemented\t:");
> if (cpu_has_mips16) seq_printf(m, "%s", " mips16");
> + if (cpu_has_mips16e2) seq_printf(m, "%s", " mips16e2");
> if (cpu_has_mdmx) seq_printf(m, "%s", " mdmx");
> if (cpu_has_mips3d) seq_printf(m, "%s", " mips3d");
> if (cpu_has_smartmips) seq_printf(m, "%s", " smartmips");
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next prev parent reply other threads:[~2017-07-03 20:23 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-23 12:36 [PATCH 0/4] MIPS16e2 ASE support Maciej W. Rozycki
2017-05-23 12:36 ` Maciej W. Rozycki
2017-05-23 12:37 ` [PATCH 1/4] MIPS16e2: Identify ASE presence Maciej W. Rozycki
2017-05-23 12:37 ` Maciej W. Rozycki
2017-07-03 18:32 ` James Hogan
2017-07-03 18:32 ` James Hogan
2017-05-23 12:38 ` [PATCH 2/4] MIPS16e2: Subdecode extended LWSP/SWSP instructions Maciej W. Rozycki
2017-05-23 12:38 ` Maciej W. Rozycki
2017-07-03 20:20 ` James Hogan
2017-07-03 20:20 ` James Hogan
2017-05-23 12:39 ` [PATCH 3/4] MIPS16e2: Report ASE presence in /proc/cpuinfo Maciej W. Rozycki
2017-05-23 12:39 ` Maciej W. Rozycki
2017-07-03 20:23 ` James Hogan [this message]
2017-07-03 20:23 ` James Hogan
2017-07-04 15:35 ` Maciej W. Rozycki
2017-07-04 15:35 ` Maciej W. Rozycki
2017-07-04 15:39 ` James Hogan
2017-07-04 15:39 ` James Hogan
2017-05-23 12:40 ` [PATCH 4/4] MIPS16e2: Provide feature overrides for non-MIPS16 systems Maciej W. Rozycki
2017-05-23 12:40 ` Maciej W. Rozycki
2017-05-23 19:06 ` Florian Fainelli
2017-05-23 22:21 ` Maciej W. Rozycki
2017-05-23 22:21 ` Maciej W. Rozycki
2017-07-03 20:32 ` James Hogan
2017-07-03 20:32 ` James Hogan
2017-07-04 15:50 ` Maciej W. Rozycki
2017-07-04 15:50 ` Maciej W. Rozycki
2017-07-04 16:51 ` James Hogan
2017-07-04 16:51 ` James Hogan
2017-07-03 17:22 ` [PING][PATCH 0/4] MIPS16e2 ASE support Maciej W. Rozycki
2017-07-03 17:22 ` Maciej W. Rozycki
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