From: John Crispin <john@phrozen.org>
To: James Hogan <jhogan@kernel.org>, Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org, Felix Fietkau <nbd@nbd.name>,
John Crispin <john@phrozen.org>
Subject: [PATCH V2 14/25] MIPS: ath79: move legacy "wdt" and "uart" clock aliases out of soc init
Date: Fri, 20 Jul 2018 13:58:31 +0200 [thread overview]
Message-ID: <20180720115842.8406-15-john@phrozen.org> (raw)
In-Reply-To: <20180720115842.8406-1-john@phrozen.org>
From: Felix Fietkau <nbd@nbd.name>
Preparation for reusing functions for DT
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: John Crispin <john@phrozen.org>
---
arch/mips/ath79/clock.c | 38 +++++++++++++++++---------------------
1 file changed, 17 insertions(+), 21 deletions(-)
diff --git a/arch/mips/ath79/clock.c b/arch/mips/ath79/clock.c
index 50bc3b01a4c4..e02b819b2f5d 100644
--- a/arch/mips/ath79/clock.c
+++ b/arch/mips/ath79/clock.c
@@ -110,9 +110,6 @@ static void __init ar71xx_clocks_init(void)
ath79_set_clk(ATH79_CLK_CPU, cpu_rate);
ath79_set_clk(ATH79_CLK_DDR, ddr_rate);
ath79_set_clk(ATH79_CLK_AHB, ahb_rate);
-
- clk_add_alias("wdt", NULL, "ahb", NULL);
- clk_add_alias("uart", NULL, "ahb", NULL);
}
static void __init ar724x_clk_init(struct clk *ref_clk, void __iomem *pll_base)
@@ -140,9 +137,6 @@ static void __init ar724x_clocks_init(void)
ref_clk = ath79_set_clk(ATH79_CLK_REF, AR724X_BASE_FREQ);
ar724x_clk_init(ref_clk, ath79_pll_base);
-
- clk_add_alias("wdt", NULL, "ahb", NULL);
- clk_add_alias("uart", NULL, "ahb", NULL);
}
static void __init ar9330_clk_init(struct clk *ref_clk, void __iomem *pll_base)
@@ -218,9 +212,6 @@ static void __init ar933x_clocks_init(void)
ref_clk = ath79_set_clk(ATH79_CLK_REF, ref_rate);
ar9330_clk_init(ref_clk, ath79_pll_base);
-
- clk_add_alias("wdt", NULL, "ahb", NULL);
- clk_add_alias("uart", NULL, "ref", NULL);
}
static u32 __init ar934x_get_pll_freq(u32 ref, u32 ref_div, u32 nint, u32 nfrac,
@@ -353,9 +344,6 @@ static void __init ar934x_clocks_init(void)
ath79_set_clk(ATH79_CLK_DDR, ddr_rate);
ath79_set_clk(ATH79_CLK_AHB, ahb_rate);
- clk_add_alias("wdt", NULL, "ref", NULL);
- clk_add_alias("uart", NULL, "ref", NULL);
-
iounmap(dpll_base);
}
@@ -439,9 +427,6 @@ static void __init qca953x_clocks_init(void)
ath79_set_clk(ATH79_CLK_CPU, cpu_rate);
ath79_set_clk(ATH79_CLK_DDR, ddr_rate);
ath79_set_clk(ATH79_CLK_AHB, ahb_rate);
-
- clk_add_alias("wdt", NULL, "ref", NULL);
- clk_add_alias("uart", NULL, "ref", NULL);
}
static void __init qca955x_clocks_init(void)
@@ -524,9 +509,6 @@ static void __init qca955x_clocks_init(void)
ath79_set_clk(ATH79_CLK_CPU, cpu_rate);
ath79_set_clk(ATH79_CLK_DDR, ddr_rate);
ath79_set_clk(ATH79_CLK_AHB, ahb_rate);
-
- clk_add_alias("wdt", NULL, "ref", NULL);
- clk_add_alias("uart", NULL, "ref", NULL);
}
static void __init qca956x_clocks_init(void)
@@ -628,13 +610,13 @@ static void __init qca956x_clocks_init(void)
ath79_set_clk(ATH79_CLK_CPU, cpu_rate);
ath79_set_clk(ATH79_CLK_DDR, ddr_rate);
ath79_set_clk(ATH79_CLK_AHB, ahb_rate);
-
- clk_add_alias("wdt", NULL, "ref", NULL);
- clk_add_alias("uart", NULL, "ref", NULL);
}
void __init ath79_clocks_init(void)
{
+ const char *wdt;
+ const char *uart;
+
if (soc_is_ar71xx())
ar71xx_clocks_init();
else if (soc_is_ar724x() || soc_is_ar913x())
@@ -651,6 +633,20 @@ void __init ath79_clocks_init(void)
qca956x_clocks_init();
else
BUG();
+
+ if (soc_is_ar71xx() || soc_is_ar724x() || soc_is_ar913x()) {
+ wdt = "ahb";
+ uart = "ahb";
+ } else if (soc_is_ar933x()) {
+ wdt = "ahb";
+ uart = "ref";
+ } else {
+ wdt = "ref";
+ uart = "ref";
+ }
+
+ clk_add_alias("wdt", NULL, wdt, NULL);
+ clk_add_alias("uart", NULL, uart, NULL);
}
unsigned long __init
--
2.11.0
next prev parent reply other threads:[~2018-07-20 12:24 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-20 11:58 [PATCH V2 00/25] MIPS: ath79: convert target to pure OF John Crispin
2018-07-20 11:58 ` [PATCH V2 01/25] MIPS: ath79: add lots of missing registers John Crispin
2018-07-20 11:58 ` [PATCH V2 02/25] MIPS: ath79: add support for QCA953x QCA956x TP9343 John Crispin
2018-07-20 11:58 ` [PATCH V2 03/25] MIPS: ath79: select the PINCTRL subsystem John Crispin
2018-07-20 11:58 ` [PATCH V2 04/25] MIPS: ath79: fix register address in ath79_ddr_wb_flush() John Crispin
2018-07-20 15:44 ` Sergei Shtylyov
2018-07-20 17:14 ` Paul Burton
2018-07-20 17:18 ` Paul Burton
2018-07-20 11:58 ` [PATCH V2 05/25] MIPS: ath79: fix system restart John Crispin
2018-07-20 11:58 ` [PATCH V2 06/25] MIPS: ath79: finetune cpu-overrides John Crispin
2018-07-20 11:58 ` [PATCH V2 07/25] MIPS: ath79: enable uart during early_prink John Crispin
2018-07-20 15:47 ` Sergei Shtylyov
2018-07-20 11:58 ` [PATCH V2 08/25] MIPS: ath79: get PCIe controller out of reset John Crispin
2018-07-20 11:58 ` [PATCH V2 09/25] dt-bindings: PCI: qcom,ar7100: adds binding doc John Crispin
2018-07-20 15:51 ` Sergei Shtylyov
2018-07-20 15:58 ` Sergei Shtylyov
2018-07-20 11:58 ` [PATCH V2 10/25] MIPS: pci-ar71xx: convert to OF John Crispin
2018-07-20 11:58 ` [PATCH V2 11/25] dt-bindings: PCI: qcom,ar7240: adds binding doc John Crispin
2018-07-20 16:11 ` Sergei Shtylyov
2018-07-25 17:34 ` Rob Herring
2018-07-20 11:58 ` [PATCH V2 12/25] MIPS: pci-ar724x: convert to OF John Crispin
2018-07-20 11:58 ` [PATCH V2 13/25] MIPS: ath79: add helpers for setting clocks and expose the ref clock John Crispin
2018-07-20 11:58 ` John Crispin [this message]
2018-07-20 11:58 ` [PATCH V2 15/25] MIPS: ath79: pass PLL base to clock init functions John Crispin
2018-07-20 11:58 ` [PATCH V2 16/25] MIPS: ath79: make specifying the reference clock in DT optional John Crispin
2018-07-20 11:58 ` [PATCH V2 17/25] MIPS: ath79: support setting up clock via DT on all SoC types John Crispin
2018-07-20 11:58 ` [PATCH V2 18/25] MIPS: ath79: export switch MDIO reference clock John Crispin
2018-07-20 11:58 ` [PATCH V2 19/25] MIPS: ath79: drop legacy IRQ code John Crispin
2018-07-20 11:58 ` [PATCH V2 20/25] MIPS: ath79: drop machfiles John Crispin
2018-07-20 11:58 ` [PATCH V2 21/25] MIPS: ath79: drop legacy pci code John Crispin
2018-07-20 11:58 ` [PATCH V2 22/25] MIPS: ath79: drop platform device registration code John Crispin
2018-07-20 11:58 ` [PATCH V2 23/25] MIPS: ath79: drop !OF clock code John Crispin
2018-07-20 11:58 ` [PATCH V2 24/25] MIPS: ath79: sanitize symbols John Crispin
2018-07-20 11:58 ` [PATCH V2 25/25] spi: ath79: drop pdata support John Crispin
2018-07-25 2:15 ` [PATCH V2 00/25] MIPS: ath79: convert target to pure OF Paul Burton
2018-07-25 5:11 ` John Crispin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20180720115842.8406-15-john@phrozen.org \
--to=john@phrozen.org \
--cc=jhogan@kernel.org \
--cc=linux-mips@linux-mips.org \
--cc=nbd@nbd.name \
--cc=ralf@linux-mips.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox