From: John Crispin <john@phrozen.org>
To: James Hogan <jhogan@kernel.org>, Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org, Mathias Kresin <dev@kresin.me>,
John Crispin <john@phrozen.org>
Subject: [PATCH V2 08/25] MIPS: ath79: get PCIe controller out of reset
Date: Fri, 20 Jul 2018 13:58:25 +0200 [thread overview]
Message-ID: <20180720115842.8406-9-john@phrozen.org> (raw)
In-Reply-To: <20180720115842.8406-1-john@phrozen.org>
From: Mathias Kresin <dev@kresin.me>
The ar724x pci driver expects the PCIe controller to be brought out of
reset by the bootloader.
At least the AVM Fritz 300E bootloader doesn't take care of releasing
the different PCIe controller related resets which causes an endless
hang as soon as either the PCIE Reset register (0x180f0018) or the PCI
Application Control register (0x180f0000) is read from.
Do the full "PCIE Root Complex Initialization Sequence" if the PCIe
host controller is still in reset during probing.
The QCA u-boot sleeps 10ms after the PCIE Application Control bit is
set to ready. It has been shown that 10ms might not be enough time if
PCIe should be used right after setting the bit. During my tests it
took up to 20ms till the link was up. Giving the link up to 100ms
should work for all cases.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Signed-off-by: John Crispin <john@phrozen.org>
---
arch/mips/pci/pci-ar724x.c | 42 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 42 insertions(+)
diff --git a/arch/mips/pci/pci-ar724x.c b/arch/mips/pci/pci-ar724x.c
index 1e23c8d587bd..64b58cc48a91 100644
--- a/arch/mips/pci/pci-ar724x.c
+++ b/arch/mips/pci/pci-ar724x.c
@@ -12,14 +12,18 @@
#include <linux/irq.h>
#include <linux/pci.h>
#include <linux/init.h>
+#include <linux/delay.h>
#include <linux/platform_device.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
+#define AR724X_PCI_REG_APP 0x00
#define AR724X_PCI_REG_RESET 0x18
#define AR724X_PCI_REG_INT_STATUS 0x4c
#define AR724X_PCI_REG_INT_MASK 0x50
+#define AR724X_PCI_APP_LTSSM_ENABLE BIT(0)
+
#define AR724X_PCI_RESET_LINK_UP BIT(0)
#define AR724X_PCI_INT_DEV0 BIT(14)
@@ -325,6 +329,37 @@ static void ar724x_pci_irq_init(struct ar724x_pci_controller *apc,
apc);
}
+static void ar724x_pci_hw_init(struct ar724x_pci_controller *apc)
+{
+ u32 ppl, app;
+ int wait = 0;
+
+ /* deassert PCIe host controller and PCIe PHY reset */
+ ath79_device_reset_clear(AR724X_RESET_PCIE);
+ ath79_device_reset_clear(AR724X_RESET_PCIE_PHY);
+
+ /* remove the reset of the PCIE PLL */
+ ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG);
+ ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_RESET;
+ ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl);
+
+ /* deassert bypass for the PCIE PLL */
+ ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG);
+ ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_BYPASS;
+ ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl);
+
+ /* set PCIE Application Control to ready */
+ app = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_APP);
+ app |= AR724X_PCI_APP_LTSSM_ENABLE;
+ __raw_writel(app, apc->ctrl_base + AR724X_PCI_REG_APP);
+
+ /* wait up to 100ms for PHY link up */
+ do {
+ mdelay(10);
+ wait++;
+ } while (wait < 10 && !ar724x_pci_check_link(apc));
+}
+
static int ar724x_pci_probe(struct platform_device *pdev)
{
struct ar724x_pci_controller *apc;
@@ -383,6 +418,13 @@ static int ar724x_pci_probe(struct platform_device *pdev)
apc->pci_controller.io_resource = &apc->io_res;
apc->pci_controller.mem_resource = &apc->mem_res;
+ /*
+ * Do the full PCIE Root Complex Initialization Sequence if the PCIe
+ * host controller is in reset.
+ */
+ if (ath79_reset_rr(AR724X_RESET_REG_RESET_MODULE) & AR724X_RESET_PCIE)
+ ar724x_pci_hw_init(apc);
+
apc->link_up = ar724x_pci_check_link(apc);
if (!apc->link_up)
dev_warn(&pdev->dev, "PCIe link is down\n");
--
2.11.0
next prev parent reply other threads:[~2018-07-20 12:00 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-20 11:58 [PATCH V2 00/25] MIPS: ath79: convert target to pure OF John Crispin
2018-07-20 11:58 ` [PATCH V2 01/25] MIPS: ath79: add lots of missing registers John Crispin
2018-07-20 11:58 ` [PATCH V2 02/25] MIPS: ath79: add support for QCA953x QCA956x TP9343 John Crispin
2018-07-20 11:58 ` [PATCH V2 03/25] MIPS: ath79: select the PINCTRL subsystem John Crispin
2018-07-20 11:58 ` [PATCH V2 04/25] MIPS: ath79: fix register address in ath79_ddr_wb_flush() John Crispin
2018-07-20 15:44 ` Sergei Shtylyov
2018-07-20 17:14 ` Paul Burton
2018-07-20 17:18 ` Paul Burton
2018-07-20 11:58 ` [PATCH V2 05/25] MIPS: ath79: fix system restart John Crispin
2018-07-20 11:58 ` [PATCH V2 06/25] MIPS: ath79: finetune cpu-overrides John Crispin
2018-07-20 11:58 ` [PATCH V2 07/25] MIPS: ath79: enable uart during early_prink John Crispin
2018-07-20 15:47 ` Sergei Shtylyov
2018-07-20 11:58 ` John Crispin [this message]
2018-07-20 11:58 ` [PATCH V2 09/25] dt-bindings: PCI: qcom,ar7100: adds binding doc John Crispin
2018-07-20 15:51 ` Sergei Shtylyov
2018-07-20 15:58 ` Sergei Shtylyov
2018-07-20 11:58 ` [PATCH V2 10/25] MIPS: pci-ar71xx: convert to OF John Crispin
2018-07-20 11:58 ` [PATCH V2 11/25] dt-bindings: PCI: qcom,ar7240: adds binding doc John Crispin
2018-07-20 16:11 ` Sergei Shtylyov
2018-07-25 17:34 ` Rob Herring
2018-07-20 11:58 ` [PATCH V2 12/25] MIPS: pci-ar724x: convert to OF John Crispin
2018-07-20 11:58 ` [PATCH V2 13/25] MIPS: ath79: add helpers for setting clocks and expose the ref clock John Crispin
2018-07-20 11:58 ` [PATCH V2 14/25] MIPS: ath79: move legacy "wdt" and "uart" clock aliases out of soc init John Crispin
2018-07-20 11:58 ` [PATCH V2 15/25] MIPS: ath79: pass PLL base to clock init functions John Crispin
2018-07-20 11:58 ` [PATCH V2 16/25] MIPS: ath79: make specifying the reference clock in DT optional John Crispin
2018-07-20 11:58 ` [PATCH V2 17/25] MIPS: ath79: support setting up clock via DT on all SoC types John Crispin
2018-07-20 11:58 ` [PATCH V2 18/25] MIPS: ath79: export switch MDIO reference clock John Crispin
2018-07-20 11:58 ` [PATCH V2 19/25] MIPS: ath79: drop legacy IRQ code John Crispin
2018-07-20 11:58 ` [PATCH V2 20/25] MIPS: ath79: drop machfiles John Crispin
2018-07-20 11:58 ` [PATCH V2 21/25] MIPS: ath79: drop legacy pci code John Crispin
2018-07-20 11:58 ` [PATCH V2 22/25] MIPS: ath79: drop platform device registration code John Crispin
2018-07-20 11:58 ` [PATCH V2 23/25] MIPS: ath79: drop !OF clock code John Crispin
2018-07-20 11:58 ` [PATCH V2 24/25] MIPS: ath79: sanitize symbols John Crispin
2018-07-20 11:58 ` [PATCH V2 25/25] spi: ath79: drop pdata support John Crispin
2018-07-25 2:15 ` [PATCH V2 00/25] MIPS: ath79: convert target to pure OF Paul Burton
2018-07-25 5:11 ` John Crispin
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