Linux PCI subsystem development
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From: sashiko-bot@kernel.org
To: "Srirangan Madhavan" <smadhavan@nvidia.com>
Cc: linux-pci@vger.kernel.org, linux-cxl@vger.kernel.org
Subject: Re: [PATCH v9 01/11] cxl: Split decoder programming into a reusable helper
Date: Thu, 09 Jul 2026 01:14:52 +0000	[thread overview]
Message-ID: <20260709011453.15D661F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260709010304.680422-2-smadhavan@nvidia.com>

> Move common HDM decoder settings to include/cxl/cxl.h and route the
> register programming sequence through cxl_commit(). This lets reset code
> restore cached HDM state without depending on private cxl_core types while
> keeping hdm.c in charge of the existing commit policy checks.
> 
> Build the low-level HDM helper under CONFIG_CXL_HDM so it is available even
> when cxl_core is modular.
> 
> Signed-off-by: Srirangan Madhavan <smadhavan@nvidia.com>

Sashiko has reviewed this patch and found no issues. It looks great!

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260709010304.680422-1-smadhavan@nvidia.com?part=1


  reply	other threads:[~2026-07-09  1:14 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-09  1:02 [PATCH v9 00/11] PCI/CXL: Add CXL reset support for Type 2 devices Srirangan Madhavan
2026-07-09  1:02 ` [PATCH v9 01/11] cxl: Split decoder programming into a reusable helper Srirangan Madhavan
2026-07-09  1:14   ` sashiko-bot [this message]
2026-07-09  1:02 ` [PATCH v9 02/11] cxl: Cache decoder settings on PCI devices Srirangan Madhavan
2026-07-09  1:16   ` sashiko-bot
2026-07-09  1:02 ` [PATCH v9 03/11] cxl: Share HDM decoder decode logic Srirangan Madhavan
2026-07-09  1:18   ` sashiko-bot
2026-07-09  1:02 ` [PATCH v9 04/11] cxl: Cache endpoint decoder settings during PCI enumeration Srirangan Madhavan
2026-07-09  1:17   ` sashiko-bot
2026-07-09  3:30   ` Alison Schofield
2026-07-10  0:48   ` Dan Williams (nvidia)
2026-07-09  1:02 ` [PATCH v9 05/11] cxl: Add CXL Device Reset helper Srirangan Madhavan
2026-07-09  1:15   ` sashiko-bot
2026-07-09  1:02 ` [PATCH v9 06/11] cxl: Validate HDM ranges before CXL reset Srirangan Madhavan
2026-07-09  1:28   ` sashiko-bot
2026-07-09  1:03 ` [PATCH v9 07/11] PCI/CXL: Discover the CXL reset scope Srirangan Madhavan
2026-07-09  1:24   ` sashiko-bot
2026-07-10  1:00   ` Dan Williams (nvidia)
2026-07-09  1:03 ` [PATCH v9 08/11] cxl: Restore CXL HDM state after PCI reset Srirangan Madhavan
2026-07-09  1:17   ` sashiko-bot
2026-07-09  1:03 ` [PATCH v9 09/11] PCI/CXL: Expose CXL Reset as a PCI reset method Srirangan Madhavan
2026-07-09  1:27   ` sashiko-bot
2026-07-09  1:03 ` [PATCH v9 10/11] Documentation/ABI: Document CXL Reset " Srirangan Madhavan
2026-07-09  1:05   ` sashiko-bot
2026-07-09  1:03 ` [PATCH v9 11/11] PCI/CXL: Restore HDM state after CXL bus reset Srirangan Madhavan
2026-07-09  1:20   ` sashiko-bot

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