From: sashiko-bot@kernel.org
To: "Srirangan Madhavan" <smadhavan@nvidia.com>
Cc: linux-cxl@vger.kernel.org, linux-pci@vger.kernel.org
Subject: Re: [PATCH v9 09/11] PCI/CXL: Expose CXL Reset as a PCI reset method
Date: Thu, 09 Jul 2026 01:27:01 +0000 [thread overview]
Message-ID: <20260709012701.AB9A11F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260709010304.680422-10-smadhavan@nvidia.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The CXL reset method skips function-scoped validation during execution, relying entirely on a flawed probe-time check that occurs before sibling functions are added to the PCI bus.
--
--- Patch [9]: [PATCH v9 09/11] PCI/CXL: Expose CXL Reset as a PCI reset method ---
commit f2ff500e92a2699aaf86703b4ef5bcf21ad27f7b
Author: Srirangan Madhavan <smadhavan@nvidia.com>
PCI/CXL: Expose CXL Reset as a PCI reset method
Add the CXL Reset helper to the PCI reset-method table so userspace can
select it through the existing reset_method ABI. Advertise the method for
Type 2 CXL devices that report CXL Reset support in the CXL Device DVSEC.
> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> index 77b17b13ee615..ef25ba5f7fe95 100644
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c
[ ... ]
> @@ -5092,6 +5093,7 @@ const struct pci_reset_fn_method pci_reset_fn_methods[] = {
> { },
> { pci_dev_specific_reset, .name = "device_specific" },
> { pci_dev_acpi_reset, .name = "acpi" },
> + { cxl_reset_function, .name = "cxl_reset" },
[Severity: High]
Does adding this reset method here introduce a regression where multi-function
CXL devices are exposed to state corruption when a reset is triggered?
During early system boot, PCI enumeration calls pci_init_reset_methods()
which evaluates this method with probe = true. The method then calls
cxl_reset_validate_function_scoped() to walk the bus looking for siblings:
drivers/cxl/core/reset.c:cxl_reset_validate_function_scoped() {
...
pci_walk_bus(pdev->bus, cxl_reset_validate_function_scope, &wctx);
...
}
Because function 0 has not yet been added to the bus list at this early stage
and sibling functions have not been scanned, the bus walk is empty. The reset
method is then incorrectly recorded as valid for function 0.
When the reset is actually executed later via VFIO or sysfs,
cxl_reset_function() is called with probe = false. This skips the validation:
drivers/cxl/core/reset.c:cxl_reset_function() {
...
if (probe)
return cxl_reset_validate_function_scoped(&ctx);
...
}
This means the bus is not re-evaluated when the siblings are actually present.
Will this proceed to reset the entire device without isolating sibling
functions, resulting in corrupted or lost state for those siblings?
> { pcie_reset_flr, .name = "flr" },
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260709010304.680422-1-smadhavan@nvidia.com?part=9
next prev parent reply other threads:[~2026-07-09 1:27 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-09 1:02 [PATCH v9 00/11] PCI/CXL: Add CXL reset support for Type 2 devices Srirangan Madhavan
2026-07-09 1:02 ` [PATCH v9 01/11] cxl: Split decoder programming into a reusable helper Srirangan Madhavan
2026-07-09 1:14 ` sashiko-bot
2026-07-09 1:02 ` [PATCH v9 02/11] cxl: Cache decoder settings on PCI devices Srirangan Madhavan
2026-07-09 1:16 ` sashiko-bot
2026-07-09 1:02 ` [PATCH v9 03/11] cxl: Share HDM decoder decode logic Srirangan Madhavan
2026-07-09 1:18 ` sashiko-bot
2026-07-09 1:02 ` [PATCH v9 04/11] cxl: Cache endpoint decoder settings during PCI enumeration Srirangan Madhavan
2026-07-09 1:17 ` sashiko-bot
2026-07-09 3:30 ` Alison Schofield
2026-07-10 0:48 ` Dan Williams (nvidia)
2026-07-09 1:02 ` [PATCH v9 05/11] cxl: Add CXL Device Reset helper Srirangan Madhavan
2026-07-09 1:15 ` sashiko-bot
2026-07-09 1:02 ` [PATCH v9 06/11] cxl: Validate HDM ranges before CXL reset Srirangan Madhavan
2026-07-09 1:28 ` sashiko-bot
2026-07-09 1:03 ` [PATCH v9 07/11] PCI/CXL: Discover the CXL reset scope Srirangan Madhavan
2026-07-09 1:24 ` sashiko-bot
2026-07-10 1:00 ` Dan Williams (nvidia)
2026-07-09 1:03 ` [PATCH v9 08/11] cxl: Restore CXL HDM state after PCI reset Srirangan Madhavan
2026-07-09 1:17 ` sashiko-bot
2026-07-09 1:03 ` [PATCH v9 09/11] PCI/CXL: Expose CXL Reset as a PCI reset method Srirangan Madhavan
2026-07-09 1:27 ` sashiko-bot [this message]
2026-07-09 1:03 ` [PATCH v9 10/11] Documentation/ABI: Document CXL Reset " Srirangan Madhavan
2026-07-09 1:05 ` sashiko-bot
2026-07-09 1:03 ` [PATCH v9 11/11] PCI/CXL: Restore HDM state after CXL bus reset Srirangan Madhavan
2026-07-09 1:20 ` sashiko-bot
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