From: Alison Schofield <alison.schofield@intel.com>
To: Srirangan Madhavan <smadhavan@nvidia.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
Dan Williams <djbw@kernel.org>,
"Dave Jiang" <dave.jiang@intel.com>,
Davidlohr Bueso <dave@stgolabs.net>,
"Jonathan Cameron" <jic23@kernel.org>,
Vishal Verma <vishal.l.verma@intel.com>,
<linux-cxl@vger.kernel.org>, <linux-pci@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
Alex Williamson <alex.williamson@redhat.com>, <vsethi@nvidia.com>,
<alwilliamson@nvidia.com>, Dan Williams <danwilliams@nvidia.com>,
Sai Yashwanth Reddy Kancherla <skancherla@nvidia.com>,
Vishal Aslot <vaslot@nvidia.com>,
Manish Honap <mhonap@nvidia.com>, Jiandi An <jan@nvidia.com>,
Richard Cheng <icheng@nvidia.com>, <linux-tegra@vger.kernel.org>
Subject: Re: [PATCH v9 04/11] cxl: Cache endpoint decoder settings during PCI enumeration
Date: Wed, 8 Jul 2026 20:30:10 -0700 [thread overview]
Message-ID: <ak8Vwi2W2vVM0n0D@aschofie-mobl2.lan> (raw)
In-Reply-To: <20260709010304.680422-5-smadhavan@nvidia.com>
On Thu, Jul 09, 2026 at 01:02:57AM +0000, Srirangan Madhavan wrote:
> Populate pci_dev->hdm from PCI capability initialization for CXL.mem
> functions. If Memory Space Enable is clear, temporarily set it while
> reading HDM MMIO and restore the original PCI_COMMAND value before
> returning. This gives driver-free reset paths an early HDM snapshot.
>
> CXL core later reuses and refreshes the same cache. Move the register
> helpers into the built-in CONFIG_CXL_HDM set so the early cache path is
> available without cxl_core.
>
> Signed-off-by: Srirangan Madhavan <smadhavan@nvidia.com>
> ---
> drivers/cxl/core/Makefile | 3 +-
> drivers/cxl/core/hdm.c | 59 ++++----
> drivers/cxl/core/regs.c | 4 +
> drivers/cxl/core/reset.c | 288 ++++++++++++++++++++++++++++++++++++++
> drivers/pci/probe.c | 3 +
> include/cxl/cxl.h | 31 +++-
> 6 files changed, 349 insertions(+), 39 deletions(-)
>
> diff --git a/drivers/cxl/core/Makefile b/drivers/cxl/core/Makefile
> index dc075cee0450..69cf2ea7ee74 100644
> --- a/drivers/cxl/core/Makefile
> +++ b/drivers/cxl/core/Makefile
> @@ -1,6 +1,6 @@
> # SPDX-License-Identifier: GPL-2.0
> obj-$(CONFIG_CXL_BUS) += cxl_core.o
> -obj-$(CONFIG_CXL_HDM) += reset.o
> +obj-$(CONFIG_CXL_HDM) += regs.o reset.o
> obj-$(CONFIG_CXL_SUSPEND) += suspend.o
Hi Srirangan,
This breaks cxl-test module builds with an 'exported twice' error,
14 symbols are both built-in and in cxl_core.ko.
All from drivers/cxl/core/regs.c
With that fixed up, this set passes the cxl unit test suite :)
diff --git a/tools/testing/cxl/Kbuild b/tools/testing/cxl/Kbuild
index 2be1df80fcc9..e80500f457a9 100644
--- a/tools/testing/cxl/Kbuild
+++ b/tools/testing/cxl/Kbuild
@@ -55,7 +55,6 @@ obj-m += cxl_core.o
cxl_core-y := $(CXL_CORE_SRC)/port.o
cxl_core-y += $(CXL_CORE_SRC)/pmem.o
-cxl_core-y += $(CXL_CORE_SRC)/regs.o
cxl_core-y += $(CXL_CORE_SRC)/memdev.o
cxl_core-y += $(CXL_CORE_SRC)/mbox.o
cxl_core-y += $(CXL_CORE_SRC)/pci.o
-- Alison
next prev parent reply other threads:[~2026-07-09 3:30 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-09 1:02 [PATCH v9 00/11] PCI/CXL: Add CXL reset support for Type 2 devices Srirangan Madhavan
2026-07-09 1:02 ` [PATCH v9 01/11] cxl: Split decoder programming into a reusable helper Srirangan Madhavan
2026-07-09 1:14 ` sashiko-bot
2026-07-09 1:02 ` [PATCH v9 02/11] cxl: Cache decoder settings on PCI devices Srirangan Madhavan
2026-07-09 1:16 ` sashiko-bot
2026-07-09 1:02 ` [PATCH v9 03/11] cxl: Share HDM decoder decode logic Srirangan Madhavan
2026-07-09 1:18 ` sashiko-bot
2026-07-09 1:02 ` [PATCH v9 04/11] cxl: Cache endpoint decoder settings during PCI enumeration Srirangan Madhavan
2026-07-09 1:17 ` sashiko-bot
2026-07-09 3:30 ` Alison Schofield [this message]
2026-07-10 0:48 ` Dan Williams (nvidia)
2026-07-09 1:02 ` [PATCH v9 05/11] cxl: Add CXL Device Reset helper Srirangan Madhavan
2026-07-09 1:15 ` sashiko-bot
2026-07-09 1:02 ` [PATCH v9 06/11] cxl: Validate HDM ranges before CXL reset Srirangan Madhavan
2026-07-09 1:28 ` sashiko-bot
2026-07-09 1:03 ` [PATCH v9 07/11] PCI/CXL: Discover the CXL reset scope Srirangan Madhavan
2026-07-09 1:24 ` sashiko-bot
2026-07-10 1:00 ` Dan Williams (nvidia)
2026-07-09 1:03 ` [PATCH v9 08/11] cxl: Restore CXL HDM state after PCI reset Srirangan Madhavan
2026-07-09 1:17 ` sashiko-bot
2026-07-09 1:03 ` [PATCH v9 09/11] PCI/CXL: Expose CXL Reset as a PCI reset method Srirangan Madhavan
2026-07-09 1:27 ` sashiko-bot
2026-07-09 1:03 ` [PATCH v9 10/11] Documentation/ABI: Document CXL Reset " Srirangan Madhavan
2026-07-09 1:05 ` sashiko-bot
2026-07-09 1:03 ` [PATCH v9 11/11] PCI/CXL: Restore HDM state after CXL bus reset Srirangan Madhavan
2026-07-09 1:20 ` sashiko-bot
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