Linux PCI subsystem development
 help / color / mirror / Atom feed
From: Vidya Sagar <vidyas@nvidia.com>
To: Manikanta Maddireddy <mmaddireddy@nvidia.com>,
	"bhelgaas@google.com" <bhelgaas@google.com>,
	"lpieralisi@kernel.org" <lpieralisi@kernel.org>,
	"kwilczynski@kernel.org" <kwilczynski@kernel.org>,
	"mani@kernel.org" <mani@kernel.org>,
	"robh@kernel.org" <robh@kernel.org>,
	"krzk+dt@kernel.org" <krzk+dt@kernel.org>,
	"conor+dt@kernel.org" <conor+dt@kernel.org>,
	"thierry.reding@gmail.com" <thierry.reding@gmail.com>,
	Jon Hunter <jonathanh@nvidia.com>,
	"kishon@kernel.org" <kishon@kernel.org>,
	"arnd@arndb.de" <arnd@arndb.de>,
	"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
	"Frank.Li@nxp.com" <Frank.Li@nxp.com>,
	"den@valinux.co.jp" <den@valinux.co.jp>,
	"hongxing.zhu@nxp.com" <hongxing.zhu@nxp.com>,
	"jingoohan1@gmail.com" <jingoohan1@gmail.com>,
	"cassel@kernel.org" <cassel@kernel.org>,
	"18255117159@163.com" <18255117159@163.com>
Cc: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v6 06/13] PCI: tegra194: Disable direct speed change for EP
Date: Fri, 27 Feb 2026 12:33:40 +0000	[thread overview]
Message-ID: <6f544cb8-ceb9-4ce4-b096-c2046e2c5716@nvidia.com> (raw)
In-Reply-To: <20260223184151.3083221-7-mmaddireddy@nvidia.com>

On 24/02/26 00:11, Manikanta Maddireddy wrote:
> From: Vidya Sagar <vidyas@nvidia.com>
> 
> Disable direct speed change for the endpoint to prevent it from initiating
> the speed change post physical layer link up at gen1. This leaves the speed
> change ownership with the host.
> 
> Fixes: c57247f940e8 ("PCI: tegra: Add support for PCIe endpoint mode in Tegra194")
> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
> Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
> ---
> Changes V1 -> V6: None
> 
>  drivers/pci/controller/dwc/pcie-tegra194.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
> index 8f69c5c5a099..a6868b77e3b7 100644
> --- a/drivers/pci/controller/dwc/pcie-tegra194.c
> +++ b/drivers/pci/controller/dwc/pcie-tegra194.c
> @@ -1807,6 +1807,10 @@ static void pex_ep_event_pex_rst_deassert(struct tegra_pcie_dw *pcie)
>  
>  	reset_control_deassert(pcie->core_rst);
>  
> +	val = dw_pcie_readl_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL);
> +	val &= ~PORT_LOGIC_SPEED_CHANGE;
> +	dw_pcie_writel_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL, val);
> +
>  	if (pcie->update_fc_fixup) {
>  		val = dw_pcie_readl_dbi(pci, CFG_TIMER_CTRL_MAX_FUNC_NUM_OFF);
>  		val |= 0x1 << CFG_TIMER_CTRL_ACK_NAK_SHIFT;

Reviewed-by: Vidya Sagar <vidyas@nvidia.com>

  reply	other threads:[~2026-02-27 12:33 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-23 18:41 [PATCH v6 00/13] Fixes to pcie-tegra194 driver Manikanta Maddireddy
2026-02-23 18:41 ` [PATCH v6 01/13] PCI: tegra194: Fix polling delay for L2 state Manikanta Maddireddy
2026-02-27 12:32   ` Vidya Sagar
2026-03-02 23:17   ` Bjorn Helgaas
2026-02-23 18:41 ` [PATCH v6 02/13] PCI: tegra194: Refactor LTSSM state polling on surprise down Manikanta Maddireddy
2026-02-27 12:32   ` Vidya Sagar
2026-02-23 18:41 ` [PATCH v6 03/13] PCI: tegra194: Don't force the device into the D0 state before L2 Manikanta Maddireddy
2026-02-27 12:33   ` Vidya Sagar
2026-02-23 18:41 ` [PATCH v6 04/13] PCI: tegra194: Disable PERST IRQ only in Endpoint mode Manikanta Maddireddy
2026-02-27 12:33   ` Vidya Sagar
2026-02-23 18:41 ` [PATCH v6 05/13] PCI: tegra194: Use devm_gpiod_get_optional() to parse "nvidia,refclk-select" Manikanta Maddireddy
2026-02-27 12:33   ` Vidya Sagar
2026-02-23 18:41 ` [PATCH v6 06/13] PCI: tegra194: Disable direct speed change for EP Manikanta Maddireddy
2026-02-27 12:33   ` Vidya Sagar [this message]
2026-02-23 18:41 ` [PATCH v6 07/13] PCI: tegra194: Set LTR message request before PCIe link up Manikanta Maddireddy
2026-02-27 12:33   ` Vidya Sagar
2026-03-02 23:27   ` Bjorn Helgaas
2026-02-23 18:41 ` [PATCH v6 08/13] PCI: tegra194: Apply pinctrl settings for both PCIe RP and EP Manikanta Maddireddy
2026-02-27 12:34   ` Vidya Sagar
2026-02-23 18:41 ` [PATCH v6 09/13] PCI: tegra194: Allow system suspend when the Endpoint link is not up Manikanta Maddireddy
2026-02-27 12:34   ` Vidya Sagar
2026-03-02 23:30   ` Bjorn Helgaas
2026-02-23 18:41 ` [PATCH v6 10/13] PCI: tegra194: Free up EP resources during remove() Manikanta Maddireddy
2026-02-27 12:34   ` Vidya Sagar
2026-02-23 18:41 ` [PATCH v6 11/13] PCI: tegra194: Use HW version number Manikanta Maddireddy
2026-02-27 12:34   ` Vidya Sagar
2026-02-23 18:41 ` [PATCH v6 12/13] PCI: tegra194: Fix CBB timeout caused by DBI access before core power-on Manikanta Maddireddy
2026-02-27 12:34   ` Vidya Sagar
2026-02-23 18:41 ` [PATCH v6 13/13] PCI: tegra194: Free resources during controller deinitialization Manikanta Maddireddy
2026-02-27 12:34   ` Vidya Sagar
2026-02-27 16:59 ` [PATCH v6 00/13] Fixes to pcie-tegra194 driver Jon Hunter

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=6f544cb8-ceb9-4ce4-b096-c2046e2c5716@nvidia.com \
    --to=vidyas@nvidia.com \
    --cc=18255117159@163.com \
    --cc=Frank.Li@nxp.com \
    --cc=arnd@arndb.de \
    --cc=bhelgaas@google.com \
    --cc=cassel@kernel.org \
    --cc=conor+dt@kernel.org \
    --cc=den@valinux.co.jp \
    --cc=gregkh@linuxfoundation.org \
    --cc=hongxing.zhu@nxp.com \
    --cc=jingoohan1@gmail.com \
    --cc=jonathanh@nvidia.com \
    --cc=kishon@kernel.org \
    --cc=krzk+dt@kernel.org \
    --cc=kwilczynski@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-tegra@vger.kernel.org \
    --cc=lpieralisi@kernel.org \
    --cc=mani@kernel.org \
    --cc=mmaddireddy@nvidia.com \
    --cc=robh@kernel.org \
    --cc=thierry.reding@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox