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From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
To: Danielle Costantino <dcostantino@meta.com>,
	Bjorn Helgaas <bhelgaas@google.com>
Cc: Keith Busch <kbusch@kernel.org>, Lukas Wunner <lukas@wunner.de>,
	Mahesh J Salgaonkar <mahesh@linux.ibm.com>,
	Oliver O'Halloran <oohall@gmail.com>,
	linux-pci@vger.kernel.org
Subject: Re: [PATCH 1/2] PCI/DPC: Clear Interrupt Status in dpc_reset_link()
Date: Thu, 12 Feb 2026 11:50:54 -0800	[thread overview]
Message-ID: <9b75cf12-a0b4-49bf-b261-cbe02c0fe310@linux.intel.com> (raw)
In-Reply-To: <20260212191818.3625264-2-dcostantino@meta.com>



On 2/12/2026 11:18 AM, Danielle Costantino wrote:
> In the native DPC interrupt path, dpc_irq() clears
> PCI_EXP_DPC_STATUS_INTERRUPT before scheduling the threaded handler
> that eventually calls dpc_reset_link().  However, in the firmware-first
> EDR path, dpc_irq() is never invoked -- firmware owns the DPC interrupt
> and notifies the OS via an ACPI EDR notification.  dpc_reset_link() is
> then called directly from edr_handle_event() via pcie_do_recovery().
> 
> Because dpc_reset_link() only clears PCI_EXP_DPC_STATUS_TRIGGER, the
> Interrupt Status bit (bit 3) is left set permanently after every EDR
> event.
> 
> Clear PCI_EXP_DPC_STATUS_INTERRUPT alongside PCI_EXP_DPC_STATUS_TRIGGER
> in dpc_reset_link().  Both bits are RW1C in the DPC Status register per
> PCIe r6.1, sec 7.9.14.5, so writing them together is safe.  The native
> path is unaffected because dpc_irq() has already cleared the Interrupt
> Status bit before dpc_reset_link() runs.
> 

In native path (dpc_irq()), OS owns the interrupt delivery and handling.
So it clears it in dpc_irq() handler.

In case of EDR, firmware owns the interrupt handling. It just uses ACPI
method to request OS help with recovery. Since interrupt handling is
owned by firmware, I think firmware should clear the interrupt status.

> Fixes: aea47413e7ce ("PCI/DPC: Expose dpc_process_error(), dpc_reset_link() for use by EDR")
> Signed-off-by: Danielle Costantino <dcostantino@meta.com>
> ---
>  drivers/pci/pcie/dpc.c | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c
> index fc18349614d7..9baa2345e33e 100644
> --- a/drivers/pci/pcie/dpc.c
> +++ b/drivers/pci/pcie/dpc.c
> @@ -171,8 +171,16 @@ pci_ers_result_t dpc_reset_link(struct pci_dev *pdev)
>  		goto out;
>  	}
>  
> +	/*
> +	 * Clear both DPC Trigger Status and DPC Interrupt Status.  In the
> +	 * native DPC path, dpc_irq() already clears Interrupt Status before
> +	 * the threaded handler runs.  But in the EDR (firmware-first) path,
> +	 * dpc_irq() is never called, so Interrupt Status must be cleared
> +	 * here to prevent it from remaining stale indefinitely.
> +	 */
>  	pci_write_config_word(pdev, cap + PCI_EXP_DPC_STATUS,
> -			      PCI_EXP_DPC_STATUS_TRIGGER);
> +			      PCI_EXP_DPC_STATUS_TRIGGER |
> +			      PCI_EXP_DPC_STATUS_INTERRUPT);
>  
>  	if (pci_bridge_wait_for_secondary_bus(pdev, "DPC")) {
>  		clear_bit(PCI_DPC_RECOVERED, &pdev->priv_flags);

-- 
Sathyanarayanan Kuppuswamy
Linux Kernel Developer


  reply	other threads:[~2026-02-12 19:50 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-12 19:18 [PATCH 0/2] PCI/DPC: Fix EDR recovery path issues Danielle Costantino
2026-02-12 19:18 ` [PATCH 1/2] PCI/DPC: Clear Interrupt Status in dpc_reset_link() Danielle Costantino
2026-02-12 19:50   ` Kuppuswamy Sathyanarayanan [this message]
2026-02-12 21:23     ` Keith Busch
2026-02-12 21:49       ` Kuppuswamy Sathyanarayanan
2026-02-12 22:12         ` Keith Busch
2026-02-12 22:51           ` Kuppuswamy Sathyanarayanan
2026-02-13  1:22             ` Keith Busch
2026-02-13  4:28               ` Sathyanarayanan Kuppuswamy
2026-02-13 14:01                 ` Keith Busch
2026-02-13 17:08                   ` Kuppuswamy Sathyanarayanan
     [not found]               ` <4c0d0575-0da1-49ff-878e-65622b442e98@linux.intel.com>
2026-02-13  4:29                 ` Sathyanarayanan Kuppuswamy
2026-02-12 21:36   ` Lukas Wunner
2026-02-12 21:50     ` Keith Busch
2026-02-12 19:18 ` [PATCH 2/2] PCI/EDR: Defer AER status clearing until after recovery Danielle Costantino

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