From: Lukas Wunner <lukas@wunner.de>
To: Danielle Costantino <dcostantino@meta.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
Keith Busch <kbusch@kernel.org>,
Kuppuswamy Sathyanarayanan
<sathyanarayanan.kuppuswamy@linux.intel.com>,
Mahesh J Salgaonkar <mahesh@linux.ibm.com>,
Oliver O'Halloran <oohall@gmail.com>,
linux-pci@vger.kernel.org
Subject: Re: [PATCH 1/2] PCI/DPC: Clear Interrupt Status in dpc_reset_link()
Date: Thu, 12 Feb 2026 22:36:12 +0100 [thread overview]
Message-ID: <aY5HzFYjhLmOQhs6@wunner.de> (raw)
In-Reply-To: <20260212191818.3625264-2-dcostantino@meta.com>
On Thu, Feb 12, 2026 at 11:18:17AM -0800, Danielle Costantino wrote:
> Clear PCI_EXP_DPC_STATUS_INTERRUPT alongside PCI_EXP_DPC_STATUS_TRIGGER
> in dpc_reset_link(). Both bits are RW1C in the DPC Status register per
> PCIe r6.1, sec 7.9.14.5, so writing them together is safe. The native
> path is unaffected because dpc_irq() has already cleared the Interrupt
> Status bit before dpc_reset_link() runs.
Hm, doesn't this create a risk that in the native case, an interrupt may
be lost (i.e. cleared without acting on it) if it occurs between clearing
the bit in dpc_irq() and clearing it in dpc_reset_link()?
Maybe I'm missing something and this isn't a problem, but in that case
an explanation in the commit message would be good *why* it's not a
problem.
Thanks,
Lukas
next prev parent reply other threads:[~2026-02-12 21:36 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-12 19:18 [PATCH 0/2] PCI/DPC: Fix EDR recovery path issues Danielle Costantino
2026-02-12 19:18 ` [PATCH 1/2] PCI/DPC: Clear Interrupt Status in dpc_reset_link() Danielle Costantino
2026-02-12 19:50 ` Kuppuswamy Sathyanarayanan
2026-02-12 21:23 ` Keith Busch
2026-02-12 21:49 ` Kuppuswamy Sathyanarayanan
2026-02-12 22:12 ` Keith Busch
2026-02-12 22:51 ` Kuppuswamy Sathyanarayanan
2026-02-13 1:22 ` Keith Busch
2026-02-13 4:28 ` Sathyanarayanan Kuppuswamy
2026-02-13 14:01 ` Keith Busch
2026-02-13 17:08 ` Kuppuswamy Sathyanarayanan
[not found] ` <4c0d0575-0da1-49ff-878e-65622b442e98@linux.intel.com>
2026-02-13 4:29 ` Sathyanarayanan Kuppuswamy
2026-02-12 21:36 ` Lukas Wunner [this message]
2026-02-12 21:50 ` Keith Busch
2026-02-12 19:18 ` [PATCH 2/2] PCI/EDR: Defer AER status clearing until after recovery Danielle Costantino
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