Re: [PATCH 1/2] PCI/DPC: Clear Interrupt Status in dpc_reset_link()

[Keith Busch <kbusch@kernel.org>]

On Thu, Feb 12, 2026 at 01:49:52PM -0800, Kuppuswamy Sathyanarayanan wrote:
> Hi Keith,
> 
> On 2/12/2026 1:23 PM, Keith Busch wrote:
> > On Thu, Feb 12, 2026 at 11:50:54AM -0800, Kuppuswamy Sathyanarayanan wrote:
> >> In case of EDR, firmware owns the interrupt handling. It just uses ACPI
> >> method to request OS help with recovery. Since interrupt handling is
> >> owned by firmware, I think firmware should clear the interrupt status.
> > 
> > But the PCI Firmware Specication says the OS owns the status register
> > while it is handling EDR notification
> > 
> > "
> >    the operating system is permitted to write the following:
> > 
> >      * Device Status Register
> >      * Uncorrectable Error Status Register
> >      * Correctable Error Status Register
> >      * Root Error Status Register
> >      * RP PIO Status Register
> > 
> >    in the Port that triggered DPC while processing an Error Disconnect Recover
> >    notification from firmware
> > "
> 
> Please check the _OSC DPC control bit details in PCI firmware spec.
> 
> It specifically calls out OS is permitted to write to DPC trigger status
> bit in DPC status register. It does not talk about about DPC interrupt
> status bit.
> 
> Copied here for reference:
> 
> "If control of this feature was requested and denied, or was not requested,
> then the operating system is permitted to write to the DPC Trigger Status bit
> in the DPC Status Register in the Port that triggered containment"
> 
> I think since firmware registers interrupt handler for DPC, after OS helps
> handle the recovery it should complete the loop and clear it.

But that just creates a window for when after the OS lets the link
retrain that the port will be unable to trigger a new containment event.

Sure, there's no explicit language in any spec I can find that the OS
must write 1 to bit 3 of the status register, but it doesn't say
firmware owns that bit either. The firmware handed control of the status
to the OS in this path. It would not make sense to return to firmware in
a state that makes it impossible to report new errors during that
transition window.

Besides, is firmware first even triggering off an interrupt? Pretty sure
it's triggering off the ERR_COR message, no? Why would it need to own
the Interrupt Status bit when it's not even relying on it?