From: John Garry <john.garry@huawei.com>
To: JBottomley@odin.com, robh+dt@kernel.org, pawel.moll@arm.com,
mark.rutland@arm.com, ijc+devicetree@hellion.org.uk,
galak@codeaurora.org, arnd@arndb.de
Cc: linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linuxarm@huawei.com,
john.garry2@mail.dcu.ie, hare@suse.de, xuwei5@hisilicon.com,
zhangfei.gao@linaro.org, john.garry@huawei.com
Subject: [PATCH v4 06/32] scsi: hisi_sas: add HW DMA structures
Date: Mon, 16 Nov 2015 21:05:52 +0800 [thread overview]
Message-ID: <1447679178-220222-7-git-send-email-john.garry@huawei.com> (raw)
In-Reply-To: <1447679178-220222-1-git-send-email-john.garry@huawei.com>
Signed-off-by: John Garry <john.garry@huawei.com>
---
drivers/scsi/hisi_sas/hisi_sas.h | 131 +++++++++++++++++++++++++++++++++++++++
1 file changed, 131 insertions(+)
diff --git a/drivers/scsi/hisi_sas/hisi_sas.h b/drivers/scsi/hisi_sas/hisi_sas.h
index 87f4b61..19d40b7 100644
--- a/drivers/scsi/hisi_sas/hisi_sas.h
+++ b/drivers/scsi/hisi_sas/hisi_sas.h
@@ -66,5 +66,136 @@ struct hisi_hba {
const struct hisi_sas_hw *hw; /* Low level hw interface */
};
+/* Generic HW DMA host memory structures */
+/* Delivery queue header */
+struct hisi_sas_cmd_hdr {
+ /* dw0 */
+ __le32 dw0;
+
+ /* dw1 */
+ __le32 dw1;
+
+ /* dw2 */
+ __le32 dw2;
+
+ /* dw3 */
+ __le32 transfer_tags;
+
+ /* dw4 */
+ __le32 data_transfer_len;
+
+ /* dw5 */
+ __le32 first_burst_num;
+
+ /* dw6 */
+ __le32 sg_len;
+
+ /* dw7 */
+ __le32 dw7;
+
+ /* dw8-9 */
+ __le64 cmd_table_addr;
+
+ /* dw10-11 */
+ __le64 sts_buffer_addr;
+
+ /* dw12-13 */
+ __le64 prd_table_addr;
+
+ /* dw14-15 */
+ __le64 dif_prd_table_addr;
+};
+
+struct hisi_sas_itct {
+ __le64 qw0;
+ __le64 sas_addr;
+ __le64 qw2;
+ __le64 qw3;
+ __le64 qw4;
+ __le64 qw_sata_ncq0_3;
+ __le64 qw_sata_ncq7_4;
+ __le64 qw_sata_ncq11_8;
+ __le64 qw_sata_ncq15_12;
+ __le64 qw_sata_ncq19_16;
+ __le64 qw_sata_ncq23_20;
+ __le64 qw_sata_ncq27_24;
+ __le64 qw_sata_ncq31_28;
+ __le64 qw_non_ncq_iptt;
+ __le64 qw_rsvd0;
+ __le64 qw_rsvd1;
+};
+
+struct hisi_sas_iost {
+ __le64 qw0;
+ __le64 qw1;
+ __le64 qw2;
+ __le64 qw3;
+};
+
+struct hisi_sas_err_record {
+ /* dw0 */
+ __le32 dma_err_type;
+
+ /* dw1 */
+ __le32 trans_tx_fail_type;
+
+ /* dw2 */
+ __le32 trans_rx_fail_type;
+
+ /* dw3 */
+ u32 rsvd;
+};
+
+struct hisi_sas_initial_fis {
+ struct hisi_sas_err_record err_record;
+ struct dev_to_host_fis fis;
+ u32 rsvd[3];
+};
+
+struct hisi_sas_breakpoint {
+ u8 data[128]; /*io128 byte*/
+};
+
+struct hisi_sas_sge {
+ __le64 addr;
+ __le32 page_ctrl_0;
+ __le32 page_ctrl_1;
+ __le32 data_len;
+ __le32 data_off;
+};
+
+struct hisi_sas_command_table_smp {
+ u8 bytes[44];
+};
+
+struct hisi_sas_command_table_stp {
+ struct host_to_dev_fis command_fis;
+ u8 dummy[12];
+ u8 atapi_cdb[ATAPI_CDB_LEN];
+};
+
#define HISI_SAS_SGE_PAGE_CNT SCSI_MAX_SG_SEGMENTS
+struct hisi_sas_sge_page {
+ struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT];
+};
+
+struct hisi_sas_command_table_ssp {
+ struct ssp_frame_hdr hdr;
+ union {
+ struct {
+ struct ssp_command_iu task;
+ u32 prot[6];
+ };
+ struct ssp_tmf_iu ssp_task;
+ struct xfer_rdy_iu xfer_rdy;
+ struct ssp_response_iu ssp_res;
+ } u;
+};
+
+union hisi_sas_command_table {
+ struct hisi_sas_command_table_ssp ssp;
+ struct hisi_sas_command_table_smp smp;
+ struct hisi_sas_command_table_stp stp;
+};
+
#endif
--
1.9.1
next prev parent reply other threads:[~2015-11-16 13:05 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-16 13:05 [PATCH v4 00/32] HiSilicon SAS driver John Garry
2015-11-16 13:05 ` [PATCH v4 01/32] [SCSI] sas: centralise ssp frame information units John Garry
2015-11-16 13:05 ` [PATCH v4 03/32] scsi: hisi_sas: add initial bare main driver John Garry
2015-11-16 17:35 ` kbuild test robot
2015-11-17 16:24 ` John Garry
2015-11-16 13:05 ` [PATCH v4 05/32] scsi: hisi_sas: scan device tree John Garry
2015-11-16 21:10 ` kbuild test robot
2015-11-16 13:05 ` John Garry [this message]
2015-11-16 13:05 ` [PATCH v4 07/32] scsi: hisi_sas: allocate memories and create pools John Garry
2015-11-16 13:05 ` [PATCH v4 08/32] scsi: hisi_sas: add hisi_sas_remove John Garry
2015-11-16 13:05 ` [PATCH v4 09/32] scsi: hisi_sas: add slot init code John Garry
2015-11-16 13:05 ` [PATCH v4 10/32] scsi: hisi_sas: add cq structure initialization John Garry
2015-11-16 13:05 ` [PATCH v4 11/32] scsi: hisi_sas: add phy SAS ADDR initialization John Garry
2015-11-16 13:06 ` [PATCH v4 14/32] scsi: hisi_sas: add hisi sas device type John Garry
2015-11-16 13:06 ` [PATCH v4 16/32] scsi: hisi_sas: add timer and spinlock init John Garry
2015-11-16 13:06 ` [PATCH v4 18/32] scsi: hisi_sas: add v1 hardware register definitions John Garry
2015-11-16 13:06 ` [PATCH v4 20/32] scsi: hisi_sas: add v1 hw interrupt init John Garry
2015-11-16 13:06 ` [PATCH v4 23/32] scsi: hisi_sas: add cq interrupt handler John Garry
2015-11-16 13:06 ` [PATCH v4 24/32] scsi: hisi_sas: add dev_found and dev_gone John Garry
[not found] ` <1447679178-220222-1-git-send-email-john.garry-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2015-11-16 13:05 ` [PATCH v4 02/32] devicetree: bindings: scsi: HiSi SAS John Garry
2015-11-16 13:56 ` Rob Herring
2015-11-16 13:05 ` [PATCH v4 04/32] scsi: hisi_sas: add scsi host registration John Garry
2015-11-16 13:05 ` [PATCH v4 12/32] scsi: hisi_sas: set dev DMA mask John Garry
2015-11-16 13:05 ` [PATCH v4 13/32] scsi: hisi_sas: add hisi_hba workqueue John Garry
2015-11-16 13:06 ` [PATCH v4 15/32] scsi: hisi_sas: add phy and port init John Garry
2015-11-16 13:06 ` [PATCH v4 17/32] scsi: hisi_sas: add v1 hw module init John Garry
2015-11-16 13:06 ` [PATCH v4 19/32] scsi: hisi_sas: add v1 HW initialisation code John Garry
2015-11-16 13:06 ` [PATCH v4 21/32] scsi: hisi_sas: add path from phyup irq to SAS framework John Garry
2015-11-16 13:06 ` [PATCH v4 22/32] scsi: hisi_sas: add ssp command function John Garry
2015-11-16 13:06 ` [PATCH v4 25/32] scsi: hisi_sas: add abnormal irq handler John Garry
2015-11-16 13:06 ` [PATCH v4 26/32] scsi: hisi_sas: add bcast interrupt handler John Garry
2015-11-16 13:06 ` [PATCH v4 28/32] scsi: hisi_sas: add scan finished and start John Garry
2015-11-16 13:06 ` [PATCH v4 31/32] scsi: hisi_sas: add fatal irq handler John Garry
2015-11-16 13:06 ` [PATCH v4 27/32] scsi: hisi_sas: add smp protocol support John Garry
2015-11-16 13:06 ` [PATCH v4 29/32] scsi: hisi_sas: add tmf methods John Garry
2015-11-16 13:06 ` [PATCH v4 30/32] scsi: hisi_sas: add control phy handler John Garry
2015-11-16 13:06 ` [PATCH v4 32/32] MAINTAINERS: add maintainer for HiSi SAS driver John Garry
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1447679178-220222-7-git-send-email-john.garry@huawei.com \
--to=john.garry@huawei.com \
--cc=JBottomley@odin.com \
--cc=arnd@arndb.de \
--cc=devicetree@vger.kernel.org \
--cc=galak@codeaurora.org \
--cc=hare@suse.de \
--cc=ijc+devicetree@hellion.org.uk \
--cc=john.garry2@mail.dcu.ie \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-scsi@vger.kernel.org \
--cc=linuxarm@huawei.com \
--cc=mark.rutland@arm.com \
--cc=pawel.moll@arm.com \
--cc=robh+dt@kernel.org \
--cc=xuwei5@hisilicon.com \
--cc=zhangfei.gao@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox