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* [PATCH v1] spi: geni-qcom: Fix CPHA and CPOL mode change detection
@ 2026-03-16 13:23 Maramaina Naresh
  2026-03-16 13:28 ` Konrad Dybcio
                   ` (3 more replies)
  0 siblings, 4 replies; 6+ messages in thread
From: Maramaina Naresh @ 2026-03-16 13:23 UTC (permalink / raw)
  To: Mark Brown, Jonathan Marek, konrad.dybcio
  Cc: kernel, linux-arm-msm, linux-spi, linux-kernel, stable,
	dmitry.baryshkov, bjorande, mukesh.savaliya, praveen.talari,
	jyothi.seerapu, naresh.maramaina

setup_fifo_params computes mode_changed from spi->mode flags but tests
it against SE_SPI_CPHA and SE_SPI_CPOL, which are register offsets,
not SPI mode bits. This causes CPHA and CPOL updates to be skipped
on mode switches, leaving the controller with stale clock phase
and polarity settings.

Fix this by using SPI_CPHA and SPI_CPOL to detect mode changes before
updating the corresponding registers.

Fixes: 781c3e71c94c ("spi: spi-geni-qcom: rework setup_fifo_params")
Signed-off-by: Maramaina Naresh <naresh.maramaina@oss.qualcomm.com>
---
This patch fixes SPI mode change detection in the spi-geni-qcom driver.

setup_fifo_params compared spi->mode against SE_SPI_CPHA/SE_SPI_CPOL,
which are register offsets instead of SPI_CPHA/SPI_CPOL mode bits.
This could skip CPHA/CPOL updates on mode switches and leave stale
clock configuration.

This is a single-patch series.
---
 drivers/spi/spi-geni-qcom.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c
index 43ce47f2454c..772b7148ba5f 100644
--- a/drivers/spi/spi-geni-qcom.c
+++ b/drivers/spi/spi-geni-qcom.c
@@ -359,9 +359,9 @@ static int setup_fifo_params(struct spi_device *spi_slv,
 		writel((spi_slv->mode & SPI_LOOP) ? LOOPBACK_ENABLE : 0, se->base + SE_SPI_LOOPBACK);
 	if (cs_changed)
 		writel(chipselect, se->base + SE_SPI_DEMUX_SEL);
-	if (mode_changed & SE_SPI_CPHA)
+	if (mode_changed & SPI_CPHA)
 		writel((spi_slv->mode & SPI_CPHA) ? CPHA : 0, se->base + SE_SPI_CPHA);
-	if (mode_changed & SE_SPI_CPOL)
+	if (mode_changed & SPI_CPOL)
 		writel((spi_slv->mode & SPI_CPOL) ? CPOL : 0, se->base + SE_SPI_CPOL);
 	if ((mode_changed & SPI_CS_HIGH) || (cs_changed && (spi_slv->mode & SPI_CS_HIGH)))
 		writel((spi_slv->mode & SPI_CS_HIGH) ? BIT(chipselect) : 0, se->base + SE_SPI_DEMUX_OUTPUT_INV);

---
base-commit: 7109a2155340cc7b21f27e832ece6df03592f2e8
change-id: 20260316-spi-geni-cpha-cpol-fix-89126ed55325

Best regards,
-- 
Maramaina Naresh <naresh.maramaina@oss.qualcomm.com>


^ permalink raw reply related	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2026-03-21  3:05 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-03-16 13:23 [PATCH v1] spi: geni-qcom: Fix CPHA and CPOL mode change detection Maramaina Naresh
2026-03-16 13:28 ` Konrad Dybcio
2026-03-16 14:48 ` Mark Brown
2026-03-16 17:13 ` Jonathan Marek
2026-03-21  3:04   ` Val Packett
2026-03-16 17:52 ` Mark Brown

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